Texas Instruments ADS1259EVM User manual

User's Guide
SBAU163A–March 2010–Revised April 2010
ADS1259EVM, ADS1259EVM-PDK
ADS1259EVM (Left) and ADS1259EVM-PDK (Right)
This user's guide describes the characteristics, operation, and use of the ADS1259EVM, both by itself and
as part of the ADS1259EVM-PDK. This evaluation model (EVM) is an evaluation board for two different
devices. First, it can be used to evaluate the ADS1259, a low-noise, 24-bit, single-channel, delta-sigma
(ΔΣ) analog-to-digital converter (ADC). The ADS1259 can be used either in standalone applications or
with the PGA280. The PGA280 is a high-precision instrumentation amplifier with digitally-controllable gain
and signal integrity test capability. The combination of these two devices forms a high-resolution
measurement system able to digitize a wide range of signals.
This EVM allows performance evaluations of both the ADS1259 and the PGA280. The EVM also allows
for PGA280 control of the ADS1259 through the use of the external chip select modes. Complete circuit
descriptions, schematic diagrams, printed circuit board (PCB) layouts, and bill of material are included in
this document.
The following related documents are available through the Texas Instruments web site at
http://www.ti.com.
Related Documents
Device Literature Number
ADS1259 SBAS424A
PGA280 SBOS487A
REF5025 SBOS410C
SN74LVC2G157 SCES207K
ADCPro is a trademark of Texas Instruments.
Microsoft, Windows are registered trademarks of Microsoft Corporation.
SPI is a trademark of Motorola Inc.
I2C is a trademark of NXP Semiconductors.
NI-VISA is a trademark of National Instruments.
All other trademarks are the property of their respective owners.
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Contents
1 EVM Overview ............................................................................................................... 4
2 Analog Interface ............................................................................................................. 4
3 Digital Interface .............................................................................................................. 6
4 Power Supplies .............................................................................................................. 7
5 Voltage Reference .......................................................................................................... 8
6 ADS1259 Control ........................................................................................................... 9
7 Clock Source ................................................................................................................ 9
8 EVM Operation ............................................................................................................ 10
9 ADS1259EVM-PDK Operation .......................................................................................... 12
10 Evaluating Performance with the ADCPro Software .................................................................. 27
11 Schematics and Layout ................................................................................................... 35
List of Figures
1 Test Points TP11 and TP12 ............................................................................................... 5
2 Switch S2 and Jumper J15 ................................................................................................ 6
3 Switch S3 .................................................................................................................... 6
4 Jumper J10 .................................................................................................................. 8
5 Switch S1 .................................................................................................................... 8
6 Switch S4 .................................................................................................................... 9
7 ADS1259EVM Default Jumper Positions............................................................................... 11
8 ADS1259EVM Default Switch Positions................................................................................ 11
9 ADS1259EVM-PDK Setup Wizard: Screen 1.......................................................................... 13
10 ADS1259EVM-PDK Setup Wizard: Screen 2.......................................................................... 13
11 ADS1259EVM-PDK Setup Wizard: Screen 3.......................................................................... 14
12 ADS1259EVM-PDK Setup Wizard: Screen 4.......................................................................... 14
13 MMB0 Initial Configuration ............................................................................................... 15
14 Connecting the ADS1259EVM to the MMB0 .......................................................................... 16
15 Using the +6V Wall Supply for +5V..................................................................................... 17
16 MMB0 Configured for Lab Power Supply .............................................................................. 18
17 NI-VISA Driver Installation Wizard, Screen 1.......................................................................... 19
18 NI-VISA Driver Installation Wizard, Screen 2.......................................................................... 20
19 NI-VISA Driver Installation Wizard, Screen 3.......................................................................... 20
20 NI-VISA Driver Installation Wizard, Screen 4.......................................................................... 21
21 NI-VISA Driver Verification Using Device Manager................................................................... 21
22 ADCPro Software Start-up Display Window ........................................................................... 22
23 ADS1259EVM-PDK Plug-In Display Window.......................................................................... 23
24 Install New Driver Wizard Screen 1..................................................................................... 24
25 Install New Driver Wizard Screen 2..................................................................................... 24
26 Install New Driver Wizard Screen 3..................................................................................... 25
27 Install New Driver Wizard Screen 4..................................................................................... 25
28 Install New Driver Wizard Screen 5..................................................................................... 26
29 USBStyx Driver Verification Using Device Manager.................................................................. 26
30 Data Rate Control ......................................................................................................... 27
31 Over-Range Flag .......................................................................................................... 27
32 ADC Configuration Tab .................................................................................................. 28
33 ADC Calibration Tab ...................................................................................................... 29
34 PGA Configuration Tab................................................................................................... 30
35 PGA GPIO Tab ............................................................................................................ 31
36 PGA Input Switch Tab .................................................................................................... 32
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37 PGA Error Indicators Tab ................................................................................................ 33
38 EVM Software About Tab ................................................................................................ 34
39 Software Progress Indicator.............................................................................................. 35
40 Top Silk Image............................................................................................................. 37
41 Top Side (Layer 1) ........................................................................................................ 37
42 Internal Layer 1 (Layer 2) ................................................................................................ 37
43 Internal Layer 2 (Layer 3) ................................................................................................ 38
44 Bottom Side (Layer 4)..................................................................................................... 38
List of Tables
1 J8: Analog Interface Header Pinout ...................................................................................... 5
2 J7: Serial Data Interface Pins ............................................................................................. 7
3 J11 Configuration: Power-Supply Input .................................................................................. 7
4 ADS1259EVM Bill of Materials .......................................................................................... 35
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1 EVM Overview
1.1 Features
ADS1259EVM:
• Contains all support circuitry needed for the ADS1259
• PGA280 can be evaluated as a buffer and integrated control
• Voltage reference options: external or onboard
• Clock options: External clock source or 7.3728MHz onboard crystal oscillator
• Compatible with the TI Modular EVM System
ADS1259EVM and ADS1259EVM-PDK Features:
• Easy-to-use evaluation software for Microsoft®Windows®XP
• Data collection to text files
• Built-in analysis tools including scope, FFT, and histogram displays
• Complete control of board settings
• Easily expandable with new analysis plug-in tools from Texas Instruments
For use with a computer, the ADS1259EVM-PDK is available. This kit combines the ADS1259EVM board
with the DSP-based MMB0 motherboard, and includes ADCPro™ software for evaluation.
The MMB0 motherboard allows the ADS1259EVM to be connected to the computer via an available USB
port. This manual shows how to use the MMB0 as part of the ADS1259EVM-PDK, but does not provide
technical details about the MMB0 itself.
ADCPro™ is a program for collecting, recording, and analyzing data from ADC evaluation boards. It is
based on a number of plug-in programs, so it can be expanded easily with new test and data collection
plug-ins. The ADS1259EVM-PDK is controlled by a plug-in running in ADCPro. For more information
about ADCPro, see the ADCPro™ Analog-to-Digital Converter Evaluation Software User's Guide
(SBAU128), available for download from the TI web site.
This manual covers the operation of both the ADS1259EVM and the ADS1259EVM-PDK. Throughout this
document, the abbreviation EVM and the term evaluation module are synonymous with the
ADS1259EVM.
1.2 Introduction
The ADS1259EVM is an evaluation module built to the TI Modular EVM System specification. It can be
connected to any modular EVM system interface card.
The ADS1259EVM is available as a standalone printed circuit board (PCB) or as part of the
ADS1259EVM-PDK, which includes an MMB0 motherboard and software. As a standalone PCB, the
ADS1259EVM is useful for prototyping designs and firmware.
Note that the ADS1259EVM has no microprocessor and cannot run software. To connect it to a computer,
some type of interface is required.
2 Analog Interface
For maximum flexibility, the ADS1259EVM is designed for easy interfacing to multiple analog sources.
Samtec part numbers SSW-110-22-F-D–VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin,
dual-row, header/socket combination at J8. This header/socket provides access to the analog input pins of
the ADS1259 and the PGA280. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a
variety of mating connector options.
The input pins on the ADS1259EVM do not connect directly to the part, but connect to the inputs of the
ADS1259 through switch S2 and modest filtering. Along with the analog header, these analog inputs can
be easily accessed through test loops TP7 and TP8. Analog input pins INN1 and INP1 of the PGA280 can
also be accessed through test loops TP13 and TP14 (INP2 and INN2 can only be accessed through the
analog header). For all analog inputs, it is important that appropriate caution is taken when handling the
pins.
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Table 1 summarizes the pinouts for analog interface header J8.
Table 1. J8: Analog Interface Header Pinout
Pin Number Signal Description
J8.1 A0N AINN, ADS1259, through switch S2 and low-pass
filter, R1-2, C1-3
J8.2 A0P AINP, ADS1259, through switch S2 and low-pass
filter, R1-2, C1-3
J8.3 A1N INN1, PGA280, through R7
J8.4 A1P INP1, PGA280, through R6
J8.5 A1N INN2, PGA280, through R5
J8.6 A1P INP2, PGA280, through R4
J8.9-13 (odd) AGND Analog ground connections
J8.15 VCOM VOCM, PGA280, via switch S3 and R3
J8.17-19 (odd) AGND Analog ground connections
J8.18 REFN External reference source input (– side of
differential input)
J8.20 REFP External reference source input (+ side of
differential input)
J8.10-16 (even) Unused —
The output pins of the PGA280 (VOP and VON) can be accessed through TP11 and TP12, but there is no
connection to the analog interface J8. Figure 1 shows TP11 and TP12.
Figure 1. Test Points TP11 and TP12
The input of the ADS1259 is selectable through switch S2. From settings left-to-right, this three-way switch
selects the ADC input from the AINP or AINN inputs from the analog interface header, the VOP and VON
outputs of the PGA280, or allows for the self calibration inputs in combination with jumper J15.
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As an indicator, the three settings of S2 are labeled HDR, PGA, and CAL below the switch, as Figure 2
illustrates.
Figure 2. Switch S2 and Jumper J15
When switch S2 is set to the right, jumper J15 is used in the system calibration modes for the ADS1259.
When the jumper is set to the left, pins 1 and 2 of jumper J15 are connected. The inputs of the ADS1259
are shorted together and tied to REFP. With this connection, the user can run an offset calibration. When
the jumper is set to the right, pins 2 and 3 of jumper J15 are connected. The inputs of the ADS1259 are
tied to REFP and REFN, measuring the reference voltage. At this point, the user can run a gain
calibration. On either side of J15, OF and GA indicate the sides of jumper J15 used for offset and gain
calibrations.
Another three-way switch (S3) sets the source of the output common-mode of the PGA280. Setting the
switch to the left connects the output common-mode to pin J8.15 of the analog interface header. The
center setting of the switch connects it to the midpoint between AVDD and AVSS via the voltage divider of
R8 and R9. The right setting connects it to the REFOUT of the ADS1259. These options are labeled under
the switch as HDR, AVDD/2, and REF respectively. Figure 3 shows S3 as it appears on the
ADS1259EVM.
Figure 3. Switch S3
3 Digital Interface
The ADS1259EVM is designed to easily interface with multiple control platforms. Samtec part numbers
SSW-110-22-F-D–VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin, dual-row, header/socket
combination at J7. This header/socket provides access to the digital control and serial data pins of the
ADC. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating
connector options.
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All logic levels on J7 are 3.3V CMOS, except for the I2C™ pins. These pins conform to 3.3V I2C rules.
Table 2 describes the J7 serial interface pins.
Table 2. J7: Serial Data Interface Pins
Pin No. Pin Name Signal Name I/O Type Pull-up Function
J7.1 CNTL Unused — — —
J7.2 GPIO0 START In High ADS1259 START Pin
J7.3 CLKX SCLK In None ADS1259/PGA280 SPI clock
J7.4 DGND DGND In/Out None Digital Ground
J7.5 CLKR Unused — — —
J7.6 GPIO1 RST/PDWN In High ADS1259 RST/PDWN
J7.7 FSX CS — — ADS1259 SPI Chip Select
J7.8 GPIO2 DOUT Out High PGA280 SPI data out
J7.9 FSR Unused — None —
J7.10 DGND DGND In/Out None Digital Ground
J7.11 DX DIN In None ADS1259 SPI data in
J7.12 GPIO3 CS In High PGA280 SPI Chip Select
J7.13 DR DOUT Out None ADS1259 SPI data out
J7.14 GPIO4 Unused — None —
J7.15 INT DRDY Out None ADS1259 SPI Data Ready signal
J7.16 SCL SCL I2C n/a I2C clock
J7.17 TOUT CLK In None Can be used to provide a clock from
a processor
J7.18 DGND DGND In/Out None Digital Ground
J7.19 GPIO5 EXTCLK In None External Clock input
J7.20 SDA SDA I2C n/a I2C data
Many pins on J7 have weak pull-up/-down resistors. These resistors provide default settings for many of
the control pins. Furthermore, many pins on J7 correspond directly to pins on the ADS1259. See the
ADS1259 product data sheet for complete details on these pins.
4 Power Supplies
J11 is the power-supply input connector. Table 3 lists the configuration details for J11. The ADS1259 and
PGA280 output amplifier are powered from +5V that can be supplied through the +5VA supply that can be
found on pin J11.3. An additional bipolar supply is needed to power the PGA280 through +VA and –VA
through pins J11.1 and J11.2.
Table 3. J11 Configuration: Power-Supply Input
Pin No. Pin Name Function Required
J11.1 +VA +10V to +15V Yes
J11.2 –VA -10V to -15V Yes
J11.3 +5VA +5V analog supply Always
J11.4 -5VA -5V analog supply No
J11.5 DGND Digital ground input Yes
J11.6 AGND Analog ground input Yes
J11.7 +1.8VD 1.8V digital supply No
J11.8 VD1 Not used No
J11.9 +3.3VD 3.3V digital supply Always
J11.10 +5VD +5V No
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Between the power-supply input connector of J11 and the devices on the EVM, jumper J10 allows a point
to either bypass the supply connection or measure the supply current. With all the jumpers in J10 inserted,
the components on the EVM are powered through the power-supply header. In this configuration, AVDD =
+5V, DVDD = +3.3V, and AGND and DGND are both 0V (AGND and DGND are connected together on
the EVM). Jumper J10 is shown in Figure 4.
Figure 4. Jumper J10
Note that the high-voltage supplies for the PGA280 can only be accessed through pins 1 and 2 of jumper
J11. The supplies +VA and –VA can be set to +10V to +15V, and –10V to –15V, respectively.
5 Voltage Reference
The ADS1259EVM has three options for supplying a reference voltage to the ADS1259. There are two
options for an external reference and one option with the internal ADS1259 reference.
Switch S1 selects an external reference from an external reference voltage using pins J8.18 (REF–) and
J8.20 (REF+) from the analog interface header or the REF5025 reference (U11). With the switch set to the
left, switch S1 selects the external reference voltage that is connected to the header of J8. With the switch
set to the right, S1 selects the onboard reference from the REF5025. Figure 5 shows switch S1 as it
appears on the EVM.
Figure 5. Switch S1
Alternately, the ADS1259 also has an internal reference that can be used. The REFOUT pin allows for
measurement of this reference as well as a source that can be used to drive other functions, such as a
measurement bridge or the output common mode of the PGA280. If the internal reference is selected, set
switch S1 to the analog interface header, and leave the reference inputs at J8 unconnected.
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6 ADS1259 Control
The ADS1259 can be used as a standalone device on the EVM or can be controlled using the interface
with the PGA280. However, to use the ADS1259EVM-PDK with the ADCPro software, the PGA280 must
be used as the control for the ADS1259.
To operate the ADS1259 without the PGA280, all the jumpers from J2, J3, and J4 should be moved to the
right, connecting pins 2 and 3 of each jumper. These jumpers connect the ADS1259 to the EVM serial
interface header and allow control of the ADS1259 CS, START, and RST/PDWN pins through J7.
Communications with the ADS1259 are handled with an SPI™-compatible serial interface. From the serial
interface header, SCLK is handled with CLKX, chip select is handled by FSX, DIN comes from DX, DOUT
goes to DR, and DRDY goes to INT. Additionally, the START pin (used to start a conversion) is run from
GPIO0; reset and the power-down pin can be controlled by GPIO1.
The ADS1259 can also be controlled through communications from the PGA280. The PGA280 can
generate an extended chip select (ECS) for other devices that are connected to the same SPI wires: SDO,
SDI, and SCLK. This ECS signal redirects the SPI communication to the connected device, while the
PGA280 ignores data and SCLK. For this type of control, all the jumpers from J2, J3, and J4 should be
moved to the left, connecting pins 1 and 2 of each jumper. This configuration connects the PGA280 to the
ADS1259 though several of the PGA GPIOs. Note that this method of control is used in the
ADS1259EVM-PDK, and that jumpers J2, J3, and J4 must be set to the left to enable control through
ADCPro and the ADS1259EVM plug-in.
PGA280:GPIO0-2 can be used to control external functions, such as a mux.
PGA280:GPIO3 can be used to enable a reset or power-down of the ADS1259.
PGA280:GPIO4 can be used to toggle the START pin of the ADS1259 to trigger a conversion.
PGA280:GPIO5 is used to generate chip select (ECS) for the ADS1259.
PGA280:GPIO6 receives the ACLKOUT signal from the ADS1259. This port sends out an fS/8 clock from
the ADS1259 that can be used as a synchronized chopper clock for the PGA280. Note that this
configuration requires J1 to be set so that pins 2 and 3 are connected.
For more details, see the PGA280 data sheet.
7 Clock Source
The ADS1259 clock can come from one of several sources. It can be selected through switch S4, as
illustrated in Figure 6.
Figure 6. Switch S4
• A crystal dropped into X1 with switch S4 set to the unconnected setting to the right.
• The ADS1259 can start an internal oscillator upon power up with switch S4 switched to ground to the
center.
• The crystal oscillator (U32) can be selected through GPIO5 HIGH and switch S4 set to the left,
selecting the multiplexer (U31) output.
• A TOUT clock coming from the serial header (J7.17) can be selected through GPIO5 LOW, with switch
S4 selecting the multiplexer (U31)
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7.1 Usage in PDK
If using the ADS1259EVM as part of the ADS1259EVM-PDK, switch S4 should be set to the left, using the
multiplexer output. Using the onboard 7.3728MHz crystal oscillator allows the ADS1259EVM-PDK
software to recognize the EVM using the software provided.
7.2 Usage as a standalone EVM
If using the EVM in your own system and not with the PDK hardware and software, switch S4 can be used
to select the clock. The switch can be used to select the 7.3728MHz crystal (through multiplexer U31) or
to allow the onboard oscillator to be enabled when S4 is set to ground.
8 EVM Operation
This section provides information on the analog input, digital control, and general operating conditions of
the ADS1259EVM.
8.1 Analog Input
A single-channel differential input source can be applied directly to J8 (top or bottom side) or through
signal-conditioning modules available for the modular EVM system. The input is connected through switch
S2 and through a low-pass filter (R1, R2, C10, C11, and C12) before reaching the ADS1259.
The common-mode voltage (VCOM) for the PGA280 input buffer is 2.5V supplied from the REFOUT of the
ADS1259, the VCOM pin at the analog header (J8.15), or a voltage divider set to AVDD/2. This
configuration can be selected through switch S3.
8.2 Digital Control
The digital control signals can be applied directly to J7 (top or bottom side). The modular ADS1259EVM
can also be connected directly to a DSP or microcontroller interface board, such as the 5-6k Interface or
HPA-MCU Interface boards available from Texas Instruments, or the MMB0 if purchased as part of the
ADS1259EVM-PDK. For a list of compatible interface and/or accessory boards for the EVM or the
ADS1259, see the relevant product folder on the TI web site. Some of the digital signals are controlled
directly with pins on J7.
Other pins on the ADS1259 may be accessed via J7 through J2, J3, and J4. The ADS1259EVM-PDK
uses the PGA280 external chip select function to control the ADS1259; therefore, these jumpers must be
set to allow for access through J7.
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8.3 Default Jumper Settings and Switch Positions
Jumpers connect the power supplies and enable PGA280 control of the ADS1259. J1, J2, J3, and J4 are
all set to the left and connect the PGA280 to ADS1259. All the jumpers on J6 and J10 are used to connect
power supplies and grounds. J15 is used to short the inputs together during an offset calibration. Figure 7
shows the jumpers found on the EVM and the respective factory default conditions for each.
Figure 7. ADS1259EVM Default Jumper Positions
Four switches are used on the ADS1259/PGA280. Three-way switch S1 is set to the center position,
setting the output common-mode of the PGA280 to AVDD/2. Switch S2 is set to the right, connecting the
ADS1259 reference to the EVM onboard reference. Three-way switch S3 is set to the right to allow for
calibration of the ADS1259, through jumper J15. Finally, three-way switch S4 is set to the left connecting
the ADS1259 to the onboard oscillator. Figure 8 illustrates the switches on the EVM and the respective
factory default configurations for each.
Figure 8. ADS1259EVM Default Switch Positions
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9 ADS1259EVM-PDK Operation
This section provides information on using the ADS1259EVM-PDK, including setup, program installation,
and program usage.
To prepare to evaluate the ADS1259 with the ADS1259EVM-PDK, complete the following steps:
Step 1. Install the ADCPro software (if not already installed) on a PC.
Step 2. Install the ADS1259EVM-PDK EVM plug-in software.
Step 3. Set up the ADS1259EVM-PDK.
Step 4. Connect a proper power supply or use the included AC adapter.
Step 5. Complete the NI-VISA™ USB driver installation process.
Step 6. Run the ADCPro software.
Step 7. Complete the Microsoft Windows USB driver installation process.
Each task is described in the subsequent sections of this document.
9.1 Installing the ADCPro Software
CAUTION
Do not connect the ADS1259EVM-PDK before installing the software on a
suitable PC. Failure to observe this caution may cause Microsoft Windows to
not recognize the ADS1259EVM-PDK.
The latest software is available from the TI website at http://www.ti.com. The CD-ROM shipped with the
ADS1259EVM may not contain the latest software, but the ADCPro installer will check for updates when
executed (if connected to the Internet), and then give you the option of downloading and installing the
latest version. Refer to the ADCPro User's Guide for instructions on installing and using ADCPro.
To install the ADS1259EVM-PDK plug-in, run the file: ADS1259EVM-pdk-plug-in-1.0.0.exe (1.0.0 is the
version number, and increments with software version releases; you may have a different version on your
CD). Double-click the file to run it; then follow the instructions shown. You can also utilize the ADCPro
Update Check feature to check for newer versions of the ADS1259EVM-PDK plug-in, once you have
installed one version of it.
Installation for the ADS1259EVM plug-in should be relatively straightforward. The plug-in comes as an
executable file. Once started, the program leads the user through the screens shown in Figure 9 through
Figure 12.
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Figure 9. ADS1259EVM-PDK Setup Wizard: Screen 1
Figure 10. ADS1259EVM-PDK Setup Wizard: Screen 2
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Figure 11. ADS1259EVM-PDK Setup Wizard: Screen 3
Figure 12. ADS1259EVM-PDK Setup Wizard: Screen 4
The software should now be installed, but the USB drivers may not yet have been loaded by the PC
operating system. This step completes when the ADCPro software is executed; see Section 9.4,Running
the Software and Completing Driver Installation.
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9.2 Setting Up the ADS1259EVM-PDK
The ADS1259EVM-PDK contains both the ADS1259EVM and the MMB0 motherboard; however, the
devices are shipped unconnected. Follow these steps to set up the ADS1259EVM-PDK:
Step 1. Unpack the ADS1259EVM-PDK package.
Step 2. Set the jumpers and switches on the MMB0 as shown in Figure 13.
• Set the Boot Mode switch to USB.
• Connect +5V and +5VA on jumper block J13 (if +5V is supplied from J14 +5VA).
• Leave +5V and +5VA disconnected on jumper block J13.
• If the PDK will be powered from an ac adapter, connect J12. If the PDK will be powered
through the terminal block, disconnect J12 (see Section 9.3 for details on connecting the
power supply).
Figure 13. MMB0 Initial Configuration
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space
Step 3. Plug the ADS1259EVM into the MMB0 as Figure 14 illustrates.
CAUTION
Do not misalign the pins when plugging the ADS1259EVM into the MMB0.
Check the pin alignment carefully before applying power to the PDK.
Figure 14. Connecting the ADS1259EVM to the MMB0
9.2.1 About the MMB0
The MMB0 is a Modular EVM System motherboard. It is designed around the TMS320VC5507, a DSP
with an onboard USB interface from Texas Instruments. The MMB0 also has 16MB of SDRAM installed.
The MMB0 is not sold as a DSP development board, and it is not available separately. TI cannot offer
support for the MMB0 except as part of an EVM kit. For schematics or other information about the MMB0,
contact Texas Instruments.
16 ADS1259EVM, ADS1259EVM-PDK SBAU163A–March 2010–Revised April 2010
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J13
POWER
SUPPLY
CONFIG
J12
WALL SUPPLY CONNECTION
J2
AC ADAPTER INPUT
J14
POWER
INPUT +10V
-10V
www.ti.com ADS1259EVM-PDK Operation
9.3 Connecting the Power Supply
The ADS1259EVM-PDK can be operated with a combination of +5V and bipolar (±10V to ±15V) supply.
When the MMB0 DSP is powered properly, LED D2 glows green. The green light indicates that the 3.3V
supply for the MMB0 is operating properly. (It does not indicate that the EVM power supplies are
operating properly.)
9.3.1 Using the +6V Wall Supply for +5V
An ac adapter can be connected to barrel jack J2 on the MMB0. J2 is located next to the USB connector.
The adapter must output 6V to 7V dc. The connector must be sleeve-negative, tip-positive. It should have
a current rating of at least 2A.
Jumper J12 on the MMB0 connects a wall-mounted power supply to the board. To use the wall-mount
supply, J12 must be shorted. Figure 15 illustrates how to connect an ac adapter to the MMB0.
Figure 15. Using the +6V Wall Supply for +5V
17
SBAU163A–March 2010–Revised April 2010 ADS1259EVM, ADS1259EVM-PDK
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J13
POWER
SUPPLY
CONFIG
J14
POWER
INPUT
J12
WALL SUPPLY DISCONNECT
GND
+5VDC
(OPTIONAL) 5VDC-
+10V
-10V
ADS1259EVM-PDK Operation www.ti.com
9.3.2 Using an External Supply for +5V
A laboratory power supply can be connected through terminal block J14 on the MMB0, as shown in
Figure 16. Both unipolar and bipolar configurations are supported.
Figure 16. MMB0 Configured for Lab Power Supply
To use a lab power-supply configuration:
• Disconnect J12 on the MMB0.
• Connect a +5V dc supply to the +5VA terminal on J14.
• Connect ground of the dc supply to the GND terminal on J14.
• Connect a –10V dc supply to the –VA, and +10V on the +VA terminals on J14.
For bipolar mode, connect at –5V supply to –5VA.
It is not necessary to connect a +5V dc supply voltage to the +5VA terminal on J14 if the +5V/+5VA
position on J13 is shorted.
18 ADS1259EVM, ADS1259EVM-PDK SBAU163A–March 2010–Revised April 2010
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www.ti.com ADS1259EVM-PDK Operation
9.4 Running the Software and Completing Driver Installation
NOTE: The software is continually under development. These instructions and screen images are
current at the time of this writing, but may not exactly match future releases.
The program for evaluating the ADS1259EVM-PDK is called ADCPro. This program uses plug-ins to
communicate with the EVM. The ADS1259EVM-PDK plug-in is included in the ADS1259EVM-PDK
package.
The program currently runs only on Microsoft Windows platforms of Windows XP; Windows Vista and
Windows 7 are NOT supported.
If this is the first time installing ADCPro and plug-ins, follow these procedures to run ADCPro and
complete the necessary driver installation. Make sure the ADCPro software and device plug-in software
are installed from the CD-ROM as described in Section 9.1.
9.4.1 NI-VISA USB Device Driver Installation
1. After the ADCPro software is installed, apply power to the PDK and connect the board to an available
PC USB port.
2. The computer should recognize new hardware and begin installing the drivers for the hardware.
Figure 17 through Figure 20 are provided for reference to show the installation steps.
• For the first screen, Figure 17, it is not necessary to search for the software; it has already been
installed on your PC.
• For the remaining steps, accept the default settings.
Figure 17. NI-VISA Driver Installation Wizard, Screen 1
19
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ADS1259EVM-PDK Operation www.ti.com
Figure 18. NI-VISA Driver Installation Wizard, Screen 2
Figure 19. NI-VISA Driver Installation Wizard, Screen 3
20 ADS1259EVM, ADS1259EVM-PDK SBAU163A–March 2010–Revised April 2010
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