United Electronic Industries DNA-AI-208 User manual

i
DNA/DNR-AI-208
Strain Gauge Analog Input Layer
—
User Manual
18-bit, 8-channel, 4- and 6-wire Strain Gauge
Differential Input Layers
for the PowerDNA Cube and RACKtangle chassis
November 2013 Version 4.6
PN Man-DNx-AI-208-1113
© Copyright 1998-2010 United Electronic Industries, Inc. All rights reserved.

ii
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from its use.
All product names listed are trademarks or trade names of their respective companies.
See UEI’s website for complete terms and conditions of sale:
http://www.ueidaq.com/company/terms.aspx
Contacting United Electronic Industries:
Mailing Address:
27 Renmar Avenue
Walpole, MA 02081
U.S.A.
For a list of our distributors and partners in the US and around the world, please see
http://www.ueidaq.com/partners/
Support:
Telephone: [phone]
Fax: [phone]
Also see the FAQs and online “Live Help” feature on our web site.
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Support [e-mail]
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FTP Site ftp://ftp.ueidaq.com
Product Disclaimer:
WARNING!
DO NOT USE PRODUCTS SOLD BY UNITED ELECTRONIC INDUSTRIES, INC. AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
Products sold by United Electronic Industries, Inc. are not authorized for use as critical components in
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NOTE: Specifications shown in this document may change from time to time. Check with UEI for
current status.

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Table of Contents
Chapter 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 The DNx-AI-208 Analog Input Layer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Device Architecture. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Layer Connectors and Wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4.1 Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.4.2 Analog Input Ground Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Chapter 2 Programming with the High Level API . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Creating a session . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Configuring Channels and Excitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Configuring the Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Reading Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.5 Cleaning-up the Session. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Chapter 3 Programming with the Low-Level API . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1 Configuration Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2 Channel List Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3 Layer-specific Commands and Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4 Using Layer in ACB Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.5 Using Layer in DMap mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Appendix A – Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
A.1 DNA-STP-AI-208 Screw Terminal Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
A.2 Other Accessories. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
A.3 Layer Calibration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Appendix B – Shunt Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
B.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
B.2 Theory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
B.3 Using Shunt Resistors on the AI-208 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
B.4 Configuring Framework for Shunt Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
B.5 Shunt Calibration in C++. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
B.6 Shunt Calibration in LabVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

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List of Figures
Chapter 1 — Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1-1 Photos of DNR and DNA-AI-208 Boards ....................................................................... 4
1-2 Block Diagram of DNx-AI-208 Device Architecture........................................................ 4
1-3 DB-37 I/O Connector Pinout.......................................................................................... 5
1-4 Recommended Ground Connections for Analog Inputs ................................................ 6
Chapter 2 — Programming with the High Level API. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
(None)
Chapter 3 — Programming with the Low-Level API. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
(None)
Appendix A – Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
A-1 Photo of DNA-STP-AI-208 Screw Terminal Panel....................................................... 18
A-2 Pinout Diagram for the DNA-STP-AI-208 .................................................................... 20
A-3 Single-Channel Wiring Diagram — Full-Bridge............................................................ 20
A-4 Single-Channel Wiring Diagram — Half-Bridge........................................................... 21
A-5 Single-Channel Wiring Diagram — Quarter-Bridge .................................................... 22
A-6 Physical Layout of STP-AI-208 Board ......................................................................... 23
Appendix B – Shunt Calibration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
B-1 Strain Gauge Bridge ....................................................................................................25
B-2 Strain Gauge with Shunt Resistance Rs Added .......................................................... 26
B-3 Using Shunt Resistors on the DNA-AI-208 Layer........................................................28

DNx-AI-208 Analog Input Layer
Chapter 1 1
Introduction
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Chapter 1 Introduction
This document outlines the feature set and use of the DNA/DNR-AI-208 strain
gauge analog input layer(s). The DNA version is used with the PowerDNA Core
Module, the DNR with the rack-mounted UeiDaq RACKtangle chassis This man-
ual describes the following products:
•DNA/DNR-AI-208, 18-bit, 8-channel, differential input, analog input
strain gauge layer board(s)
•DNA-STP-AI-208 Screw Terminal Panel Accessory Board, designed as
a convenient interface forconnecting full-, half, and quarter-bridge strain
gauge-type sensors to the DNA/DNR-AI-208 board.
•Accessory modules such as cables.
The DNR version is identical to the DNA version except that the DNR version is
designed to plug into a RACKtangle backplane instead of a Cube.
1.1 Organization This DNA/DNR-AI-208 User Manual is organized as follows:
• Introduction
This chapter provides an overview of DNA/DNR-AI-208 board/layer fea-
tures, accessories, and what you need to get started.
• DNx-AI-208 Layer
This chapter provides an overview of the device architecture, connec-
tivity, logic, and accessories for the DNA/DNR-AI-208 layer board.
• Programming with High-Level API
This chapter provides a general overview of procedures that show how
to create a session, configure the session, and generate output on a
DNA/DNR-AI-208 layer, working with the UeiDaq Framework High-
Level API.
• Programming with the Low-Level API
This chapter describes the Low-Level API commands for configuring
and using a DNA/DNR-AI-208 layer.
• Appendices:
A--Accessories
This appendix provides a list of accessories available for use with a
DNA/DNR-AI-208 layer.
B--Shunt Calibration Support in Framework
This appendix describes procedures for using Framework to perform
shunt calibration of strain gauges. It includes examples of C++ code and
LabVIEW procedures for shunt calibration.
• Index
This is an alphabetical index of topics covered in this manual.
NOTE: A glossary of terms used with the PowerDNA Cube and layers can be
viewed and/or downloaded from www.ueidaq.com

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Manual Conventions
To help you get the most out of this manual and our products, please note that
we use the following conventions:
Tips are designed to highlight quick ways to get the job done, or
reveal good ideas you might not discover on your own.
NOTE: Notes alert you to important information.
CAUTION! Caution advises you of precautions to take to avoid injury,
data loss, and damage to your boards or a system crash.
Text formatted in bold typeface generally represents text that should be entered
verbatim. For instance, it can represent a command, as in the following exam-
ple: “You can instruct users how to run setup using a command such as
setup.exe.”

DNx-AI-208 Analog Input Layer
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1.2 The
DNx-AI-208
Analog Input
Layer
This manual describes the DNA-AI-208 18-bit, 8-channel, Strain Gauge Analog
Input Board/Layer. It also describes the DNA-STP-208 Screw Terminal Panel
accessory board. The technical specifications for the DNA/DNR-AI-208 Analog
Input Layer are listed in Table 1-1.
Table 1-1. DNx-AI-208 Technical Specifications
Table 1-2. Offset and Gain Calibration Limits
Number of channels 8 (differential)
ADC resolution 18 bits
Sampling rate 1 S/s - 1 kS/s per channel
Input range ±10V
FIFO size 512 samples
Wiring scheme 4- and 6-wire (with Kelvin connection);
all channels share the same ground
Bridge configurations Full-Bridge
Half-Bridge (with ext. terminal panel)
Quarter-Bridge (with ext. terminal panel)
Bridge resistance 120Ω, 350Ω, 1000Ω, and custom
Input impedance 10MΩ in parallel with 50pF
Gains 1,2,4,8,10,20,40,80,100,200,400,800
Gain accuracy See Table 1-2.
Offset accuracy
Temperature drift
Offset drift
Gain drift
5μV/°C typ
30ppm/C° @ G=1, 45ppm/C° @ G=800
Shunt calibration Onboard (software selectable) - 256
steps fom 5K to 205K; External
Isolation 350 Vrms
Overvoltage protection -40V..+55V
Excitation voltage 1.5V - 10.05V (software selectable)
Excitation current 85 mA, per channel
Excitation type Pulsing (for overheating protection)
Power consumption bridge resistance/excitation dependent;
2.5W - 4.5W
Operating temp. (tested) -40°C to +85°C
Operating humidity 90%, non-condensing
Gain ±LSB±% mV
1 2 0.000763 0.152588
2 2 0.000763 0.076294
4 4 0.001526 0.076294
8 4 0.001526 0.038147
10 4 0.001526 0.030518
20 4 0.001526 0.015259
40 6 0.002289 0.011444
80 6 0.002289 0.005722
100 6 0.002289 0.004578
200 6 0.002289 0.002289
400 10 0.003815 0.001907
800 18 0.006866 0.001717

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Figure 1-1 is a photo of the DNA and DNR-AI-208 Layer boards.
Figure 1-1. Photos of DNR and DNA-AI-208 Boards
1.3 Device
Architecture The DNA/DNR-AI-208 Analog Input Layer board has eight individual analog
input channels. A Block Diagram of the board/layer is shown in Figure 1-2.
Figure 1-2 Block Diagram of DNx-AI-208 Device Architecture
1.4 Layer
Connectors
and Wiring
Two D/A converters produce excitation voltages. The first converter drives exci-
tation on even numbered channels, and the second one to odd numbered chan-
nels. Excitation voltage can be switched on and off on a per-channel basis.
When an AI-208 performs continuous acquisition, it applies voltage to the next
channel in the channel list while acquiring the current channel. This technique
gives a channel enough time to settle and limits current consumption and heat
dissipation by the layer.
DB-37 (female)
37-pin I/O connectors
120-pin DNA
Layer Position
bus connector
Jumpers
bus connector
120-pin DNR

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Chapter 1 5
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The AI-208 layer can measure voltage on every channel between the S- and S+
terminals (differential mode, channels 0-7), between the Px+ lines (channels
0x10-0x17) and signal ground, and between the PSx+ and signal ground (chan-
nels (0x20-0x27).
The AI-208 layer can also be used to measure signals from differential signal
sources other than bridges, using the S+ and S- terminals. In such application
situations, sensor excitation is usually not required. Precise measurement is
achieved through the useof more than 8 channels internally in the AI-208 board.
NOTE: For descriptions of connections used with quarter-, half-, and full-bridge
circuits, refer to Figure A-3, Figure A-4, and Figure A-5 in the
Appendix.
1.4.1 Connectors The pinout of the 37-pin connector for the DNA/DNR-AI-208 Layer board is
shown in Figure 1-3. A physical layout of the board is shown in Figure 1-3.
Figure 1-3. DB-37 I/O Connector Pinout
When using a long cable to a sensor, be sure to use the same gauge
wire for the excitation source, GND, and GND Sense lines.
External Trigger
(Input only)

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1.4.2 Analog Input
Ground
Connections
To avoid errors caused by common mode voltages on analog inputs, follow the
recommended grounding guidelines in Figure 1-4 below.
Figure 1-4. Recommended Ground Connections for Analog Inputs
Because all analog input channels in AI-201/202/207/208/225 layers are
isolated as a group, you can connect layer AGND to the ground of the signal
source and eliminate the resistors shown in Figure 1-4 for floating differential
input signals.
Input
Configuration
Type of Input
Floating Grounded
Typical Signal Sources:
Thermocouples
DC Voltage Sources
Instruments or sensors
with isolated outputs
Typical Signal Sources:
Instruments or sensors
with non-isolated outputs
Differential
Two resistors (10k <R< 100k) provide
return paths to ground for bias currents.
Single-Ended,
Ground
Referenced
+
_Ret AGnd
DNA
-
STP
-
37
,
AInX
V
in
Sig
DNA-STP-AI-U
+
_Ret AGnd
DNA-STP-AI-U
AInX
V
in
Sig
+
_Ret AGnd
DNA-STP-AI-U
AInX
V
in
Sig
+
_Ret AGnd
DNA-STP-AI-U
AInX
V
in
Sig
grounds are at the same potential.
Add this connection to ensure that both
NOT RECOMMENDED

DNx-AI-208 Analog Input Layer
Chapter 2 7
Programming with the High Level API
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Chapter 2 Programming with the High Level API
This chapter describes how to program the PowerDNA/DNR-AI-208 using
UeiDaq’s Framework High Level API.
Since Framework is object oriented; its objects can be manipulated in the same
manner using different development environments, such as Visual C++, Visual
Basic, or LabVIEW.
Although the following section focuses only on the C++ API, the concept is the
same no matter what programming language you use.
Please refer to the “UeiDaq Framework User Manual” for more information on
using other programming languages.
2.1 Creating a
session The Session object controls all operations on your PowerDNA device. There-
fore, the first task is to create a session object, as follows.
CUeiSession session;
2.2 Configuring
Channels
and
Excitation
Framework uses resource strings to select each device, subsystem and chan-
nels to use within a session.
The resource string syntax is similar to a web URL:
<device class>://<IP address>/<Device Id>/<Subsystem><Channel list>
For PowerDNA, the device class is pdna.
For example, the following resource string selects analog input channels 0,2,3,4
on device 1 at IP address 192.168.100.2:
“pdna://192.168.100.2/Dev1/Ai0,2,3,4”
The gain to be applied on each channel is specified with low and high input
limits.
For example, the AI-208 available gains are 1, 2, 4, 8, 10, 20, 40, 80,100, 200,
400, 800 and the maximum input range is [-10V, 10V].
To select a gain of 100, you must specify input limits of [-0.1V, 0.1V].
// Configure channels 0,1 to use a gain of 100 in
// differential mode
session.CreateAIChannel(“pdna://192.168.100.2/Dev0/Ai0,1”, -0.1, 0.1,
UeiAIChannelInputModeDifferential);
To program the excitation circuitry, you need to configure the channel list using
the session object method “CreateAIVExChannel” instead of “Cre-
ateAIChannel”.
This method also gives you the ability to select the bridge configuration you want
and to select whether or not you wish to obtain the acquired data already scaled
in mV/V (acquired voltage divided by actual excitation voltage), as follows:

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// Configure channels 0,1 to use a gain of 100 in
// differential mode, program the excitation to 10V and
// turn on scaling with excitation
session.CreateAIExChannel(“pdna://192.168.100.2/Dev0/Ai0,1”, -0.1,
0.1, UeiSensorFullBridge, 10.0, true,
UeiAIChannelInputModeDifferential);
2.3 Configuring
the Timing You can configure the AI-208 to run in simple mode (point by point) or buffered
mode (ACB mode).
In simple mode, the delay between samples is determined by software on the
host computer.
In buffered mode, the delay between samples is determined by the AI-208 on-
board clock.
The following sample shows how to configure the simple mode. Please refer to
the “UeiDaq Framework User’s Manual” to learn how to use the other timing
modes.
session.ConfigureTimingForSimpleIO();
2.4 Reading
Data Reading data from the AI-208 is done using a reader object. There is a reader
object to read raw data coming straight from the A/D converter. There is also a
reader object to read data already scaled to volts or mV/V.
The following sample code shows how to create a scaled reader object and read
samples.
// Create a reader and link it to the session’s stream
CUeiAnalogScaledReader reader(session.GetDataStream());
// read one scan, the buffer must be big enough to contain
// one value per channel
double data[2];
reader.ReadSingleScan(data);
2.5 Cleaning-up
the Session The session object will clean itself up when it goes out of scope or when it is
destroyed. However, you can also clean up the session manually (to reuse the
object with a different set of channels or parameters).
session.CleanUp();

DNx-AI-208 Analog Input Layer
Chapter 3 9
Programming with the Low-Level API
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Chapter 3 Programming with the Low-Level API
This section describes how to program the PowerDNA cube using the Low-level
API The low-level API offers direct access to PowerDNA DAQBios protocol and
also allows you to access device registers directly.
Werecommendthat,when possible, you use the UeiDaqFrameworkHigh-Level
API (see Chapter 2), because it is easier to use.
You should need to use the low-level API only if you are using an operating sys-
tem other than Windows.
3.1 Configuration
Settings Configuration settings are passed through the DqCmdSetCfg() and DqAc-
bInitOps() functions.
Not all configuration bits apply to the AI-208 layer.
The following bits are used:
#define DQ_LN_IRQEN (1L<<10) // enable layer irqs
#define DQ_LN_PTRIGEDGE1 (1L<<9) // stop trigger edge MSB
#define DQ_LN_PTRIGEDGE0 (1L<<8) // stop trigger edge: 00 -
software,
// 01 - rising, 02 - falling
#define DQ_LN_STRIGEDGE1 (1L<<7) // start trigger edge MSB
#define DQ_LN_STRIGEDGE0 (1L<<6) // start trigger edge: 00 -
software, 01 - rising,
// 02 - falling
#define DQ_LN_CLCKSRC1 (1L<<3) // CL clock source MSB
#define DQ_LN_CLCKSRC0 (1L<<2) // CL clock source 01 - SW, 10 -
HW, 11 -EXT
#define DQ_LN_ACTIVE (1L<<1) // "STS" LED status
#define DQ_LN_ENABLED (1L<<0) // enable operations
For streaming operations with hardware clocking, the user has to select the fol-
lowing flags:
DQ_LN_ENABLE | DQ_LN_CLCKSRC0 | DQ_LN_STREAMING | DQ_LN_IRQEN |
DQ_LN_ACTIVE
DQ_LN_ENABLE enables all layer operations.
DQ_LN_CLCKSRC0selects the internal channel list clock (CL) source as a time
base. The AI-208 layer supports the CL clock only where the time between con-
secutive channel readings is calculated by the rule of maximizing setup time per
channel. If you’d like to select the CL clock from an external clock source such
as the SYNCx line, set DQ_LN_CLCKSRC1 as well.
Aggregate rate = Per-channel rate * Number of channels

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Programming with the Low-Level API
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3.2 Channel List
Settings
Bit Name Purpose Macro
31 DQ_LNCL_NEXT Tells firmware that there is
a “Next Entry” in the
channel list
20 DQ_LNCL_TSRQ Request timestamp as the
next data point
11..8 Gain DQ_LNCL_GAIN()
7..0 Channel number
The AI-208 layer has a very simple channel list structure, as shown below:
Gains are different for different options of the AI-208 layer, as listed in the follow-
ing table.
NOTE: The Minimum Allowed Settling Time is the shortest time for which the
firmware allows a channel to settle. When the scan rate and channel are
programmed, the firmware allocates the minimum time foreach channel
depending on the gain selected, and then stretches the settling time as
much as possible to utilize at least 2/3 of the time between scan clocks.
3.3 Layer-
specific
Commands
and
Parameters
The AI-208 layer has a number of layer-specific functions, as follows.
•DqAdv208Read
This function uses DqReadAIChannel() but converts data using
internal knowledge of the input range and gain of every channel.
When this function is called for the first time, the firmware stops any
ongoing operation on the device specified and reprograms it in
accordance with the channel list supplied. This function uses the
preprogrammed CL update frequency – 10Hz. You can reprogram the
update frequency by calling the DqCmdSetClk() command after the
first call to DqAdv208Read().
Layer type Range Gain Gain
Number Min. Allowed Settling Time,
us
AI-201-208 ±10V 1 0 40
±5V 2 1 50
±2.5V 4 2 60
±1.25V 8 3 70
±1V 10 4 80
±500mV 20 5 100
±250mV 40 6 120
±125mV 80 7 140
±100mV 100 8 160
±50mV 200 9 180
±25mV 400 10 200
±12.5mV 800 11 220

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Date: November 2013 File: AI208 Chap3.fm
© Copyright 2009
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Therefore, you cannot call this function when the layer is involved in
any streaming or data mapping operations.
If you specify a short timeout delay, this function can time out when
called for the first time because it is executed as a pending command,
and layer programming takes up to 10ms.
Once this function is called, the layer continuously acquires data and
every “next call” function returns the latest acquired data
If you would like to cancel ongoing sampling, call the same function
with 0xFFFFFFFF as a channel number.
•DqAdv208SetControl
This function allows you to set up different internal parameters. The
following sub-functions are available:
DQL_IOCTL208_SET_Ra: set value for shunt calibration resistor
A in 256 steps (P+ to S+)
DQL_IOCTL208_SET_Rb: set value for shunt calibration resistor
B in 256 steps (S+ to P-).
DQL_IOCTL208_SET_EXC_A: set excitation DAC A.
DQL_IOCTL208_SET_EXC_B: set excitation DAC B.
DQL_IOCTL208_SET_EXC_CH: switch excitation channels on
or off.
•DqAdv208SetExcVoltage
Set excitation voltage for excitation sources A and B and measure it
back using specified channels. The AI-208 layer is capable of providing
two sources of excitation voltage — Excitation A is connected to even
channels and B is connected to odd channels. Excitation voltage can
be selected and set at any level from 1.5V to 10V. This function sets up
excitation voltage as close as possible to the requested level and reads
it back from the selected channels. The user can select either channels
0x10 through 0x17 to read the excitation voltage from the Px+ terminal
(four-wire connection), or channels 0x20 through 0x27 to read the
excitation voltage from PSx+terminals (six-wire connection). All
readings are performed relative to AGND. The user has to use the
read-back excitation voltage from the terminal because of DACs; there
is a voltage drop in the strain gauge leads and DAQ output quantization
error amounts to 1/1024 of the range.
Note that this function must be called before starting data acquisition or
reading channels in order to set up the proper excitation voltage source
before gathering data.
•DqAdv208ReadChannel
This function performs “raw” measurements of the following values:
0x0 .0x27:
DQL_IOCTL208_READ_AGND: connect both differential inputs of the PGA to
analog ground.
DQL_IOCTL208_READ_REF: read 2.5V voltage reference
DQL_IOCTL208_READ_Rs: measure switch resistance Rs
DQL_IOCTL208_READ_Rx: measure multiplexer resistance
DQL_IOCTL208_READ_Ra: measure shunt resistor Ra
DQL_IOCTL208_READ_Rb: measure shunt resistor Rb
DQL_IOCTL208_READ_SS: measure S+ to S-
DQL_IOCTL208_READ_PP: measure P+ to AGND
DQL_IOCTL208_READ_PS: measure PS+ to AGND

DNx-AI-208 Analog Input Layer
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Tel: [phone] www.ueidaq.com Vers: 4.6
Date: November 2013 File: AI208 Chap3.fm
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United Electronic Industries, Inc.
Because the resistance can differ from channel to channel (current is flowing
through different channels of the same multiplexer which can have different
resistances), you should set up the channel number to be used. This function
returns the number of samples requested for averaging. Data is returned in raw
format.
•DqAdv208MeasureParams
This function is used to measure a variety of AI-208 front-end
parameters (see channel equivalent diagram):
VrefReference voltage, Volts
VexcExcitation voltage, Volts
VsVmeas for Rs, Volts
RsSwitch resistance, Ohms
VxVmeas for Rx, Volts
RxMux resistance, Ohms
VaVmeas for Ra, Volts
RaResistance of shunt resistor Ra (plus 5k constant!), Ohms
VbVmeas for Rb, Volts
RbResistance of shunt resistor Rb (plus 5k constant!), Ohms
Before the function can measure these parameters, specify the
measurement conditions:
ChannelChannel being used for measurements
ExcAExcitation level A (even channels, 16 bit)
ExcBExcitation level B (odd channels, 16 bit)
RaShunt A level (8 bit, 256 positions from 0 to 200k)
RbShunt B level (8 bit, 256 positions from 0 to 200k)
The AI-208 layer has a 14-bit excitation DAC and an 8-bit shunt
calibration digital potentiometer. The digital potentiometer has a ±30%
initial resistance accuracy, 60-150 Ohm runner resistance, and a
35ppm temperature coefficient. Thus, measuring this resistor is crucial
for shunt calibration. An additional series resistor (4.99k 0.01%) is
inserted in the shunt calibration circuit to ensure precise measurement.
3.4 Using Layer
in ACB Mode Thisis a pseudo-codeexamplethat highlightsthesequenceof functions needed
to use ACB on the AI-208 layer. A complete example with error checking can be
found in the directory SampleACB208.
#include "PDNA.h"
// unit configuration word
#define CFG208 (DQ_LN_ENABLED \
|DQ_LN_ACTIVE \
|DQ_LN_CLCKSRC0 \
|DQ_LN_RAW32)
uint32 Config = CFG208;
STEP 1: Start DQE engine.
#ifndef _WIN32
DqInitDAQLib();
#endif

DNx-AI-208 Analog Input Layer
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// Start engine
DqStartDQEngine(1000*1, &pDqe, NULL);
// Open communication with IOM
hd0 = DqOpenIOM(IOM_IPADDR0, DQ_UDP_DAQ_PORT, TIMEOUT_DELAY,
&RdCfg);
// Receive IOM crucial identification data
DqCmdEcho(hd0, DQRdCfg);
// Set up channel list
for (n = 0; n < CHANNELS; n++) {
CL[n] = n;
}
STEP 2: Create and initialize host and IOM sides.
// Now we are going to test device
DqAcbCreate(pDqe, hd0, DEVN, DQ_SS0IN, &bcb);
// Let’s assume that we are dealing with AI-208 device
dquser_initialize_acb_structure();
// Now call the function
DqAcbInitOps(bcb,
&Config,
0, //TrigSize,
NULL, //pDQSETTRIG TrigMode,
&fCLClk,
0, //float* fCVClk,
&CLSize,
CL,
0, //uint32* ScanBlock,
&acb);
printf("Actual clock rate: %f\n", fCLClk);
// Now set up events
DqeSetEvent(bcb,
DQ_eFrameDone|DQ_ePacketLost|DQ_eBufferError|DQ_ePacketOOB);
STEP 3: Start operation.
// Start operations
DqeEnable(TRUE, &bcb, 1, FALSE);
STEP 4: Process data.
// We will not use event notification at first - just retrieve scans
while (keep_looping) {
DqeWaitForEvent(&bcb, 1, FALSE, EVENT_TIMEOUT, &events);
if (events & DQ_eFrameDone) {
minrq = acb.framesize;

DNx-AI-208 Analog Input Layer
Chapter 3 14
Programming with the Low-Level API
Tel: [phone] www.ueidaq.com Vers: 4.6
Date: November 2013 File: AI208 Chap3.fm
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United Electronic Industries, Inc.
avail = minrq;
while (TRUE) {
DqAcbGetScansCopy(bcb, data, acb.framesize,
acb.framesize,
&size, &avail);
samples += size*CHANNELS;
for (i = 0; i < size * CHANNELS; i++) {
fprintf(fo, "%f\t", *((float*)data + i));
if ((i % CHANNELS) == (CHANNELS - 1)) {
fprintf(fo, "\n");
}
}
printf("eFD:%d scans received (%d samples) min=%d
avail=%d\n", size,
samples, minrq, avail);
if (avail < minrq) {
break;
}
}
}
}
STEP 5: Stop operation.
DqeEnable(FALSE, &bcb, 1, FALSE);
STEP 6: Clean up.
DqAcbDestroy(bcb);
DqStopDQEngine(pDqe);
DqCloseIOM(hd0);
#ifndef _WIN32
DqCleanUpDAQLib();
#endif
3.5 Using Layer
in DMap
mode
#include "PDNA.h"
STEP 1: Start DQE engine.
#ifndef _WIN32
DqInitDAQLib();
#endif
// Start engine
DqStartDQEngine(1000*10, &pDqe, NULL);
// open communication with IOM
hd0 = DqOpenIOM(IOM_IPADDR0, DQ_UDP_DAQ_PORT, TIMEOUT_DELAY,
&DQRdCfg);
// Receive IOM crucial identification data
DqCmdEcho(hd0, DQRdCfg);

DNx-AI-208 Analog Input Layer
Chapter 3 15
Programming with the Low-Level API
Tel: [phone] www.ueidaq.com Vers: 4.6
Date: November 2013 File: AI208 Chap3.fm
© Copyright 2009
United Electronic Industries, Inc.
for (i = 0; i < DQ_MAXDEVN; i++) {
if (DQRdCfg->devmod[i]) {
printf("Model: %x Option: %x\n", DQRdCfg->devmod[i],
DQRdCfg->option[i]);
} else {
break;
}
}
STEP 2: Create and initialize host and IOM sides.
DqDmapCreate(pDqe, hd0, &pBcb, UPDATE_PERIOD, &dmapin, &dmapout);
STEP 3: Add channels into DMap.
for (i = 0; i < CHANNELS; i++) {
DqDmapSetEntry(pBcb, DEVN, DQ_SS0IN, i, DQ_ACB_DATA_RAW, 1,
&ioffset[i]);
}
DqDmapInitOps(pBcb);
DqeSetEvent(pBcb,
DQ_eDataAvailable|DQ_ePacketLost|DQ_eBufferError|DQ_ePacketOOB);
STEP 4: Start operation.
DqeEnable(TRUE, &pBcb, 1, FALSE);
STEP 5: Process data.
while (keep_looping) {
DqeWaitForEvent(&pBcb, 1, FALSE, timeout, &eventsin);
if (eventsin & DQ_eDataAvailable) {
datarcv++;
printf("\ndata ");
for (i = 0; i < CHANNELS; i++) {
printf("%04x ", *(uint32*)ioffset[i]);
}
}
}
STEP 6: Stop operation.
DqeEnable(FALSE, &pBcb, 1, FALSE);
STEP 7: Clean up.
DqDmapDestroy(pBcb);
DqStopDQEngine(pDqe);
DqCloseIOM(hd0);
#ifndef _WIN32
DqCleanUpDAQLib();
#endif

DNx-AI-208 Analog Input Layer
Chapter 3 16
Programming with the Low-Level API
Tel: [phone] www.ueidaq.com Vers: 4.6
Date: November 2013 File: AI208 Chap3.fm
© Copyright 2009
United Electronic Industries, Inc.