Vertilon SIB164B-1018 User manual

User Guide
Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
SIB164B-1018
64 Channel MAPMT Interface Board
Hamamatsu H7546B / H12428 Series

User Guide
Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Disclaimer
Vertilon Corporation has made every attempt to ensure that the information in this document is accurate and complete.
Vertilon assumes no liability for errors or for any incidental, consequential, indirect, or special damages including,
without limitation, loss of use, loss or alteration of data, delays, lost profits or savings, arising from the use of this
document or the product which it accompanies.
Vertilon reserves the right to change this product without prior notice. No responsibility is assumed by Vertilon for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication
or otherwise under the patent and proprietary information rights of Vertilon Corporation.
Copyright Information
© 2018 Vertilon Corporation
ALL RIGHTS RESERVED

User Guide
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com

SIB164B-1018 Sensor Interface Board for Hamamatsu H7546B / H12428 MAPMT
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Table of Contents
General Safety Precautions .....................................................................................................................6
Product Overview .....................................................................................................................................7
Specifications ...........................................................................................................................................9
Typical Setup ..........................................................................................................................................11
High Voltage Interface............................................................................................................................11
Photomultiplier Tube Anode Circuit .....................................................................................................12
Last Dynode Output Preamplifier..........................................................................................................13
Leading Edge Discriminator .................................................................................................................. 13
Zero Slope Discriminator....................................................................................................................... 14
Top and Bottom Views...........................................................................................................................15
Component Locations and Functions ..................................................................................................16
Mechanical Information.......................................................................................................................... 18

User Guide
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
List of Figures
Figure 1: Functional Block Diagram...........................................................................................................8
Figure 2: Typical Setup............................................................................................................................11
Figure 3: H7546B / H12428 High Voltage Interface Circuit......................................................................11
Figure 4: Resistive Anger Logic Circuit....................................................................................................12
Figure 5: Leading Edge Discriminator Timing..........................................................................................13
Figure 6: Zero Slope Discriminator Timing...............................................................................................14
Figure 7: Top and Bottom Views..............................................................................................................15
Figure 8: Component Locations and Functions .......................................................................................16
Figure 9: SIB164B-1018 Printed Circuit Board Dimensions.....................................................................18
List of Tables
Table 1: Specifications.............................................................................................................................10
Table 2: Connectors ................................................................................................................................17
Table 3: Jumpers.....................................................................................................................................17
Table 4: Test Points.................................................................................................................................17

SIB164B-1018 Sensor Interface Board for Hamamatsu H7546B / H12428 MAPMT
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
General Safety Precautions
Use Proper Power Source
The SIB164B-1018 is powered with a +5V power source directly from Vertilon’s PhotoniQ multi-channel data acquisition
systems. Use with any other power source may result in damage to the product.
Operate Inputs within Specified Range
To avoid electric shock, fire hazard, or damage to the product, do not apply a voltage to any input outside of its specified
range.
Electrostatic Discharge Sensitive
Electrostatic discharges may result in damage to the SIB164B-1018. For this reason, the SIB164B-1018 board is
intended to be operated in a user’s conductive instrument enclosure.
Do Not Operate in Wet or Damp Conditions
To avoid electric shock or damage to the product, do not operate in wet or damp conditions.
Do Not Operate in Explosive Atmosphere
To avoid injury or fire hazard, do not operate in an explosive atmosphere.

User Guide
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Product Overview
The SIB164B-1018 multianode photomultiplier tube interface board provides the mechanical and electrical connectivity
between the Hamamatsu H7546B / H12428 64 anode PMT and external signal processing electronics such as Vertilon’s
PhotoniQ multichannel data acquisition systems. The MAPMT is mounted to the bottom side of the SIB164B-1018
through 66 socket pins that connect the PMT’s 64 anode signals, last dynode output, and high voltage input to the board.
The high voltage bias to the PMT is supplied through the SIB164B-1018 on a specialized cable from the PhotoniQ. The
anode signals are routed to an on-board resistive anger logic circuit that generates four anger signal outputs. These
outputs connect using four coaxial cables to Vertilon’s PhotoniQ IQSP418 or IQSP518 multichannel data acquisition
system where the charge from each is separately integrated, digitized, and sent to a PC for display or further signal
processing. For applications utilizing the last dynode output of the PMT, the SIB164B-1018 includes a two stage high
speed preamplifier whose output is available on an SMB connector. One of two on-board discriminators can be used with
the last dynode signal to generate a trigger to the data acquisition system or other external electronics. The outputs from
a leading edge and zero slope discriminator — which respectively generate trigger signals based on threshold and pulse
peak — are available on SMB connectors. Several user adjustments are included for optimizing system gain and trigger
thresholds for the discriminators.
The various functions on the SIB164B-1018 are described in greater detail on the following pages. When necessary, refer
to the functional block diagram shown in Figure 1 below.
Mounting board for Hamamatsu 64 channel MAPMTs
Compatible with Hamamatsu H7546B and H12428 devices
Includes anger logic for interface to data acquisition systems
High speed preamplifier for last dynode output
Leading edge and zero slope discriminators
Adjustable gain and discriminator thresholds
Separate high voltage input for MAPMT cathode bias
100% compatible with Vertilon’s PhotoniQ multichannel DAQs

SIB164B-1018 Sensor Interface Board for Hamamatsu H7546B / H12428 MAPMT
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Figure 1: Functional Block Diagram
P1
P2
P3
P31
P35
P63
P64
P34
P33
P32
P1
P2
P3
P31
P32
P35
P63
P64
P34
P33
VERTILON SIB164B-1018
H7546B / H12428 MAPMT
SENSOR INTERFACE BOARD
AMP1
Rp
GAIN
ADJ
Cin INV
AMP2
INV
AMP3
COMP >
D Q
CLR
COMP
LEADING
EDGE
DISCR
PREAMP
OUT
dv
dt
INV
AMP4
DISCR
64 to 4
ANGER LOGIC
-HV INPUT
J6
J8
J9
J1
Rin
HIGH VOLTAGE BIAS
INTERFACE CIRCUIT
LEADING EDGE
THRESHOLD
DISCR ADJ
J7
DISCRIMINATOR
THRESHOLD
HAMAMATSU
H7546B / H12428
8 X 8 MULTIANODE
PHOTOMULTIPLIER TUBE
ANODES
DY12
DY11
DY10
DY9
DY8
DY7
DY6
DY5
DY4
DY3
DY2
DY1
K
HIGH VOLTAGE NETWORK
OPTIONAL
CONNECTION
V1
J2
V2
V3
V4
J3
J4
J5
TRIM ADJ

User Guide
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Specifications
(Vsupply = +5.0V, TA= +25C, unless otherwise noted)
Description Sym Min Typ Max Units Notes
HIGH VOLTAGE
High Voltage Input Load Resistance 50 MMeasured at high voltage input connector, J1
ANODE CIRCUITS
Quantity P1 - P64 64
Input Bias Voltage +0.250 V Detector bias voltage supplied from PhotoniQ data
acquisition system
LAST DYNODE PREAMPLIFIER
Input Coupling Capacitance Cin 0.1 uF
Input Resistance Rin 50 
Input Parallel Resistance Rp500 
Amplifier #1 Gain A1 14.0 dB
Vin is a triangular pulse (18 nsec rise time, 30 nsec fall time)
applied to preamplifier input at DY12.
Amplifier #2 Inverting Gain A2 6 dB
Amplifier #2 Output Impedance 50 Measured at preamplifier output, J6
LEADING EDGE DISCRIMINATOR
Threshold Adjustment (External) Vth1 -100 0 mV Referenced to baseline level at comparator input. Controlled
using DSCR ADJ on J7 (+2.5V to +3.0V).
Threshold Adjustment (Internal) Vth1 -50 0 mV Referenced to baseline level at comparator input. Controlled
using potentiometer VR1.
Threshold to Output Delay (Vin=30mV) td1 5 nsec
Output on connector, J8.
Vin is a triangular pulse (18 nsec rise time, 30 nsec fall time)
applied to preamplifier input at DY12. Threshold (Vth1) set to
15mV below the baseline.
Time Walk (Vin: 3mV to 30mV) -13 nsec
Time Walk (Vin: 30mV to 150mV) -3.0 nsec
Jitter (Vin: 10mV) 1 nsec
ZERO SLOPE DISCRIMINATOR
Differentiator First-Order Time Constant 3.3 nsec
Amplifier #4 Inverting Gain A4 10.4 dB
Threshold Adjustment Vth3 0 +100 mV Referenced to baseline level at comparator input. Controlled
using DSCR ADJ on J7 (+2.5V to +2.0V).
Threshold to Output Delay (Vin=30mV) td3 7 nsec
Output on connector, J9.
Vin is a triangular pulse (18 nsec rise time, 30 nsec fall time)
applied to preamplifier input at DY12. Threshold (Vth3) set to
5mV above the baseline.
Time Walk (Vin: 20mV to 150mV) -3.0 nsec
Jitter (Vin: 100mV) 500 psec

SIB164B-1018 Sensor Interface Board for Hamamatsu H7546B / H12428 MAPMT
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Description Sym Min Typ Max Units Notes
DISCRIMINATOR OUTPUTS
Output Impedance 50 
Logic High Output Level VOH +4.3 +4.8 V (IOH = -32mA)
Logic Low Output Level VOL +0.2 +0.6 V (IOL = 32mA)
POWER
Supply Voltage Vsupply +4.9 +5.0 +5.1 V
Supply Current Isupply 67 mA (both discriminators enabled)
Supply Current Isupply 53 mA (both discriminators disabled)
DIMENSIONS
Width W 84 mm
Length L 102 mm (not including SMB connectors which extend past PCB edge)
Thickness T 2.5 mm (printed circuit board only)
Table 1: Specifications

User Guide
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Typical Setup
A typical setup using a SIB164B-1018 is shown below. Although a Hamamatsu H12428 is used in the example, an
H7546B is equally applicable. A MAPMT is mounted to the SIB164B-1018 and positioned to detect incoming light from a
scintillator crystal or optical assembly. The four anger logic outputs from the SIB164B-1018 connect to four inputs on a
PhotoniQ IQSP418 or IQSP518 multichannel PMT data acquisition system. Digitized output data from the PhotoniQ is
sent through a USB 2.0 connection to a PC for display, logging, or real time processing. Additional connections between
the SIB164B-1018 and PhotoniQ provide a discriminator threshold adjustment signal to the SIB164B-1018 and a trigger
to the PhotoniQ from one of the SIB164B-1018’s two discriminators. A high voltage bias of up to negative 1000 volts is
sent through the SIB164B-1018 to the PMT from an SHV connector located on the rear of the PhotoniQ. Note that the
rear panel high voltage output is an optional configuration on the IQSP418 and IQSP518.
Figure 2: Typical Setup
High Voltage Interface
A direct connection is be made between the PMT’s bias voltage pins and the SIB164B-1018 high voltage input as shown
in the interface circuit below. A specialized high voltage cable is used to supply the bias from the PhotoniQ to the
proprietary high voltage connector on the SIB164B-1018. Control of the PMT bias is accomplished through the
PhotoniQ’s graphical user interface.
Warning: The high voltage section of the SIB164B-1018 contains signals at voltage levels
that can exceed negative 1000 volts. Never touch a component or signal in this area.
Figure 3: H7546B / H12428 High Voltage Interface Circuit

SIB164B-1018 Sensor Interface Board for Hamamatsu H7546B / H12428 MAPMT
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Photomultiplier Tube Anode Circuit
The 64 anode signals (P1 – P64) from the H7546B / H12428 MAPMT are routed directly on the SIB164B-1018 to the
resistive anger logic circuit shown in the figure below. The four outputs labeled V1 to V4 are available on SMB connectors
on the edge of the printed circuit board. These signals connect directly to a charge integrating data acquisition system like
a Vertilon PhotoniQ IQSP418 or IQSP518. The PhotoniQ utilizes DC-coupled high speed transimpedance amplifiers that
maintain a DC bias voltage of +0.250 volts on each of its inputs. For this reason it is important that all four outputs from
the SIB164B-1018 are directly connected to the PhotoniQ inputs — no additional interface circuitry is necessary.
Figure 4: Resistive Anger Logic Circuit

User Guide
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Last Dynode Output Preamplifier
This preamplifier is an inverting, AC-coupled, two-stage configuration designed for small positive voltage pulses from the
last dynode output of the H7546B / H12428. Connection of the PMT’s last dynode output to the preamplifier is made at
JP1 using a jumper. The preamplifier’s output is further processed on the SIB164B-1018 by two different discriminators to
generate trigger signals synchronized with pulses on the last dynode output. For specialized applications requiring
external discrimination of the last dynode signal, the preamplifier output is available on SMB connector, J6. When the
preamplifier is not required, jumper JP1 should be left open.
Leading Edge Discriminator
The leading edge discriminator is a simple timing circuit that generates a trigger signal when a charge pulse on the last
dynode output from the H7546B / H12428 exceeds a user-defined threshold. It is implemented using a high speed
comparator connected to the output of the last dynode output preamplifier. Referring to Figure 5, negative going pulses
from the preamplifier are compared to a threshold that is adjusted using either the trimmer pot on the SIB164B-1018 or
an external DC voltage source. The adjustment method is selected with jumper JP4. When the trimmer pot is selected,
the leading edge discriminator threshold is determined by the on-board potentiometer VR1 (LEAD). For the external
control, the threshold is set though SMB connector J7 (DSCR ADJ) which normally connects to the front panel DAC on
the PhotoniQ. Since the signal baseline for the SIB164B-1018 discriminators is nominally +2.50V, the threshold should be
adjusted slightly below this baseline voltage (see the specifications table for the scaling factor for the external threshold
adjustment). A logic high is generated on the comparator output J8 (LEAD) after a small delay (td1) from when the pulse
first crosses the threshold, Vth1. The comparator switches back to a logic low when the pulse crosses the threshold from
the opposite direction as it returns back to the baseline level. Because the trigger point is sensitive to the pulse height,
this discriminator is typically used in applications that do not require precision timing. When not used, the leading edge
discriminator should be disabled by placing jumper JP7 into the left position.
Figure 5: Leading Edge Discriminator Timing
PREAMP
OUTPUT
Vth1
td1
TRIGGER
POINT
THRESHOLD
POINT
LEAD
LAST
DYNODE
OUTPUT

SIB164B-1018 Sensor Interface Board for Hamamatsu H7546B / H12428 MAPMT
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Zero Slope Discriminator
The zero slope discriminator (ZSD) works by generating a trigger signal at the inflection point of the input pulse. It is
at this point where the pulse is at its peak and its slope transitions from positive to negative. Since AMP4 effectively
operates on the derivative of the input pulse, its output crosses zero where the slope of the pulse is zero. This occurs
at the threshold point shown in Figure 6. The threshold comparator compares AMP4 to the user-adjustable threshold
(Vth3) to generate the trigger signal. Similar to the constant fraction discriminator, the threshold for the zero slope
discriminator is referenced to +2.50V and controlled by the PhotoniQ DAC signal fed into DSCR ADJ on connector
J7. The zero slope discriminator is selected by placing jumper JP11 into the lower position and enabling the leading
edge discriminator. Jumper JP8 is used to disable both the zero slope and constant fraction discriminators by
inserting it into the left position.
Figure 6: Zero Slope Discriminator Timing
PREAMP
OUTPUT
Vth3
td3
TRIGGER
POINT
THRESHOLD
POINT
ZERO
LAST
DYNODE
OUTPUT
AMP4
Vth1
RESET
POINT

User Guide
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Top and Bottom Views
Figure 7: Top and Bottom Views
1. High Voltage Input (J1) 6. Leading Edge Discriminator Output (J8)
2. +5V Power Input (J10) 7. ZSD Discriminator Output (J9)
3. Anger Logic Outputs (J2 – J5) 8. MAPMT High Voltage Bias Circuit
4. Last Dynode Preamp Output (J6) 9. H7546B / H12428 Anode & Dynode Connectors
5. Discriminator Threshold Adjustment (J7) 10. H7546B / H12428 High Voltage Connector
4
7
8
3 5 6
9
1
2
10

SIB164B-1018 Sensor Interface Board for Hamamatsu H7546B / H12428 MAPMT
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Component Locations and Functions
Figure 8: Component Locations and Functions
DL1
JP13
JP12
JP10
JP9
JP6
JP5
JP2
JP1
U3
U2
U7U6
VR1
U8 U9
U5U4
JP11
JP3
JP4
JP8JP7
J10
P2
P6
P4
P5
P3
P13
P11
P12
P10P9P8P7
P1
J1
J9J8J7J3 J4
J2 J5 J6

User Guide
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Name Function Description
J1 -HV Optional negative high voltage bias input
J2 V1 Anger logic V1 output, anode P8
J3 V2 Anger logic V2 output, anode P64
J4 V3 Anger logic V3 output, anode P57
J5 V4 Anger logic V4 output, anode P1
J6 PREAMP Last dynode preamplifier output
J7 DSCR ADJ Threshold adjustment input for discriminators
J8 LEAD Leading edge discriminator output
J9 DSCR Zero slope discriminator output
J10 POWER Power supply input, +5V
Table 2: Connectors
Name Function Description
JP1 DY12 Last dynode jumper to preamplifier
JP3 GAIN N/A
JP4 LEAD VTH Select for leading edge discriminator threshold input
(upper position = potentiometer, lower position = external)
JP11 DSCR SEL Discriminator select (lower position = ZSD)
JP2, JP5,
JP6, JP9,
JP10, JP12,
JP13
Reserved N/A
JP7 C1 SHDN Power to leading edge discriminator (left position = disabled)
JP8 C2 SHDN Power to ZSD discriminator (left position = disabled)
Table 3: Jumpers
Name Ref # Description
-HV P1 MAPMT cathode bias. Warning: This is a high voltage point that can exceed negative 1000 volts.
DELAY P2 N/A
AMP1 P3 Output of amplifier #1 of last dynode output signal processing chain.
AMP3 P4 N/A
AMP2 P5 Output of amplifier #2 of last dynode output signal processing chain.
AMP4 P6 Output of amplifier #4 of zero slope discriminator.
LEAD P7, P8 Leading edge discriminator comparator output, positive (+) and negative (-).
DSCR P9, P10 Zero slope discriminator comparator output, positive (+) and negative (-).
+MID P11 Baseline voltage for last dynode output signal processing chain. Nominally +2.5V.
+2.5V P12 +2.5V reference voltage
VTH DSCR P13 Threshold for zero slope discriminator.
Table 4: Test Points

SIB164B-1018 Sensor Interface Board for Hamamatsu H7546B / H12428 MAPMT
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Mechanical Information
Figure 9: SIB164B-1018 Printed Circuit Board Dimensions
ALL DIMENSIONS IN MILLIMETER

User Guide
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886 /Tel: [phone] /Fax: [phone] /www.vertilon.com
Vertilon Corporation has made every attempt to ensure that the information in this document is accurate and complete. Vertilo
n
assumes no liability for errors or for any
incidental, consequential, indirect, or special damages including, without limitation, loss of use, loss or alteration of dat
a, delays, lost profits or savings, arising from the use
of this document or the product which it accompanies. Vertilon reserves the right to change this product without prior notice. No responsibility is assumed b
y Vertilon for any
infringements of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under the patent and proprietary
information rights of Vertilon Corporation.
© 2018 Vertilon Corporation, ALL RIGHTS RESERVED
UG2868.1.1 Jul 2018