Wavetek 1391 User manual

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OPERATION AND
XIAINTENANCE 31ANUAL
Model 1391
INCLUDING SCPI AND MATEICIIL
LANGUAGE DESCRIPTIONS
50 MHz VXI Pulse Generator
Q 1992 Wavefek
This dacumenlconlalns Inlormatlon proprietary
to Wavelek and Is providedsolely lor lnsrnrment
operationand maintenance.
The inlormtion In
this document may not be duplicated in any
mannerwithoul
the priorapproval inWflting lrOm
Wamek.
Wavalek
Instruments Dlvlslon
9045 Balboa Avc.
San Dicgo. CA 921 23
Tel: [phone]
800-223-9885
Fax [phone]
Manual Revision B, 4/93
ManualPart NumSer 1006-00-0694
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WARRANTY
Wavetek warrants thar all products manufactured by Wavetek conform to published Wavetek specifications
and are free from defecrs in materials and workmanship for a period of one
(1) year from the date of
delivery when used under normal conditions and within the service conditions for which [hey were fur-
nished.
The obligation ofWavetek arising from a {Vananty claim shall
be limited to repairing, or at its option,
replacing without charge, any product which in Wavetek's soleopinion proves to be defective within the
scope of the Warranty. In the event Wavetek is not able to modify, repair or replace non-conforming
defective parts orcomponents to
a condition as warranlied within a reasonable time after receipt thereof,
Buyers shall be credited for their value at the original purchase price.
Wavetek must
be notified in writing of the defect or nonconformity within the Warranty period and the
affected product returned to Wavetek's factory or to an authorized servicecenter wirhin
(30) days after
discovery of such defect or nonconformity.
For product warranries requiring return to Wavetek, products must be returned to a service facility desig-
nated by Wavctrk. Buyer shall prepay shipping charges,faxes, duties and insurance for products returned
to Wavetek for warranty service. Except for products returned to Buyer from another country, Wavetek
shall pay for return of'products to Buycr.
Wavetek shall have no responsibility hereunder for any defect or damage caused by improper storage,
improper installation, unauthorized modification, misuse, neglect, inadequate maintenance, accident or for
any product which has becn repaired or altered by anyone other than Wavetek or its authorized representa-
tive and not in accordance with instructions furnished by Wavetek.
Exclusion of Other Warranties
The Warranty described above is Buyer's
sole and exclusive remedy and no other warranty, whether
written or oral, is expressed or implied. Wavetek specifically disclaims the implied warranties of
merchantability and fitnessfor a particular purpose.
No statement. reprcsenra~ion,agreement, or
understanding, oral or wrincn, made by
an agent, distributor, representative, oremployee of Wavetek,
which is not conraincd in thc foregoing Warranty
will bc binding upon Wavetek, unlcss madc in writing
and exccu~cdby
an aurhorizcd Uravctek employee. Under no circumstances shall Wavetek be liable for
any direct, indirect, special, incidental, or consequentlal damages, expenses, losses ordelays (includ-
ing
loss of profits) based on contract, tort, or any other legal theory.
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Page 1-4, Paragraph 1.3.7, Coollng Requlrment:
Replace
"Minimum airflow requirement kr 10°C rise is 0.381 mm (.015 in) Hz0 a! 1 1.34 llsec (24 CFM).'
with
"Minimum airllow requirement for 10% rise is Q
Page 3-20, Paragl
At tne Donom or Ine secona column, cnange from
'aph 1.3.7, SUMBUS Operatlon
L - . .. . .. . -
Receiver: IN1T:CONT OFF
TR1G:SOUR:ECLTO
.~eceiver: IN1T:CONT OFF
TRIG:SOUR ECLTO
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SAFETY FIRST
PROTECT YOURSELF. Follow these precautions:
Don't touch the outputs of the instrument or any exposed test wiring
caving the output signals. This instrument can generate hazardous
voltages and currents.
Don't bypass the VXI chassis' power cord's ground lead with two-wire
extension cords or plug adaptors.
Don't disconnect the green and yellow safety-earth-ground wire that
connects the ground lugof the VXI chassispower receptacle to the chassis
ground terminal (marked with
@ or a ).
Don't hold your eyes extremely close to an rf output for a long time. The
normally nonhazardous low-power rf energy generated by the instrument
could possibly cause eye injury.
Don't energize the VXI chassis until directed to by the instaIlation
instructions,
Don't repair the instrument unless you are a qualified electronics techni-
cian and know how to work with hazardous voltages.
Pay attention tothe
WARNING statements.Theypoint out situationsthat
can cause injury or death.
Pay attention to the CAUTION statements. They point out situations that
can cause equipmenr damage.
COY~ESI'S iii
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CONTENTS
SECTION 1 SPECIFICATIONS
1.1 THE MODEL 1391 ............................................................................... 1-1
1.2
SPECIFICATIONS ...................................................................................... 1-1
1 . 2.1 Functions ............................................................................................. 1-1
1.2.2
Operating Modes ....................... ........ .......................................... 1-1
1.2.3 Inputs ................................................................................................ 1-2
1 . 2.4 OU~PUIS .......................................................................................... 1-2
1.2.5
Pulse Characteristcs ........................ .. ............................................ 7-3
1 . 2.6 MuhichannelOperafion ....................................................................... 1-3
1. 3 GENERAL ................................................................................................ 1-4
1 . 3.1 SCPl Programming ........................................................................... 1-4
1.3.2
VXlbus Interface .................................................................................. 1-4
.............................. ..............................................
1.3.3 Environmental ..... 1-4
1 . 3.4 Size ........................... ....... ................................................................... 1-4
............................................................................................... .
1 3.5 Power 1-4
.............................................................................................
1.3.6 Reliability 1-4
7.3.7 Cooling Requirement .................... .. .... .. ........................................ 1-4
1.3.8
Safety .............................................................................................. 1-4
1.3.9
EMC ............................................................................................... 1-4
SECTION 2 PREPARATION
2.1 RECEIVING INSPECTION ..................... ..... ........................................... 2-1
2.1.1
Unpacking Instructions ....................................................................... 2-1
2.1.2
ReturningEquipment ........................................................................ 2-1
2.2
PREPARATIONFOR STORAGE OR SHIPMENT .................................. 2-1
2.2.1
Packaging ........................................................................................... 2-1
2.2.2
Storage ................................................................................................ 2-1
2.3
PREPARATIONFOR USE ................................................................... 2-1
2.3.1
Log~calAddress Select~on .................... .. .... .. ............................... 2-2
2.3.2
Data Transfer BusArbitration .............................................................. 2-2
2.4
INSTALLATION .......................................................................................... 2-4
2.5
INITIALCHECKOUT AND OPERATIONVERIFICATION ........................... 2-4
SECTION 3 OPERATION
3.1 INTRODUCTION ........................................................................................ 3-1
3.2
CONNECTORSAND LED INDICATORS ................... .. ........................ 3-1
3.3
MODEL 1391 PROGRAMMING ............................... .... ....................... 3-1
3.3.1
SCPl Command Table .................................... .... ................................ 3-1
3.3.1.1
Long and Short Form Keywords ................................................... 3-3
3.3.2
Command Message Format ............................................................. 3-3
3.3.2.1
Program Message Unit .................. ..... .................................... 3-4
3.3.2.2
Program Message ....................................................................... 3-4
.....................................................
3.3.2.3 ProgramMesszge Delimiters 3-4
3.3.2.4
Parameter Forms .............................. .. ....................................... 3-4
..................................................
3.3.2.5 Program Message Terminators 3-4
.................., .............................................................
3.3.2.6 Queries ...... 3-7
............................. ..........................
3.3.3 Model 1391 SCPl Commands .. 3-7
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CONTENTS (Continued)
3.3.3.1 CALibrate Subsysiem ................................................................... 3-7
3.3.3.2 TEST Subsystem
....................... .. ............................................. 3-7
3.3.3.3 INlTiateSubsystem
...................... .. ........................................ 3-8
3.3.3.4 OUTPut Subsystem
...................................................................... 3-8
3.3.3.5 RESet Subsystem
.............................................. .... .......... 3-8
..................................................................... 3.3.3.6 SOURceSubsystem 3-9
3.3.3.7 SYSTem Subsystem
.................... ..... .................................... 3-12
3.3.3.8 TRlGger Subsystem
.................................................................... 3-12
3.3.3.9 DlAGnostic Subsystem
................................................................ 3-13
....................................... .....................
3.3.3.10 STATUSSubsystem .... 3-14
............................. 3.3.4 IEEE 488.2 Common Commands ..................... .. 3-16
3.4 MODEL 1391OPERATION
........................................................................ 3-16
3.4.1 Outpur Terminations
............................................................................ 3-16
.......................................................................
3.4.2 Input/Outpul Protection 3-17
3.4.3 PowerOn/ResetDefaults
.................... .. ........................................... 3-17
............................................ ........................ 3.4.4 Continuous Operation .. 3-17
......................................................
3.4.4.1 Frequency/Period Parameters 3-19
.........................................................................
3.4.4.2 Pulse Parameters 3-19
............................................... ..........................
3.4.4.3 Output Levels .. 3-19
3.4.4.4 PulseISquareFunctions
................................................................ 3-20
3.4.5 Marker Operation
..................................... ........................................ 3-20
3.4.6 SUMBUS Operation
................... .. .......................................... 3-20
3.4.7 PAM Operation
.................................................................................... 3-21
3.4.8 Triggered Operation
.................... , ...................................................... 3-22
............................. ................ 3.4.8.1 Level and Slope Parameters ... 3-23
3.4.8.2 ExternalTrigger Inpul
................................................................ 3-23
3.4.8.3 InternalTrigger
............................ .. .......................................... 3-23
3.4.8.4 BUS Trigger Commands
.......................... .............. ................ 3-23
3.4.8.5
VXI Trigger Bus Input ................................................................... 3-24
3.4.9 Gated Operation
....................... .. .................................................. 3-24
3.4.9.1 ExternalWidth Operation
................... ... ............................. 3-25
3.4.10 Rurst Operation
................................................................................... 3-26
3.4.11 MasterJSlaveOperation
............................ ... .................................. 3-26
3.4.12 Status Commands
.......................................................................... 3-26
SECTION
4 CIRCUIT DESCRIPTION
4.1 INTRODUCTION
........ ....., ........ ., ............................................................... 4-1
4.2 VXI INTERFACE BOARD
........................................................................... 4-2
4.2.1 VXlbus Overview
................................................................................. 4-2
4.2.2 Interface Board
.................... , .......................................................... 4-2
4.3 PULSE GENERATOR BOARD
- DIGITAL CIRCUITS ................................. 4-3
................................................... 4.3.1 Interconnect and Power Distribution 4-5
................... ........................
4.3.2 Digital Interface and Data Registers ... 4-5
....................................................................... 4.3.3 Frequency Synthesizer 4-7
4.3.4 Trigger Amplifier
................................................................................. 4-8
4.3.5 VXlbus TTL Trigger Receiver
.............................................................. 4-8
4.3.6 VXlbus ECLTrigger Receiver
........................................................... 4-8
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CONTENTS (Continued)
SECTION 5
............................................ ...................
Trigger Source Selector .... 4-8
...............................................
Mode Control LogrcIBurst Counter 4-8
...................................................................
Gatable Oscillator/Divider 4-9
PGENSource Selector
..................................................................... 4-10
Delay and Width One-Shots
................................................................ 4-11
PulseGenerator
............................. .. ................................................
4-12
Output Mode Selector
........................................................................ 4-12
Sync Source Selector
....................................................................... 4-12
............................................ ...................
Sync Output Driver ............... 4-13
.............................. ......................
VXlbus ECWLTrigger Drivers .. 4-73
Delay
- Width - Frequency Autocalibration .......................... .. .......... 4-13
........................
Micro~rocessorInterfaceSchematic Dianram ............ 4-13
............................ .
4.4 PULSE GENERATOR BOARD ANALOG CI~UITS 4-73
.............................................
Main High-speedAnalog Signal Path 4-14
...........................................................................................
Level Shift 4-15
Current Switch
.................. ... . .... ......................................................
4-75
.........................................................................
Timing Capacitors 4-15
Lim~ter
................................................................................................ 4-15
.............................................................................
Trapezoid Shaper 4-16
Multiplier ....................
.. .................................................................. 4-17
............................................... .............................
Output Amplifier .. 4-17
SUMBUS Driver
.................................................................................. 4-17
......................................................
Control Voltage D to A Converters 4-18
Amplitude Conrrol/PAM Circuitry
................................................. 4-18
Transition Control CurrenlSources
............................................... 4-18
Delay
- Width One-Shot Control .......................... .. ...................... 4-19
Relay Driver
..................................................................................... 4-19
Power Oscillator
...................... .. ................................................... 4-19
................................................................................. Charge Pump 4-19
AutoCal/Buill-In-Test Circuitry
..................... .. .............................. 4-20
CALIBRATION
5.1 FACTORYREPAlR
..................................................................................... 5-1
.......................................................................................... 5.2 CALIBRATION 5-1
5.3 REQUIREDTEST EQUIPMENT
......................................................... 5-1
5.4 PERFORMANCEVERlFlCATlON PROCEDURE
........................................ 5-1
Preliminary Tests
................................................................................. 5-2
Quick FunctionalTest
.................................... .... ................................. 5-2
Sync Waveform Characteristics Test
............................................. 5-2
Gated ModeTest
.............................................................................. 5-2
..................................................................................
Burs! ModeTesr 5-3
PulseAmplitude Accuracy Test
.......................................................... 5-3
Pulse Width Accuracy Test
........................ ... .................................. 5-4
Pulse DelayAccuracy Test
...................... .. .... .... ......................... 5-4
Double Pulse Delay Accuracy Tes~
.................................................. 5-4
Function Delay Test
.......................................................................... 5-5
Pulse Output Transition Times Accuracy Test .................................... 5-5
Pulse Output Aberrations Test
..................................................... 5-5
Trigger Level Test
............................................................................... 5-6
Synthesizer Frequency Tesr
.............................................................. 5-6
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CONTENTS (Continued)
5.4.15 Burst Gatable Oscillator Frequency Test
............................................ 5-6
5.4.16 ExternalTrigger Frequencies Test
...................................................... 5-7
5.4.17 Trigger SourceTest
............................. .. ........................................ 5-7
5.4.18 Trigger Output Mode Test
................................................................... 5-7
5.4.19 MasterISlave Tesl
....................... .. .................................................. 5-8
5.4.20 SUtvlBUS Test
................................................................................ 5-8
5.4.21 PAM InputTest
.................................................................................... 5-8
.......... ....................... 5.5 ALIGNMENT PROCEDURE ... .... 5-9
.................................................................................... 5.5.1 Self Calibration 5-9
........................................... ..............
5.5.2 Semi-AutomatedProcedure .. 5-9
5.5.3 Preparation
.......................................................................................... 5-10
5.5.4 Connector Termination
........................................................................ 5-10
5.5.5 Alignment Procedure
.......................... ... .................................... 5-10
SECTION 6 TROUBLESHOOTING
6.1 FACTORY REPAIR ..................... .. ......................................................... 6-1
6.2 BEFOREYOU START
........................................................................... 6-1
6.3 REQUIREDTEST EQUIPMENT
................................................................. 6-1
6.4 ISOLATINGA PROBLEM
.................... .. ................................................. 6-1
..................................................
6.5 TROUBLESHOOTING ....................... .. 6-2
Ampl~tudeDAC Error Bit 0
....................... .... ............................... 6-2
Trailmg Edge DAC Error Bit
1 ................... .... ........................... 6-3
Leading Edge DAC Error Bit
2 ............................................................ 6-3
LimitAmplifier Error Bit 3
........................ .... ................................... 6-3
SUMBUS Error Bit
4 ........................... .............. .................................... 6-3
Delay Gatable Oscillator Error Bi! 5
.................................................... 6-3
Width Gatable Oscillator Error Bit 6
...................................................
6-3
25-50 MHz Gatable Oscillator Error Bit 7
............................................
6-4
BUS Error Error Bit
14 ......................... ... ........................................ 6-4
Abnormal LEDState
...................... ..,, .................................................. 6-4
Pulse Board Digital Interface
............................. ,,.. ................... 6-4
Autocal/Built-InTest
........................ .. ...............................................
6-4
Frequency Reference
..................... ... ............................................. 6-5
Frequency Synthesizer
................... .. ........................................... 6-5
TRIG IN
................... .. ...................................................................... 6-5
Trigger SourceSelecLor
................................................................... 6-5
TTL/ECLTriggers to Backplane
.......................................................... 6-5
TTUECL Triggers from Backplane
...................................................... 6-5
Mode Control LogiclBurst Counter
............................................ 6-5
SYNC OUT Selector and Dr~ver
..........................................................
6-6
Amplitude Control and Multiplier
..................................................... 6-6
PAM IN
............................................................................................. 6-6
Transition Time Generator
................................................................ 6-6
Trapezoid Shaper
.................... ... .................................................... 6-7
Output Power Supplies
.................................................................. 6-7
Output ArnplifierIPULSEOUT
................... ... ............................... 6-7
Cosr~srs vii
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CONTENTS (Continued)
SECTION 7 PARTS AND SCHEMATICS
................... ..........................................................
7.1 DRAWINGS ........ 7-1
.....................................................................................................
7.2 ERRATA 7- 1
....................................................................................
7.3 ORDERING PARTS 7-1
APPENDIX
.............................................
APPENDIX A: MATEICIILPROGRAMMING A-1
..................................................
APPENDIX B: SCPl COMMAND TREE 8-1
APPENDIX C: SELF CALIBRATION ...................................................... C-1
APPENDIX D: SELF TEST
...................................................................... D-1
...........................
APPENDIX E: SCPl CONFORMANCE INFORMATION E-1
Table 2-7
Table 3-1
Table 3-2
Table 3-3
Table 3-4
Table 3-5
Table 5-1
Table 6-1
Table 6-2
Table 6-3
Table 6-4
Table 6-5
Table 6-6
Table 6-7
TABLES
.................... .... .............
Tesl Equipmentand Tools ,. .... 2-4
...................... ......................... Model 1391 Front Panel ....., 3-3
........................................... Model 1391Command Summary 3-5
Error Messages.
...................................................................... 3-15
IEEE 488.2 CommonCommands
................... .. ................. 3-76
Inputand Output Impedances
................................... .... . 3-16
List of Test Equipment
........................ .. ............................ 5-1
List of Test Equipmenland Tools
......................................... 6-1
Problems Identifiedby 'TST
....................... .. ............. 6-2
Problemsnot Identified by 'TST
....................................... 6-2
Trigger SourceSelector Control Lines
.................................... 6-5
Sync Selector Control Lines
.................................................... 6-6
TransitionTiming Range Capacitor Selection
........................ 6-6
Output Arnplif~erVoltages
....................................................... 6-7
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ILLUSTRATIONS
Figure 1-1
Figure 1-2
Figure
2-1
Figure 2-2
Figure 3-1
Figure 3-2
Figure 3-3
Figure 3-4
Figure 3-5
Figure 3-6
Figure 3-7
Figure 3-8
Figure 4-1
Figure 4-2
Figure 4-3
Figure 4-4
Figure 4-5
Figure 4-6
Figure 4-7
Figure 4-8
Figure 4-9
Figure 4-10
Figure 4-11
Figure 4-12
Figure 4-13
Figure 4-1
4
Figure 4-15
Figure 4-16
Figure 4-17
Figure 5-1
Figure 6-1
Figure 6-2
Figure 6-3
Figure 6-4
Figure 6-5
Figure 6-6
Figure 7-1
Model 1391
50 MHz VXI Pulse Generator .............................. 1-0
Definitions of Pulse Characteristics
........................................ 1-5
Set the Logical Address
........................ .. ......................... 2-2
Bus Arbitration Level Jumpers
................................................ 2-3
Model 1391Front Panel
.................... ........ ....................... 3-2
..................................... ...................
Output Termination .. ... 3-17
Model 1391 Basic Operation Setup
...................................... 3-18
ContinuousWaveform Characleristics
................................. 3-18
SUMBUSWaveforms
............................................................. 3-21
Triggered Waveform Characteristics
..................................... 3-22
Synchronous Gate Waveform Characteristics
........................ 3-24
............................ ExternalWidth Waveform Characteristics .. 3-25
............. Model 1391Pulse Generator Overall Block Diagram 4-1
VXlbus Interface Board Block Diagram
................................ 4-2
.....................
Pulse Generator Digital Circuits Block Diagram 4-3
.................................... Digiral Interface and Data Reg~sters 4-6
...................................................................
Dual Modulus PLL 4-7
ModeControl Logic
- Gated ................................................ 4-9
..................................................... ModeControl Logic - Burst 4-9
........................... ..................................
Gatable Oscillalor .. 4-9
Divider
..................................................................................... 4-10
Analog One-Shol
................... .. ....... .. ................................. 4-11
Digital One-Shot
..................... .. ...... .... .............................. 4-11
..........,....... ............................ Simplified Pulse Generator ... 4-12
.................... Pulse Generator Analog Circuits Block Diagram 4-14
............................................... Simplified Upper Level Limiter 4-16
Simplified Trapezoid Shaper
............................................. 4-16
...................................................... Simplified SUMBUS Driver 4-18
.........................................
Simplified Charge Pump Circuits 4-19
Test Pointsand Adjustments
................................................. 5-13
......................... Delay One-ShotTroubleshooting Flow Chart
6-8
.........................
Width One-ShotTroubleshooting Flow Chart 6-11
.................... Gatzble Oscillator Troubleshooting Flow Chart .. 6-15
..............
Frequency Synthesizer Troubleshooting Flow Chart 6-17
Burst Mode Troubleshooting Flow Chat
................................ 6-19
.............................
Sync Selector Troubleshooting Flow Chart 6-21
Surface Mount Parts Pjn-Outs
................................................. 7-2
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PULSE OUT
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Specifications Section
1
1.1 The Model 1891
The model 1391 is a 1mHz to 50 MHz "C" size VXI
Programmable Pulse Generator. 11can generate
single, double, and delayed pulses with programmable
period, width, delay, riselfall uansitions, and output
IeveIs. Thegenerator operales as a continuous,
triggered, gated orburst pulse source up to 50 IMHz.
Additionally, the Model 1391 can be programmed for
a square wave function (-50% time symmetry) up to
100MHz. Pulse characteris~icsare programmabIe
with
4 digit resolu~ion,with width and delay up to
2000 seconds, and riselfall transition times setrable
from 5 ns to 50
ps.
The pulse ouput amplitude may be specified as upper
and lower levels, which can be programmed in a
+16 V window (z8V into 50R terminalion). Peak to
peak amplitude, upper level value minus lowcr level
value, is continuously variable in 10 mV steps from
150mVp-p to 16Vp-p (50R). The pulse amplitude
(upper, lower, or both) may be modulated (PAM)
with an external signal.
Control of the pulse generator adheres to the SCPI
(Standard Commands for Programmable Instruments)
format Version 1992.0.February 1992 (refer to the
SCPI manual for further information). SCPI is an
industry standard language for remote instrument
programming. Using any manufacturer's VXI chassis,
the Model 1391 can be controlled using the SCPI
language and the appropriate controller.
multiple pulse generators may be linked and operated
together inside one VXIbus chassis. Series operation
is provided by full support of the VXIbus SUIMBUS.
A signal programmed at the output may be sent to the
SUMBUS, orsignal present at the SUMBUS may be
summed into the model 1391 oulput. In paraIlel
operation, model 1391's may be slaved to a master
clocWtrigger bus on thc VXIbus backplane to create a
multichannel pulse generator.
The model 139
1 has extensive self-adjustment utilities
built in. Calibration constants are maintained in non-
volatile memory.
Programmable single. double ordeIaycd pulse and
fixed (-50%) duty cycle square wave.
1.2.2 Operntlne Modes
Contlnuous:
Pulse period generated continuously internal to the
modcl 1391 at programrncd frequcncy/pcriod. Sc-
lecrcd pulsc waveform is continuously outpul at
PULSE OUT with programmed pulsc characteristics.
Pcriod riming signal appears a[ SYNC OUT(if
cnablcd) and may be sclectcd for output to the
backplane. Pulsc periods programmablc up to
25 MHz in double pulse. 50 lMHz in single ordelaycd
pulse, and 100IMHZin square wavc. Pulse Amplitude
Modulation may be enabled for cxternal signal at
PAM IN.
Triggered:
As above for Continuous mode, except that puke
period generation is disabled. Output quiescent until
triggered by an external signal at TRIG
IN. a
TTLTRG or ECLTRG signal, internal trigger fre-
quency, or a VXIbus command. then generates one
pulse period with [he programmed pulse waveform
and pulse characteristics. Triggered pulse periods
operate to 25 IMHZin doubIe pulse. 50MHz in single
ordelayed pulse and square wave.
Gated:
Similar to rriggercd mode except output condnucs for
the duration of gate signal. The last pulse pcriod
started is complctcd.
Burst:
Similar to triggered mode except programmable
number of pulse periods in a burst. Burst length,
initiated by the [riggersignal, is programmable
belween 2 and 10,000,000 cycles.
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Trig In:
Front panel BNC input for extcrna1 triggering signal.
Variable trigger level control accepts TTL or variable
amplitude bipolar signals. In addition, any of the
rrigger lines on the VXIbus backplane can be sclecred
as the trigger input, see Trigger Inpur (from VXI
Backplane). TRIG
IK is protec~edover a i20V
input range.
Variable Tripper Level.
Range: : 10V
Resolution: 50 m?,
Accuracy: + 5C3 mV
Minimum input level: 750 mVpp
Maximum input level. 120 V
lnpul im~edance:
rlkR shunled by s10 pF
A00 ps: for 2750 mVpp square wave
inout with
40 ns transitions.
PAM In:
Front panel BNC connector. used to externally PuIse
Amplitude Modulate the model
1391. PAAMmodula-
[ion scale factor is set so that a
1 volt input at this
connecror will result in a
2 volt change in upper/lower
level amplitude at the PULSE OUT connector. Input
is prorccted to 250 V inputs.
Band-widlh: dc lo >20 kHz
Accuracy: ~5%
SUMBUS lnput (from VXI Backplane):
Analog signals on the VXIbus SULMBUSline may be
summed into a model
1391 PULSE OUT with a fixed
scale factor. A full-scale PULSE OUT signal of
16 Vpp requires a 2Vpp
(80 mApp driving 25R) input
signal at the SUlMBUS line. SUMBUS receiver
specifications are:
Scalelaclor: 8 VN
Accuracy: 2 (64; + 2122 mV + 2.5 mA)
Input impedance,
>I0 kR in parallelwith c20 pF
Band#jd:h: > 50 MHz
Trigger lnput (Irom VXI Backplane):
Any one of the eighl VXIbus TTLTRG lines or either of
thc two ECLTRG lines may be selected as the [rigger
input for the model
139 1. When a TTLTRG line is
selected, the rriggering signal on that line is limited
LO a
maximum of 12.5
MHz by [heVXIbus specification.
Pulse Output:
Front panel BNC output, supplies the I50 mVpp to
I6 Vpp pulsc waveform info a 50R ~ermination,up to
50 MHz. Programmable on or off (Zoff
> 500 kR).
Output is protected against short circuits.
Source lm~edance: 500.
h'OTE: Ylhenoverloadcurrent IS delecled, the prolection
cilcuitry disables Qe Pulse Output. To r~oveffrom
an
overload, turn thepower of!, wait two minutes, and turn
theposver back on.
Sync Output:
TTL lcvel pulsc (active high) inlo 50R. Program-
mable as cithcr thc pulsc pcriod (IMARKc~:TYPE
CLOCk) or as a copy of the cxternal gating signal
(MARKcr:TYPE GATE). Whcn in continuous mode,
thc Sync Output is an approximarc 50% duty cycle
squarc wave dcfining thc timing of
a pulse period up
to 50
MHz. For frcqucncics >50 lMHz and up to
100
MHz, the Sync Output operates as a clock source.
In triggered mode (1NITiatc:CONTinuous OFF), thc
Sync Output (MARKerTYPECLOCk) is a copy of
the triggering signal. The Sync Output (MARKer:
TYPE GATE) is valid only in burst mode (TRIGger:
COUNt <value>, where "value" is greater than
1) or
in gated mode (TR1Gger:GATE ON). The SYNC
OUTBNC is short circuit protecred.
Timing: 50% point 01 rising edge delines Ihe
start of a pulse period. Conliguration
dependent delay (see Trigger Latency,
Figure
1-2 and Ihe lable below)
lollowing lrigger event.
Transilionlime: r5nswith 3 lee1RG-58 50R coax
cable lerminared into
5012.
' Trigger delays rezsuredlor 2 single pulse. 0 ns delay
" Add 22 ns xhen unit is configured as the tiasler.
Trigger Delays (I, - 1,. see Figure 1-2)
Configuration*
Extcmal Triggcr Input**
Trigger ~Modc
Burst Mode, Pulse
Burst kfodc, Squarc
ECLTrigger**
TTLTrigger
Trigger Latency
typically
58 ns
typically
83 ns
typically
63 ns
typically
52 ns
typically
52 ns
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SUMBUS Oulput (to VXI Backplane):
Pulse output signalsfrom the mode1 1391 may be
summed onto the VXIbus SUMEUS line with levels
proportiona1 to the pulse output. A full-scale PULSE
OUT signal of 16Vpp results in an
80 mApp signal
driving the SUAVEUSline. SUMBUS driver specifi-
cations are:
Scalelactor: 5 mW
Accuracy: + (6% + 2.5 mA)
load Impedance:
25R 22% (VXI Specification)
Oulpul impedance:
>10 kn in parallel w~th t20 pF
Bandwidth:
> 50 MHz (limited by Ihe backplane).
Trlgger Output (lo VXI Backplane):
Any one of the eight VXIbus TTLTRG lines or either
of the two ECLTRG lines may be selected to be driv-
en by
a signal from the model 1391, The internal
trigger, the ex~ernaltrigger input, or the pulse wave-
form may be selected to be output. When a TTLTRG
line is selected, the triggering signal on that line
is
limited to a maximum of 12.5 ,MHz by the VXlbus
specification.
1.2.6 Pulse Characterl8tlc8
SeeFigure
1-2 for an illustration defining the various
pulse characteristics. Pulse functions are programma-
ble using operating mode, pulse period (frequency),
width. delay, transition times, and amplitude levels.
NOTE: All pulse characlerislics specilicalions require
high-quality 50R cable
(s3 feel RG-59 or equivalent) and
a high-frequency 50R (r I:V) lerminalion at the far end
of lhe cable lrom Ihe PULSE OUT BtK.
Pulse Period:
Range:
Pulse Oul:
20 ns to 1000 s (1 mHz to 50 MHz)
Sync Out:
10 ns lo 1000 s (1 mHz to 100 MHz)
Resolulion:
4 digits. limiled by 1 mHr
Accuracy:
Pulse Width:
Range:
Resolulion:
Accuracy:
Jilte::
Oury Cycle:
Same as the VXlOus CLKlO reference
in cafltjnuws morle (Z 0.01% Typical). z
2% of sening in non-conlinuousmcdes.
10 ns
to 1000 s (up to 2CZO s with
external trigger).
4 digrls. limited by 1C0 ps
+(I% t 2 ns)
t (0.05% + 100 ps)
95%
limited by min. off-lime 01 10 ns.
Pulse
Delay:
Range:
Resolution:
Accuracy:
Jiller.
Duly Cycle:
Rise and Fall Transllions:
Range:
Resolulion:
Accuracy:
Aberralions (Vpp):
0 ns to 2000 s
4 digits, limited by 100 ps
+ (1% + 5ns);transilion limes set to
minimum.
~(0.0546
+ I00 ps)
95%
limited by minimum olf-timeol
12 ns.
5ns
to 50 p
4 digits. lirniled by 1CO ps
~(5%
t 2 ns)
c (5%ol Vpp + 20 mV)
NOTE: The nlioot rise lime lo fall lime may not exceed
10:
1. For Ampliludes > 12 Vpp lhe Aberralions
specilicalion applies lor /ransitions
r 7 ns.
Upper and Lower Levels:
Range: zBV
Resolution: 10 mV
Vpp Amplllude (Upper Level - Lower Level)
Accuracy:
Vpp r 0.5
+ (2% 01 selting t 50 mV)
Vpp < 0.5 =(2% 01 selling t 25 mV)
Onset ((Upper Level + Lower Levelfl)
Accuracy: r (21 ol selling t 50 mV)
NOTE: Theminimum amplilude (upper - lower) may not
be less than f50mVpp. Pulses less than 500
mVpp are
reslricted toa
+ 2V cindow.
1.2.0 Multlchennel Operatlon
Multiple 1391 modules may be operated together in
series or
in parallel to create a multichannel pulse
generator.
Serles (SUMBUS) Operatlon
A module may be selected to drive the SUIMBUS.
reccive from the SUIVBUS. or disconnect from thc
SUMBUS. AIlows the signal from one module to be
summed with rhc signal at the output of anothcr.
Allows for morc complex waveform generation than
providcd with simple pulsc gcncrator features, such as
mul~i-lcvclpulscs.
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Parallel(MaslerlSlave) Operation
Up to 10model 1391 modules may be operated in
hfaster/Slave configuration within a VXIbus chassis.
This mode of operation uses the high bandwidth and
tight timing of the ECL trigger lines to couple the
start of triggered pulse periods of Slave modules to
[he trigger output of the Master module. Sets the
"start of pulse period"
(1,) timing points of adjacent
modules into close agreement. Modules further away
will have a timing delay of approximately 0.5 ns per
slot, dependent upon the VXIbus chassis backplane.
1.8 GENERAL
1.8,l 8CPI Prograrnrnlnu
Conforms LO SCPIVersion 1992.0 (seeAppendix E)
and IEEE-488,2 standard mandated commands. Root
level commands include:
DlAGnostic OUTPut SOURce
STATUS SYSTem TRlGger
INlTiate CALibrate RESet
TEST
1.8.2
VMbus Interlace
Message Based Dcvice (MBD),256 byte input buffer.
Suppor~sthe following subse~slprotocols:
A16lA24 D16/D24 Mastcr, A16lA24
D I6m24 Slave;
VXIbus Instrument Protocol (I);
VXIbus IEEE-488.2 Instrument Protocol (14);
Event Generator. Response Generator;
DC (DynamicalIy ConfigurabIe) Device.
The model 1391supports all Word Serial Commands
specified in the VXIbus System Specification (Rev.
1.4),Tables E.l and E.2 for the above subset/protocol
classification.
1.8.8 Envlronrnental
TemperatureRange:
Operating: Scecificalions apply
04C to 50°C,
when calibrated al23'C + 3%.
Storage:
-40°C to t71aC (RH no! cootrolled).
Yiarm-up Time:
30 rninules tor specilied operation,
except stablllty speclticallons require
60 minules.
Alrliude:
Operallnp: Sea level lo
10,OCO ft
Storale: Sea level to
15,000 It.
Relalive Humidity (non-condensing):
0°C to +lO°C:
tllmC to +30°C:
+3IaC
to +40°C:
+4t°C
to +50°C:
Vibralian:
Shock:
Bench Handling:
1.8.4 8h
Dimensions:
Weight;
1.8.6 Power
Total:
Voltage
t24 Vdc
t12 Vdc
+5 Vdc
-2 Vdc
-5.2 Vdc
-12 Vdc
-24 Vdc
not controlled.
95 25% flH rnax.
75 + 5% RH max.
45 2 5% flH rnax.
0.013 in., 5 lo 55 Hz, 2g rnax.
Non-operaling.
40 g, 9 rns hall-sine.
Non-operating, 4
inch or point ol
balance drop, any lace, solid wooden
surface.
Single slol,
'C' size VXI module.
1.65 kg (3.63 Ib) nel; 3.64 kg
(8.00 Ib) shipping.
< 47 watts
Peak Current
0.4 A
1.0 A
1.0 A
1.1 A
1.8 A
0.8 A
0.4 A
Dynamlc Cunent
0.3 A
0.1 A
0.2 A
0.1 A
0.1 A
0.1 A
0.3 A
>22,000 hours MTBF at 2S°C, ground benign.
MIL-HDBK-217 calculation at 50% component
stress.
I .8.7 Coonno Requlrernent
Within a VXI mainframe with cooling air. Minimum
airflow requirement for 10°C rise is 0.381mm
(.015 in)
H,O at 11.34 Vsec (24 CFM).
1.8.6 8nlety
Designed and tested to MIL-T-28800D, UL-1244, and
the VXI System Specification, Revision 1.4.
1.8.0 €MC
Designed and tested to MIL-STD-461C. Part 7, RE-
02, and VXI System Specification, Revision 1.4; RE,
RS, CE, CS.
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TRIG
w I/
PRESETTRGGER LEVEL. POS!TNE SLOPE
MORMAL
'
PULSE
OUT
I I
I I
I
I
1 I
COMPLIMENTARY
PULSE OUT
I
I
I I
1 I
TIME REF: b I1 12
- LL. TOP LINE
b - TlME AT TRIGOER EVENT
I, - START OF PULSE PERIOD
I1 - START OF DEUYEDPULSE
UL -UPPER LEVELVOLTAOE
LL
- LOWER LEVELVOLTAOE
PA
- PULSEAMPLITUDE = (UL - LL)
TL
- TRIGGER UTENCV = 1, - b
PD - PULSE OEUY =
- tl
PW - PULSE WIDTH
LE
- LE4DlNG EDGE TRINSKIOMTLME
TE
- TRAILING EDQE TRANSITION TlME
0s-OVERSHOOT
US- UNDERSHOOT
Ass-ABERRATIONS
(DL-~k) - (0s + USYPA. 100%
Figure 1.2 Definitions of Pulse Characterlslics
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Preparallon Secllon 2
2.1 RECEIVING INSPECTION
Check the shipment at the time of delivery and inspect
each box for damage. Describe any box damage and
list any shortages on the delivery invoice.
1. Unpack the boxes. Unpack the boxes in a clean
and dry environment. Save all the packing
material in case the instrument must be returned
for repair.
2. Inspect the shipment for damage. Inspect the
equipment carefully for any signs of mechanical
damage regardless of the condition of the shipping
boxes.
3.
If necessary, file a clalm. In the case of mechani-
cal damage, call the shipper immediately and start
the claim process.
4. Cell Wavetek. Call Wavetek's Customer Service
representative (619 279-2200) to inform them that
the shipment arrived damaged. Please be prepared
to provide a detailed damage report.
Follow these steps when you return equipment to
Wavetek:
1. Save the packing material. Always return
equipment in its original packing material and
boxes. If you use inadequate material, you'll have
to pay to repair any shipping damage as carriers
won't pay claims on incorrectly packed equipment.
2. Call Wavetek Customer Servlce and ask for a
return authorization. The Wavetek Customer
Service representative (619 279-2200) will ask for
your name, telephone number, company name,
equipment type, model number. serial number, and
a description of the problem.
2.2 PREPARATION FOR STORAGE OR SHIPMENT
If at all possible. always use the original shipping
container. However, when using packing materials
other than the original, use the following guidelines:
1. Wrap the Model 1391in ESDsensitive packing
material.
2. Use a double-walled cardboard shipping container.
Protect all sides, including the top and bottom, with
shock absorbing material (minimum of 2 inch thick
material) to prevent movement of the Model 1391
within the container. Seal the shipping container with
approved sealing tape. Mark "FRAGILE" on all sides,
top, and bottom of the shipping container.
The Model 1391 should be stored in a clean, dry
environment. In high humidity environments, protect
the Model 1391 from temperature variations that could
cause internal condensation. The following environ-
mental conditions apply to both shipping and storage;
Temperature -40°C to +71°C
Relarive Humidify not controlled,
non-condensing.
Alrirude <15000 ft
Shock < 40g
2.3 PREPARATION FOR USE
Paragraph 2.3 covers the following topics:
Logical Address Selection
Data Transfer Bus Arbitration
Installation
3.
Peck and shipthe equlprnent.
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The VXI chassis Resource Manager identifies units in
the system by the unit's logical address. The VXI
logical address can range from
0 to 255. However,
addresses
0 and 255 are reserved for special functions.
Address
0 identifiesthe Resource Manager. Address
255 permits the Resource Manager to dynamically
address the unit based on the unit's VXI chassis slot.
To change the ?vIodel 1391's logical address, use the
eight position DIP switch (figure 2-1) accessible from
[he side panel. The Model 1391 uses binary values (2'
to
2') LO set the address using the active low address
switch. This means the OFFposition represents a
logical 1. Conversely. an
ON position represents a
logical
0. Switch position number one is the least
significant bit of the address, Insert
A in figure 2-1
illuslrates a switch set to a logical address of 3.
Wavetek ships the Model 1391 with a logical address
of 255 for Dynamic Configuration. Refer to insert B
in figure
2- 1.
The Model 1391 has VMEbus Mastership capability.
This means the Pulse Generator, when enabled, sends
Responses and Events as signals to its Commander.
The Model 1391 cannot drive the interrupt lines.
The Model 1391 is configured as a level 3 requestor by
the factory. The level 3 Bus Request and Bus Grant
lines are used (BR3*. BG3IN*, and BG30UT*), The
orher Bus Grant lines arc daisy-chained by jumpers.
The VMEbus specifications describe three priority
schemes: Prioritized, Round-robin, and Single level.
The Prioritized arbitrafion assigns the bus according to
a fixed priority scheme where each of four bus lines
has a priority from highest (BR3*) to lowest (BRO*).
Round-robin arbitration assigns the bus on
a rotating
basis. Single level arbitration only accepts requests on
BR3*.
If a different requestor level is required, the jumpers
must be changed. The following instructions and
figure 2-2 will aid in reconfiguring the Model 1391 to
Figure 2-1. Set the Logical Address
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