Acrosser Technology AR-B9629 User manual

AR-B9629 User’s Guide
0-1
AR-B9629
Half Size All-In-One
386SX CPU BOARD
User’s Guide
Edition: 1.1
Book Number: AR-B9629-03.0109

AR-B9629 User’s Guide
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Table of Contents
0. PREFACE...........................................................................................................................................................0-3
0.1 COPYRIGHT NOTICE AND DISCLAIMER.........................................................................................................................0-3
0.2 WELCOME TO THE AR-B9629 CPU BOARD.................................................................................................................... 0-3
0.3 BEFORE YOU USE THIS GUIDE ......................................................................................................................................0-3
0.4 RETURNING YOUR BOARD FOR SERVICE ....................................................................................................................0-3
0.5 TECHNICAL SUPPORT AND USER COMMENTS............................................................................................................0-3
0.6 ORGANIZATION................................................................................................................................................................0-4
0.7 STATIC ELECTRICITY PRECAUTIONS............................................................................................................................ 0-4
1. OVERVIEW.........................................................................................................................................................1-1
1.1 INTRODUCTION................................................................................................................................................................1-1
1.2 PACKING LIST ..................................................................................................................................................................1-1
1.3 FEATURES........................................................................................................................................................................1-1
2. SYSTEM CONTROLLER....................................................................................................................................2-1
2.1 MICROPROCESSOR.........................................................................................................................................................2-1
2.2 DMA CONTROLLER..........................................................................................................................................................2-1
2.3 KEYBOARD CONTROLLER..............................................................................................................................................2-2
2.4 INTERRUPT CONTROLLER..............................................................................................................................................2-2
2.4.1 I/O Port Address Map.................................................................................................................................................2-3
2.4.2 Real-Time Clock and Non-Volatile RAM..................................................................................................................... 2-4
2.4.3 Timer..........................................................................................................................................................................2-4
2.5 SERIAL PORT ...................................................................................................................................................................2-5
2.6 PARALLEL PORT..............................................................................................................................................................2-7
3. SETTING UP THE SYSTEM...............................................................................................................................3-1
3.1 OVERVIEW........................................................................................................................................................................3-1
3.2 SYSTEM SETTINGS..........................................................................................................................................................3-2
3.2.1 Clock Jumper (JP1).................................................................................................................................................... 3-2
3.2.2 Reset (JI)....................................................................................................................................................................3-2
3.2.3 PS2 KB4 Mouse (J4)..................................................................................................................................................3-2
3.2.4 ISA Bus Connector (CN1)...........................................................................................................................................3-3
3.2.5 External Buzzer (J2)................................................................................................................................................... 3-4
3.2.6 Power Connector (J3)................................................................................................................................................. 3-5
3.2.7 I/O Connector for KB/MS, serial port, parallel port (CN3)............................................................................................3-5
4. BIOS CONSOLE.................................................................................................................................................4-6
4.1 BIOS SETUP OVERVIEW..................................................................................................................................................4-6
4.2 STANDARD CMOS SETUP...............................................................................................................................................4-7
4.3 ADVANCED CMOS SETUP............................................................................................................................................... 4-8
4.4 ADVANCED CHIPSET SETUP........................................................................................................................................ 4-10
4.5 PERIPHERAL SETUP...................................................................................................................................................... 4-11
4.6 AUTO-DETECT HARD DISKS......................................................................................................................................... 4-12
4.7 PASSWORD SETTING.................................................................................................................................................... 4-12
4.7.1 Setting Password ..................................................................................................................................................... 4-12
4.7.2 Password Checking.................................................................................................................................................. 4-12
4.8 LOAD DEFAULT SETTING.............................................................................................................................................. 4-12
4.8.1 Auto Configuration with Optimal Setting.................................................................................................................... 4-12
4.8.2 Auto Configuration with Fail Safe Setting.................................................................................................................. 4-12
4.9 BIOS EXIT ....................................................................................................................................................................... 4-13
4.9.1 Save Settings and Exit ............................................................................................................................................. 4-13
4.9.2 Exit Without Saving.................................................................................................................................................. 4-13
4.10 BIOS UPDATE............................................................................................................................................................. 4-14
5. SPECIFICATIONS ..............................................................................................................................................5-1
6. PLACEMENT & DIMENSIONS...........................................................................................................................6-1
6.1 PLACEMENT..................................................................................................................................................................... 6-1
6.2 DIMENSIONS ....................................................................................................................................................................6-2

AR-B9629 User’s Guide
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0.PREFACE
0.1 COPYRIGHT NOTICE AND DISCLAIMER
This document is copyrighted, 2002, by Acrosser Technology Co., Ltd. All rights are reserved. No part of this
manual may be reproduced, copied, transcribed, stored in a retrieval system, or translated into any language or
computer language in any form or by any means, such as electronic, mechanical, magnetic, optical, chemical,
manual or other means without the prior written permission or original manufacturer.
Acrosser Technology assumes no responsibility or warranty with respect to the content in this manual and
specifically disclaims any implied warranty of merchantability or fitness for any particular purpose. Furthermore,
Acrosser Technology reserves the right to make improvements to the products described in this manual at any
times without notice. Such revisions will be posted on the Internet (WWW.ACROSSER.COM) as soon as possible.
Possession, use, or copy of the software described in this publication is authorized only pursuant to valid written
license from Acrosser or an authorized sub licensor.
ACKNOWLEDGEMENTS
Acrosser, AMI, IBM PC/AT, ALI, Windows 3.1, MS-DOS…are registered trademarks.
All other trademarks and registered trademarks are the property of their respective owners.
0.2 WELCOME TO THE AR-B9629 CPU BOARD
This guide introduces the Acrosser AR-B9629 CPU Board.
Use information provided in this manual describes this card’s functions and features. It also helps you start, set up
and operate your AR-B9629. General system information can also be found in this publication.
0.3 BEFORE YOU USE THIS GUIDE
Please refer to the Chapter 3, “Setting System,” in this guide, if you have not already installed this AR-B9629.
Check the packing list before you install and make sure the accessories are completely included.
AR-B9629 CD provides the newest information regarding the CPU card. Please refer to the README.DOC file
of the enclosed utility CD. It contains the modification and hardware & software information, and adding the
description or modification of product function after manual printed.
0.4 RETURNING YOUR BOARD FOR SERVICE
If your board requires any services, contact the distributor or sales representative from whom you purchased the
product for service information. If you need to ship your board to us for service, be sure it is packed in a protective
carton. We recommend that you keep the original shipping container for this purpose.
You can help assure efficient servicing for your product by following these guidelines:
1. Include your name, address, daytime telephone, facsimile number and E-mail.
2. A description of the system configuration and/or software at the time of malfunction.
3. A brief description of the problem occurred.
0.5 TECHNICAL SUPPORT AND USER COMMENTS
User’s comments are always welcome as they assist us in improving the quality of our products and the
understanding of our publications. They create a very important part of the input used for product enhancement
and revision.
We may use and distribute any of the information you provide in any way we appropriate without incurring any
obligation. You may, of course, continue to use the information you provide.
If you have any suggestions for improving particular sections or if you find any errors, please send your
comments to Acrosser Technology Co., Ltd. or your local sales representative and indicate the manual title and
book number.
Internet electronic mail to: [email protected]

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0.6 ORGANIZATION
This information for users covers the following topics (see the Table of Contents for a detailed listing):
! Chapter 1, “Overview”, provides an overview of the system features and packing list.
! Chapter 2, “System Controller” describes the major structure.
! Chapter 3, “Setting Up the System”, describes how to adjust the jumper, and the connectors setting.
! Chapter 4, “BIOS Console”, providing the BIOS options setting.
! Chapter 5, Specifications
! Chapter 6, Placement & Dimensions
0.7 STATIC ELECTRICITY PRECAUTIONS
Before removing the board from its anti-static bag, read this section about static electricity precautions.
Static electricity is a constant danger to the computer systems. The charge that can build up in your body may be
more than sufficient to damage integrated circuits on any PC board. Therefore, It is an important to observe basic
precautions whenever you use or handle computer components. Although areas with humid climates are much
less prone to static build-up, it is always the best to safeguard against accidents, which may result in expensive
repairs. The following measures should generally be sufficient to protect your equipment from static discharge:
• Touch a grounded metal object to discharge the static electricity in your body (or ideally, wear a grounded
wrist strap).
• When unpacking and handling the board or other system components, place all materials on an antic static
surface.
• Be careful not to touch the components on the board, especially the “golden finger” connectors on the bottom
of every board.

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1. OVERVIEW
This chapter provides an overview of your system features and capabilities. The following topics are covered:
! Introduction
! Packing List
! Features
1.1 INTRODUCTION
The AR-B9629 is a new generation half-size, 386SX board. This card offers much greater performance than the
older cards such as support for onboard 2MB DRAM.
The unit also comes with a programmable watchdog timer and other typical interfaces. The 386 CPU board is
excellent for embedded systems, MMI’s, workstations, medical applications or POS/POI systems.
1.2 PACKING LIST
The accessories are included with the system. Before you begin installing your AR-B9629 board, take a moment
to make sure that the following items have been included inside the AR-B9629 package.
! The quick setup manual
! 1 AR-B9629 all-in-one single CPU board
! 1 AR-B9449 ISA card (Reserved)
! 1 Parallel port interface cable (Reserved)
! 1 PS/2 mouse & keyboard cables (Reserved)
1.3 FEATURES
The system provides a number of special features that enhance its reliability, ensure its availability, and improve its
expansion capabilities, as well as its hardware structure.
! ALI 80386SX-33/40 MHz CPU
! PC/AT compatible keyboard & Mouse
! Programmable watchdog timer
! Flash BIOS
! Signal 5V power requirement
! Multi-layer PCB for noise reduction
! Dimensions: 82.6mmX57.2mm

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2. SYSTEM CONTROLLER
This chapter describes the major structure of the AR-B9629 CPU board. The following topics are covered:
! Microprocessor
! DMA Controller
! Keyboard Controller
! Interrupt Controller
! Serial Port (AR-B9449)
! Parallel Port (AR-B9449)
2.1 MICROPROCESSOR
The AR-B9629 uses the ALI M6117 CPU; it is designed to perform systems like Intel’s 386SX system with deep
green features.
The 386SX core is the same as M1386SX of Acer Labs. Inc. and 100% object code compatible with the Intel
386SX microprocessor. System manufacturers can provide 386 CPU based systems optimized for both cost and
size. Instruction pipelining and high bus bandwidth ensure short average instruction execution time and high
system production. Furthermore, it can keep the state internally from charge leakage while external clock to the
core is stopped without storing the data in registers. The power consumption here is almost zero until the clock
stops. The internal structure of this core is 32-bit data and address bus with very low supply current. Real mode
as well as Protected mode are available and can run MS-DOS /MS-Windows.
2.2 DMA CONTROLLER
The equivalent of two 8237A DMA controllers are implemented in the AR-B9629 board. Each controller is a four-
channel DMA device that will generate the memory addresses and will control signals necessary to transfer
information directly between a peripheral device and memory. This allows high speeding information transference with
less CPU intervention. The two DMA controllers are internally cascaded to provide four DMA channels for
transferring to 8-bit peripherals (DMA1) and three channels for transferring to 16-bit peripherals (DMA2). DMA2
channel 0 provides the cascade interconnection between the two DMA devices, thereby maintaining IBM PC/AT
compatibility.
The following is the system information of DMA channels:
DMA Controller 1 DMA Controller 2
Channel 0: Spare Channel 4: Cascade for controller 1
Channel 1: IBM SDLC Channel 5: Spare
Channel 2: Diskette adapter Channel 6: Spare
Channel 3: Spare Channel 7: Spare
Table 2-1 DMA Channel Controller

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2.3 KEYBOARD CONTROLLER
The 8042 processor is programmed to support the keyboard serial interface. The keyboard controller receives
serial data from the keyboard, checks its parity, translates scan codes, and presents it to the system as a byte data
in its output buffer. The controller can interrupt the system when data is placed in its output buffer, or wait for the
system to poll its status register to determine when data is available.
Data can be written to the keyboard by writing data to the output buffer of the keyboard controller.
Each byte of data is sent to the keyboard controller in series with an odd parity bit automatically inserted. The
keyboard controller is required to acknowledge all data transmissions. Therefore, another byte of data will not be
sent to keyboard controller until acknowledgment is received for the previous byte sent. The “output buffer full”
interruption may be used for both send-and-receive routines.
2.4 INTERRUPT CONTROLLER
The equivalent of two 8259 Programmable Interrupt Controllers (PIC) are included on the AR-B9629 board. They
accept requests from peripherals, resolve priorities on pending interrupts in service, issue interrupt requests to the
CPU, and provide vectors which are used as acceptance indices by the CPU to determine which interrupt service
routine to execute.
The following is the system information of interrupts levels:
Interrupt Level Description
NMI Paritycheck
CTRL1 CTRL2
IRQ 0 System timer interrupt from timer 8254
IRQ 1 Keyboard output buffer full
IRQ2 ReroutingtoIRQ8&IRQ14
IRQ 4 Serial port 1 (AR-B9449)
IRQ 6 Floppy disk adapter (AR-B9449)
IRQ 7 Parallel port 1 (AR-B9449)
IRQ 8: Real time clock
IRQ 12: PS/2 mouse
IRQ 13: Math. coprocessor
IRQ 14: Hard disk adapter (AR-B9449)
Figure 2-1 Interrupt Controller

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2.4.1 I/O Port Address Map
Hex Range Device
000-01F DMA controller 1
020-021 Interrupt controller 1
022-023 ALI M6117 chipset address
040-04F Timer 1
050-05F Timer 2
060-06F 8042 keyboard/controller
070-071 Real-time clock (RTC), non-maskable interrupt (NMI)
080-09F DMA page registers
0A0-0A1 Interrupt controller 2
0C0-0DF DMA controller 2
0F0 Clear Math Co-processor
0F1 Reset Math Co-processor
0F8-0FF Math Co-processor
170-178 Fixed disk 1
1F0-1F8 Fixed disk 0
208-20A EMS register 0
218-21A EMS register 1
300-31F Prototype card/streaming type adapter
378-37F Parallel printer port 1 (LPT 1)
380-38F SDLC, bisynchronous
3A0-3AF Bisynchronous
3B0-3BF Monochrome display and printer port 3 (LPT 3)
3D0-3DF Color/graphics monitor adapter
3F0-3F7 Diskette controller
3F8-3FF Serial port 1 (COM 1)
Table 2-2 I/O Port Address Map

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2.4.2 Real-Time Clock and Non-Volatile RAM
The AR-B9629 contains a real-time clock compartment that maintains the date and time in addition to storing
configuration information about the computer system. It contains 14 bytes of clock and control registers and 114
bytes of general purpose RAM. Because of the use of CMOS technology, it consumes very little power and can be
maintained for long periods of time using an internal Lithium battery. The contents of each byte in the CMOS RAM
are listed below:
Address Description
00 Seconds
01 Second alarm
02 Minutes
03 Minute alarm
04 Hours
05 Hour alarm
06 Day of week
07 Date of month
08 Month
09 Year
0A Status register A
0B Status register B
0C Status register C
0D Status register D
0E Diagnostic status byte
0F Shutdown status byte
10 Diskette drive type byte, drive A and B
11 Fixed disk type byte, drive C
12 Fixed disk type byte, drive D
13 Reserved
14 Equipment byte
15 Low base memory byte
16 High base memory byte
17 Low expansion memory byte
18 High expansion memory byte
19-2D Reserved
2E-2F 2-byte CMOS checksum
30 Low actual expansion memory byte
31 High actual expansion memory byte
32 Date century byte
33 Information flags (set during power on)
34-7F Reserved for system BIOS
Table 2-3 Real-Time Clock & Non-Volatile RAM
2.4.3 Timer
The AR-B9629 provides three programmable timers, each with a timing frequency of 1.19 MHz.
Timer 0 The output of this timer is tied to interrupt request 0. (IRQ 0)
Timer 1 This timer is used to trigger memory refresh cycles.
Timer 2 This timer provides the speaker tone.
Application programs can load different counts into this timer to generate various sound frequencies.

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2.5 SERIAL PORT
The ACEs (Asynchronous Communication Elements ACE1 to ACE4) are not only used to convert parallel data to a
serial format on the transmit side but also used to convert serial data to parallel on the receiver side. In order of
transmission and reception, the serial format is a start bit, followed by five to eight data bits, a parity bit (if
programmed) and one, one and half (five-bit format only) or two stop bits. The ACEs are capable of handling
divisors of 1 to 65535, and produce a 16x clock for driving the internal transmitter logic.
Provisions are not only included to use this 16x clock to drive the receiver logic but also included in the ACE as a
completed MODEM control capability, and a processor interrupt system that may be software tailored to the
computing time required to handle the communications link.
The following table is a summary of each ACE accessible register
DLAB Port Address Register
Receiver buffer (read)0 base + 0 Transmitter holding register (write)
0 base + 1 Interrupt enable
X base + 2 Interrupt identification (read only)
X base + 3 Line control
X base + 4 MODEM control
X base + 5 Line status
X base + 6 MODEM status
X base + 7 Scratched register
1 base + 0 Divisor latch (least significant byte)
1 base + 1 Divisor latch (most significant byte)
Table 2-4 ACE Accessible Registers
(1) Receiver Buffer Register (RBR)
Bit 0-7: Received data byte (Read Only)
(2) Transmitter Holding Register (THR)
Bit 0-7: Transmitter holding data byte (Write Only)
(3) Interrupt Enable Register (IER)
Bit 0: Enable Received Data Available Interrupt (ERBFI)
Bit 1: Enable Transmitter Holding Empty Interrupt (ETBEI)
Bit 2: Enable Receiver Line Status Interrupt (ELSI)
Bit 3: Enable MODEM Status Interrupt (EDSSI)
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
(4) Interrupt Identification Register (IIR)
Bit 0: “0” if Interrupt Pending
Bit 1: Interrupt ID Bit 0
Bit 2: Interrupt ID Bit 1
Bit 3: Must be 0
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0

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(5) Line Control Register (LCR)
Bit 0: Word Length Select Bit 0 (WLS0)
Bit 1: Word Length Select Bit 1 (WLS1)
WLS1 WLS0 Word Length
0 0 5 Bits
0 1 6 Bits
1 0 7 Bits
1 1 8 Bits
Bit 2: Number of Stop Bit (STB)
Bit 3: Parity Enable (PEN)
Bit 4: Even Parity Select (EPS)
Bit 5: Stick Parity
Bit 6: Set Break
Bit 7: Divisor Latch Access Bit (DLAB)
(6) MODEM Control Register (MCR)
Bit 0: Data Terminal Ready (DTR)
Bit 1: Request to Send (RTS)
Bit 2: Out 1 (OUT 1)
Bit 3: Out 2 (OUT 2)
Bit 4: Loop
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
(7) Line Status Register (LSR)
Bit 0: Data Ready (DR)
Bit 1: Overrun Error (OR)
Bit 2: Parity Error (PE)
Bit 3: Framing Error (FE)
Bit 4: Break Interrupt (BI)
Bit 5: Transmitter Holding Register Empty (THRE)
Bit 6: Transmitter Shift Register Empty (TSRE)
Bit 7: Must be 0
(8) MODEM Status Register (MSR)
Bit 0: Delta Clear to Send (DCTS)
Bit 1: Delta Data Set Ready (DDSR)
Bit 2: Training Edge Ring Indicator (TERI)
Bit 3: Delta Receive Line Signal Detect (DSLSD)
Bit 4: Clear to Send (CTS)
Bit 5: Data Set Ready (DSR)
Bit 6: Ring Indicator (RI)
Bit 7: Received Line Signal Detect (RSLD)

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(9) Divisor Latch (LS, MS)
LS MS
Bit 0: Bit 0 Bit 8
Bit 1: Bit 1 Bit 9
Bit 2: Bit 2 Bit 10
Bit 3: Bit 3 Bit 11
Bit 4: Bit 4 Bit 12
Bit 5: Bit 5 Bit 13
Bit 6: Bit 6 Bit 14
Bit 7: Bit 7 Bit 15
Desired Baud Rate Divisor Used to Generate 16x Clock
300 384
600 192
1200 96
1800 64
2400 48
3600 32
4800 24
9600 12
14400 8
19200 6
28800 4
38400 3
57600 2
115200 1
Table 2-5 Serial Port Divisor Latch
2.6 PARALLEL PORT
(1) Register Address
Port Address Read/Write Register
base + 0 Write Output data
base + 0 Read Input data
base + 1 Read Printer status buffer
base + 2 Write Printer control latch
Table 2-6 Registers’ Address
(2) Printer Interface Logic
The parallel portion of the SMC37C669 makes the attachment of various devices that accept eight bits of parallel
data at standard TTL level.
(3) Data Swapper
The system microprocessor can read the contents of the printer’s Data Latch through the Data Swapper by reading
the Data Swapper address.

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(4) Printer Status Buffer
The system microprocessor can read the printer status by reading the address of the Printer Status Buffer. The bit
definitions are described below:
XXX
12345670
-ERROR
SLCT
PE
-ACK
-BUSY
Figure 2-2 Printer Status Buffer
NOTE: X represents not used.
Bit 7: This signal may become active during data entry, when the printer is off-line during printing, or when the
print head is changing position or in an error state. When Bit 7 is active, the printer is busy and cannot
accept data.
Bit 6: This bit represents the current state of the printer’s ACK signal. A 0 means the printer has received the
character and is ready to accept another. Normally, this signal will be active for approximately 5
microseconds before receiving a BUSY message stops.
Bit 5: A 1 means the printer has detected the end of the paper.
Bit 4: A 1 means the printer is selected.
Bit 3: A 0 means the printer has encountered an error condition.

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(5) Printer Control Latch & Printer Control Swapper
The system microprocessor can read the contents of the printer control latch by reading the address of printer
control swapper. Bit definitions are as follows:
XX
12345670
STROBE
AUTO FD XT
INIT
SLDC IN
IRQ ENABLE
DIR(write only)
Figure 2-3 Bit’s Definition
NOTE: X represents not used.
Bit 5: Direction control bit. When logic 1, the output buffers in the parallel port are disabled allowing data driven
from external sources to be read; when logic 0, they work as a printer port. This bit is writing only.
Bit 4: A 1 in this position allows an interrupt to occur when ACK changes from low state to high state.
Bit 3: A 1 in this bit position selects the printer.
Bit 2: A 0 starts the printer (50 microseconds pulse, minimum).
Bit 1: A 1 causes the printer to line-feed after a line is printed.
Bit 0: A 0.5 microsecond minimum highly active pulse clocks data into the printer. Valid data must be present
for a minimum of 0.5 microseconds before and after the strobe pulse.

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3. SETTING UP THE SYSTEM
This section describes the pin assignments for system’s external connectors and the jumper settings.
! Overview
! System Setting
3.1 OVERVIEW
The AR-B9629 is an all-in-one, half-size, 386SX CPU board. This section provides hardware jumper settings, the
connectors’ locations, and the pin assignment.
CAUTION: The CPU board doesn’t support the SIMM-type DRAM.
Figure 3-1 External System Location

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3.2 SYSTEM SETTINGS
Jumper pins allow you to set specific system parameters. Set them by changing the pin location of jumper blocks.
(A jumper block is a small plastic-encased conductor [shorting plug] that slips over the pins.) To change a jumper
setting, remove the jumper from its current location with your fingers or small needle-nosed pliers. Place the
jumper over the two pins designated for the desired setting. Press the jumper evenly onto the pins. Be careful not
to bend the pins.
We will show the locations of the AR-B9629 jumper pins, and the factory-default settings.
CAUTION: Do not touch any electronic component unless you are safely grounded. Wear a grounded wrist strap
or touch an exposed metal part of the system unit chassis. The static discharges from your fingers can
permanently damage the electronic components.
3.2.1 Clock Jumper (JP1)
2
5
3
1
6
4
GND
GND
GND
FS2
FS1
FS0
J2*3
JP1
JP1: Clock Jumper
3.2.2 Reset (JI)
Reserved
1
2
1-2
J1*2
J1
(2.54mm)
System ResetShort
JI: Reset
3.2.3 PS2 KB4 Mouse (J4)
165432
MSD
KBD
VDD KBC
MSC
VMK1
JST6S
J4
(2.0mm) 1 :
6 :
5 :
4 :
3 :
2 :
J4: PS2 KB4 Mouse

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3.2.4 ISA Bus Connector (CN1)
2
9
7
5
3
1
10
8
6
4
30
28
26
24
22
20
18
16
14
12
50
48
46
44
42
40
38
36
34
32
33
31
29
27
25
23
21
19
17
15
13
11
35
49
47
45
43
41
39
37
GND
RSTDRV
VCC
/MEMW
(+12)
OSC
BUSCLK
IRQ9
/IOR
/IOW
GND
/ZWS
SA11
SA12
SA13
AEN
SD7
DIP50
CN1
SA7
SD1
SD2
SD3
SD4
SD6
SD5
SD0
/IORDY
SA10
SA9
SA8
SA2
SA3
SA4
SA5
SA6
SA1
SA0
/MEMR
SA14
SA15
SA16
SA17
SA18
SA19
IRQ7
VCC
IRQ3
IRQ4
IRQ5
IRQ6
GND
CN1: ISA Bus Connector

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2
9
7
5
3
1
10
8
6
4
30
28
26
24
22
20
18
16
14
12
50
48
46
44
42
40
38
36
34
32
33
31
29
27
25
23
21
19
17
15
13
11
35
49
47
45
43
41
39
37
DRQ1
DRQ2
DRQ3
LA23
TC
DRQ5
/DACK0
IRQ10
/IO16
/MEM16
(-12)
BALE
(-5)
DRQ0
IRQ14
IRQ15
IRQ12
IRQ11
/DACK5
/DACK6
/DACK7
DRQ6
DRQ7
MASTER
VCC
GND
GND
/DACK3
/DACK2
/DACK1
/REFSH
/IOCHK
/SBHE
LA17
LA18
LA19
LA20
LA21
LA22
/MRD16
/MWR16
SD8
DIP50
CN2
SD10
SD9
SD12
SD11
SD13
SD14
SD15
GND
CN2: ISA Bus Connector
3.2.5 External Buzzer (J2)
Reserved
1
2
1:VCC
2:EXTSPK
J2P
J2
J2: External Buzzer