Acrosser Technology AR-B1543 User manual

AR-B1543 User’s Guide
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AR-B1543
INDUSTRIAL GRADE
CPU BOARD
User’ s Guide
Edition: 1.1
Book Number: AR-B1543-99.A01

AR-B1543 User’s Guide
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Table of Contents
0. PREFACE.....................................................................................................................................................................4
0.1COPYRIGHT NOTICE AND DISCLAIMER .............................................................................................................. 4
0.2 WELCOME TO THE AR-B1543 CPU BOARD ........................................................................................................ 4
0.3 BEFORE YOU USE THIS GUIDE ........................................................................................................................... 4
0.4 RETURNING YOUR BOARD FOR SERVICE......................................................................................................... 4
0.5 TECHNICAL SUPPORT AND USER COMMENTS................................................................................................. 4
0.6 ORGANIZATION ..................................................................................................................................................... 5
0.7 STATIC ELECTRICITY PRECAUTIONS ................................................................................................................. 5
1. OVERVIEW...................................................................................................................................................................6
1.1SPECIFICATION ...................................................................................................................................................... 6
1.2 PACKING LIST ........................................................................................................................................................ 6
1.3 FEATURES.............................................................................................................................................................. 7
2. SYSTEM CONTROLLER .............................................................................................................................................8
2.1 MICROPROCESSOR.............................................................................................................................................. 8
2.2 DMA CONTROLLER ............................................................................................................................................... 8
2.3 KEYBOARD CONTROLLER ................................................................................................................................... 9
2.4 INTERRUPT CONTROLLER................................................................................................................................... 9
2.4.1 I/O Port Address Map.......................................................................................................................................................... 10
2.4.2 Real-Time Clock and Non-Volatile RAM.............................................................................................................................. 11
2.4.3 Timer................................................................................................................................................................................... 11
2.5 SERIAL PORT....................................................................................................................................................... 12
2.6 PARALLEL PORT.................................................................................................................................................. 14
3. SETTING UP THE SYSTEM.......................................................................................................................................16
3.1 OVERVIEW ........................................................................................................................................................... 16
3.2 SYSTEM SETTING ............................................................................................................................................... 16
3.2.1 Hard Disk (IDE) Connector.................................................................................................................................................. 17
3.2.2 FDD Port Connector (CN2).................................................................................................................................................. 18
3.2.3 Network Setting (LAN1)....................................................................................................................................................... 18
3.2.4 PS/2 KB/Mouse Connector (CN3 & PS1) ............................................................................................................................ 19
3.2.5 PS-ON Header (CN4).......................................................................................................................................................... 19
3.2.6 Reset Header (J10) ............................................................................................................................................................. 19
3.2.7 Power Connector (PWR1) ................................................................................................................................................... 19
3.2.8 CRT Connector (DB2) ......................................................................................................................................................... 20
3.2.9 LCD Supported Voltage Select (JP6) .................................................................................................................................. 20
3.2.10 LCD Panel Display Connector (LCD1)............................................................................................................................... 20
3.2.11 LED Header (J1) ............................................................................................................................................................... 21
3.2.12 USB CONNECTOR(USB1) .............................................................................................................................. 21
3.2.13 PC104 Connector.............................................................................................................................................................. 21
3.2.14 Parallel Port Connector (CN1) ........................................................................................................................................... 23
3.2.15 IR. Header (J5).................................................................................................................................................................. 23
3.2.16 Ext. Battery (J3)................................................................................................................................................................. 23
3.2.17 Battery Jumper (JP3)......................................................................................................................................................... 23
3.2.18 COM1, COM2 (DB1, CN5) ................................................................................................................................................ 24
3.2.19 Touch Screen Connector (J7 & J9).................................................................................................................................... 25
3.2.20 D.O.C. Memory Bank Address Select (JP2) ...................................................................................................................... 25
3.2.21 ATX POWER External Bottom Connector (J4)................................................................................................................... 25
3.2.22 LVDS Header (LVDS1)...................................................................................................................................................... 26
3.2.23 LVDS Supported Voltage Select (JP5) .............................................................................................................................. 26
3.2.24 Ethernet Setup (JP4)......................................................................................................................................................... 26
3.2.25 PCI SOLT Voltage Select (J11) ......................................................................................................................................... 26
3.2.26 Burn-in use (JP1 & J2) ...................................................................................................................................................... 27
3.3 WATCHDOG TIMER ............................................................................................................................................. 27
3.3.1 Watchdog Timer Setting...................................................................................................................................................... 27
3.3.2 Watchdog Timer Trigger...................................................................................................................................................... 28
4. INSTALLATION..........................................................................................................................................................28
4.1 OVERVIEW ........................................................................................................................................................... 28
4.2 UTILITY DISKETTE............................................................................................................................................... 29
4.2.1 Driver Installation................................................................................................................................................................. 29
5. BIOS CONSOLE.........................................................................................................................................................29
5.1 BIOS SETUP OVERVIEW..................................................................................................................................... 29
5.2 STANDARD CMOS SETUP .................................................................................................................................. 30
5.3 BIOS FEATURES SETUP ..................................................................................................................................... 31
5.4 CHIPSET FEATURES SETUP .............................................................................................................................. 33
5.5 PNP/PCI CONFIGURATION ................................................................................................................................. 34
5.6 LOAD DEFAULT SETTING ................................................................................................................................... 34

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5.6.1 Load BIOS Defaults............................................................................................................................................................. 34
5.6.2 Load Setup Defaults............................................................................................................................................................ 35
5.7 INTEGRATED PERIPHERALS.............................................................................................................................. 35
Multiple Monitor Support ......................................................................................................................................... 36
5.8 POWER MANAGEMENT SETUP ......................................................................................................................... 36
5.9 PASSWORD SETTING ......................................................................................................................................... 36
5.9.1 Setting Password ................................................................................................................................................................ 36
5.9.2 Password Checking............................................................................................................................................................. 37
5.10 IDE HDD AUTO DETECTION ............................................................................................................................. 37
5.11 BIOS EXIT ........................................................................................................................................................... 37
5.11.1 Save & Exit Setup ............................................................................................................................................................. 37
5.11.2 Exit Without Saving ........................................................................................................................................................... 37
6. PCI CONNECTOR......................................................................................................................................................37

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0. PREFACE
0.1COPYRIGHT NOTICE AND DISCLAIMER
April 2001
Acrosser Technology makes no representations or warranties with respect to the contents hereof and specifically
disclaims any implied warranties of merchantability or fitness for any particular purpose. Furthermore, Acrosser
Technology reserves the right to revise this publication and to make changes from time to time in the contents
hereof without obligation of Acrosser Technology to notify any person of such revisions or changes. Changes will
be posted on the Internet (WWW.ACROSSER.COM) as soon as possible, but there is obligation on the part of
Acrosser to this fact.
Possession, use, or copying of the software described in this publication is authorized only pursuant to a valid
written license from Acrosser or an authorized sub licensor.
(C) Copyright Acrosser Technology Co., Ltd., 2001. All rights Reserved.
No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated
into any language or computer language, in any form or any means, electronic, mechanical, magnetic, optical,
chemical, manual or otherwise, without the prior written consent of Acrosser Technology.
Acrosser, AMI, IBM PC/AT, ALI, Windows 3.1, MS-DOS, …are registered trademarks.
All other trademarks and registered trademarks are the property of their respective holders.
0.2 WELCOME TO THE AR-B1543 CPU BOARD
This guide introduces the Acrosser AR-B1543 CPU board.
The following information describes about the card functions, features, including the way to start, set up and
operate your AR-B1543. General system information can also be found here.
0.3 BEFORE YOU USE THIS GUIDE
If you have not already installed this AR-B1543, refer to the Chapter 3, “Setting Up The System” in this guide.
Check the packing list; make sure the accessories are complete.
The AR-B1543 CD provides the newest information about the card. Please refer to the files of the enclosed
utility CD. It contains the modification, hardware & software information. And it also has updated the product
functions that may not be mentioned here.
0.4 RETURNING YOUR BOARD FOR SERVICE
If your board requires servicing, contact the dealer from whom you purchased the product for service information.
If you need to ship your board to us for service, be sure it is packed in a protective carton. We recommend that
you keep the original packaging for this purpose.
You can assure efficient servicing of your product by following these guidelines:
1. Include your name, address, daytime telephone and facsimile numbers and E-mail.
2. A description of the system configuration and/or software at the time is malfunction,
3. A brief description of the symptoms.
0.5 TECHNICAL SUPPORT AND USER COMMENTS
User’s comments are always welcome as they assist us in improving the usefulness of our products and the
understanding of our publications. They form a very important part of the input used for product enhancement
and revision. In any case, we believe that the information that you supply is appropriate for us to use and
distribute it without incurring any obligation. You may, of course, continue to use the information you supply.
If you have suggestions for improving particular sections or if you find any errors, please indicate the manual title
and book number.
Please send your comments to Acrosser Technology Co., Ltd. or your local sales representative.
Internet electronic mail to: [email protected]
Check our FAQ sheet for quick fixes to known technical problems.

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0.6 ORGANIZATION
This manual covers the following topics (see the Table of Contents for a detailed listing):
! Chapter 1, “Overview”, provides an overview of the system features and packing list.
! Chapter 2, “System Controller” describes the major structure.
! Chapter 3, “Setting Up the System”, describes how to adjust the jumper, and the connector’s settings.
! Chapter 4, “Installation”, describes setup procedures including information on the utility diskette.
! Chapter 5, “BIOS Console”, provides the BIOS options settings.
0.7 STATIC ELECTRICITY PRECAUTIONS
Before removing the board from its anti-static bag, read this section about static electricity precautions.
Static electricity is a constant danger to computer systems. The charge that can build up in your body may be
more than sufficient to damage integrated circuits on any PC board. Therefore, it is very important to observe
basic precautions whenever you use or handle computer components. Although areas with humid climates are
much less prone to static build-up, it is always best to safeguard against accidents that may result in expensive
repairs. The following measures should be sufficient to protect your equipment from static discharge:
• Touch a grounded metal object to discharge the static electricity in your body (or ideally, wear a grounded
wrist strap).
• When unpacking and handling the board or other system components, place all materials on an anti-static
surface.
• Be careful not to touch the components on the board, especially the “golden finger” connectors on the bottom
of the board.

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1. OVERVIEW
AR-B1543 Is a Pentium Grade CPU Board with Ethernet, DOC, and Compact Flash (option).
This chapter provides an overview of your system features and capabilities. The following topics are covered:
! Specification
! Packing List
! Features
1.1SPECIFICATION
! CPU : NS GEODE GX1 BGA.
! Chipset: Cyrix CS5530A.
! RAM Memory: Support 1xDIMM 168-Pin socket, 128M maximum.
! SSD: Support one socket for DiskOnChip.
! Watchdog:Sofeware programmable 1~63sec.
! VGA Display: CS5530A UMA,Memory Size 1~4MB.
CRT-with HDB 15-pin connector.
LCD with 2.0mm 44-pin Header
LVDS Interface with 2.0 mm 26-pin Header
! Ethernet: RTL8100C chipset, supports 10/100M baseT with RJ-45 connector built-in LED.
! Super I/O: Winbond 83977F-A
2 EIDE (Ultra DMA33)–with one 2.54 mm 40-pin connector and
one 2.00 mm 44-pin connector
1 FDC –with 2.54 mm 34-pin connector.
1 Parallel –with 2.54 mm 26-pin connector (supports SPP/EPP/ECP mode).
1RS-232C/RS485 –COM1 Share with 485
1 RS-232C /IrDA/Touch Screen –with 2.54 mm 10-pin connector
RS-232C is selectable by jumper and use the same connector.
IrDA with 2.54mm 5-pin header.
Touch Screen with 2.0mm 3-pin JST connector.
! BIOS: Flash BIOS Award.
! Keyboard/Mouse: PS/2 compatible 6-pin mini-DIN connector and JST 6pin.
! USB: Built-in 2ports USB interface with 2.54mm 10-pin headers.
! RTC: Chipset including, Support ACPI function with 10 years data retention.
! Expansion Bus: PC/104, PCI Bus.
! Power Connector: One 4-pin Wafer Connector.
! Power Req.: +5V-1.4A maximum and 12V –0.01A maximum.
! PC Board: 6 layers,EMI considered
! Dimensions: 185 mm x 122 mm (7.3”x4.8”)
1.2 PACKING LIST
Some accessories are included with the system. Before AR-B1543 has been installed, please take a moment to
make sure that the following items have been included inside the AR-B1543 package.
! The quick setup manual
! 1 AR-B1543 all-in-one single CPU board
! Software utility CD.
! 2HD cable (one 2.54mm, one 2.0mm).
! FD cable.
! USB, AR-B9462A (optional)
! KB/Mouse (one mini din)
! COM 2 cable (2*5pin)
! Parallel cable (2*13pin)

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1.3 FEATURES
The system provides a number of special features that enhance its reliability, ensure its long-term availability, and
improve its expansion capabilities, as well as its hardware structure.
! CPU NS GEODE GX1.
! Cyrix CS5530A Chipset .
! 1xDIMM SDRAM.
! Supports DOC Flash Disk.
! 10/100M-Base Ethernet.
! Compact Flash (AR-B9462A) optional.
! Award BIOS.
! Power Req.: +5V-1.4A maximum and 12V –0.01A maximum.
! Dimensions: 185 mm x 122 mm (7.3”x4.8”).

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2. SYSTEM CONTROLLER
This chapter describes the main structure of the AR-B1543 CPU board. The following topics are covered:
! Microprocessors
! DMA Controller
! Keyboard Controller
! Interrupt Controller
! Serial Port
! Parallel Port
2.1 MICROPROCESSOR
The AR-B1543 uses the NS GEODE GX1 CPU, it is an advanced 32-bit x86 compatible processor offering high
performance, fully accelerated 2D graphics, a 64-synchronous DRAM controller and a PCI bus controller, all on a
single chip. This latest generation of the Media GX processor enables a new class of premium performance
notebook/desktop, and IPC computer designs.
The Media GX MMX enhanced processor companion chips provide advanced video and audio functions and
permit direct interface to memory. This high-performance 64-bit processor is x86 instruction set compatible and
supports MMX technology.
This processor is the latest member of the NS Media GX family, offering high performance, fully accelerated 2D
graphics, synchronous memory interface and a PCI bus controller, all on a single chip. As described in separate
manuals, the CS5520 and the CS5530 I/O Companion chips fully enable the features of the Media GX processor
with MMX support. These features include full VGA and VESA video, 16-bit stereo sound, IDE interface, ISA
interface, SMM power management, and AT compatibility logic. In addition, the newer CS5530 provides an Ultra
DMA/33 interface, MPEG2 assist, and is AC97 Version 2.0 audio compliant.
In addition to the advanced CPU features, the Media GX processor integrates a host of functions in which typically
implemented with external components. A full-function graphics accelerator provides pixel processing and
rendering functions.
The NS Media GX MMX-Enhanced Processor represents a new generation of x86-compatible 64-bit
microprocessors with sixth-generation features. The decoupled load/store unit (within the memory management
unit) allows multiple instructions in a single clock cycle. Other features include single-cycle execution, single-cycle
instruction decode, 16KB write-back cache, and clock rates up to 266MHz. These features are possible by the use
of advanced-process technologies and super pipelining.
2.2 DMA CONTROLLER
The equivalent of two 8237A DMA controllers are implemented on the AR-B1543 board. Each controller is a four-
channel DMA device that will generate the memory addresses and control signals necessary to transfer
information directly between a peripheral device and memory. This allows high-speed information transfer with less
CPU intervention. The two DMA controllers are internally cascaded to provide four DMA channels to transfer to 8-
bit peripherals (DMA1) and three channels to transfers to 16-bit peripherals (DMA2). DMA2 channel 0 provides the
cascade interconnection between the two DMA devices, thereby maintaining IBM PC/AT compatibility.
The Following is the system information for the DMA channels:
Slave with four 8-bit chnls Master with three 16-bit chnls
DMA Controller 1 DMA Controller 2
Channel 0: Spare Channel 4(0): Cascade for controller 1
Channel 1: IBM SDLC Channel 5(1): Spare
Channel 2: Diskette adapter Channel 6(2): Spare
Channel 3: Spare Channel 7(3): Spare
DMA Channel Controller

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2.3 KEYBOARD CONTROLLER
The 8042 processor is programmed to support the keyboard serial interface. The keyboard controller receives
serial data from the keyboard, checks its parity, translates scan codes, and presents it to the system as a byte data
in its output buffer. The controller can interrupt the system when data is placed in its output buffer, or wait for the
system to poll its status register to determine when data is available.
Data can be written to the keyboard by writing data to the output buffer of the keyboard controller.
Each byte of data is sent to the keyboard controller in a series with an odd parity bit automatically inserted. The
keyboard controller is required to acknowledge all data transmissions. Therefore, another byte of data will not be
sent to keyboard controller until acknowledgment is received for the previous byte sent. The “output buffer full”
interruption may be used for both send and receive routines.
2.4 INTERRUPT CONTROLLER
The equivalent of two 8259 Programmable Interrupt Controllers (PIC) are included on the AR-B1543 board. They
accept requests from peripherals, resolve priorities on pending interrupts in service, issue interrupt requests to the
CPU, and provide vectors which are used as acceptance indices by the CPU to determine which interrupt service
routine to execute. These two controllers are cascaded with the second controller representing IRQ8 to IRQ15,
which is rerouted through IRQ2 on the first controller.
The following is the system information of interruption levels:
IRQ2
Interrupt Level Description
NMI Parity check
CTRL1
IRQ0
IRQ1
System timer interrupt from timer 8254
keyboard output buffer full
Rerouting to IRQ8 to IRQ15
CTRL2
IRQ8:Real time clock
IRQ9:Reserved
IRQ10:LAN adapters(based on PCI INT routing)
IRQ12:Reserved for PS/2 mouse
IRQ13:Math.Co-processor
IRQ14:Hard disk adapter
IRQ3 Serial port(depends on setup assignment)
IRQ4 Serial port(depends on setup assignment)
IRQ5 Reserved
IRQ6 Reserved for floppy disk adapter
IRQ7 Parallel port 1
IRQ15:Hard disk adapter
Interrupt Controller

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2.4.1 I/O Port Address Map
Hex Range Device
000-01F DMA controller 1
020-021 Interrupt controller 1
022-023 Cyrix CS5530
040-04F Timer 1
050-05F Timer 2
060-06F 8042 keyboard/controller
070-071 Real-time clock (RTC), non-mask able interrupt (NMI)
080-09F DMA page registers
0A0-0A1 Interrupt controller 2
0C0-0DF DMA controller 2
0F0 Clear Math Co-processor
0F1 Reset Math Co-processor
0F8-0FF Math Co-processor
170-178 Reserved for Fixed disk 1
1F0-1F8 Fixed disk 0
201 Reserved for Game port
208-20A EMS register 0
214 Watch Dog
218-21A EMS register 1
278-27F Parallel printer port (depends on setup assignment)
2E8-2EF Serial port (depends on setup assignment)
2F8-2FF Serial port (depends on setup assignment)
300-31F Prototype card/streaming type adapter
320-33F Reserved
378-37F Parallel printer port (depends on setup assignment)
380-38F SDLC, bisynchronous
3A0-3AF Bisynchronous
3B0-3BF Monochrome display and printer port 3 (LPT 3)
3C0-3CF EGA/VGA adapter
3D0-3DF Color/graphics monitor adapter
3E8-3EF Serial port 3 (depends on setup assignment)
3F0-3F7 Reserved for diskette controller
3F8-3FF Serial port (depends on setup assignment)
I/O Port Address Map

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2.4.2 Real-Time Clock and Non-Volatile RAM
The AR-B1543 contains a real-time clock compartment that maintains the date and time in addition to storing
configuration information about the computer system. It contains 14 bytes of clock and control registers and
114 bytes of general purpose RAM. Because of the use of CMOS technology, it consumes very little power
that can be maintained for long periods of time using an internal Lithium battery. The contents of each byte in
the CMOS RAM are listed as follows:
Real-Time Clock & Non-Volatile RAM
2.4.3 Timer
The AR-B1543 provides three programmable timers, each with a timing frequency of 1.19 MHz.
Timer 0 The output of this timer is tied to interrupt request 0. (IRQ 0)
Timer 1 This timer is used to trigger memory refresh cycles.
Timer 2 This timer provides the speaker tone.
Application programs can load different counts into this timer to generate various sound frequencies.
Address Description
00 Seconds
01 Second alarm
02 Minutes
03 Minute alarm
04 Hours
05 Hour alarm
06 Day of week
07 Date of month
08 Month
09 Year
0A Status register A
0B Status register B
0C Status register C
0D Status register D
0E Diagnostic status byte
0F Shutdown status byte
10 Diskette drive type byte, drive A and B
11 Fixed disk type byte, drive C
12 Fixed disk type byte, drive D
13 Reserved
14 Equipment byte
15 Low base memory byte
16 High base memory byte
17 Low expansion memory byte
18 High expansion memory byte
19-2D Reserved
2E-2F 2-byte CMOS checksum
30 Low actual expansion memory byte
31 High actual expansion memory byte
32 Date century byte
33 Information flags (set during power on)
34-7F Reserved for system BIOS

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2.5 SERIAL PORT
The ACEs (Asynchronous Communication Elements ACE1 to ACE4) are used to convert parallel data to a serial
format on the transmit side and convert serial data to parallel on the receiver side. The serial format, in order to
transmission and reception, is a start bit, followed by five to eight data bits, a parity bit (if programmed) and one,
1.5 (in a five-bit format only) or two stop bits (in a 6,7, or 8-bit format). The ACEs are capable of handling divisors
of 1 to 65535, and produce a 16x clock for driving the internal transmitter logic.
The provision is not only included the use of this 16x clock to drive the receiver logic. But also included in the ACE
as a completed MODEM control capability, and a processor interrupt system that may be software tailored to the
computing time required to handle the communications link.
The following table is a summary of each ACE accessible register
DLAB Port Address Register
Receiver buffer (read)0 base + 0
Transmitter holding register (write)
0 base + 1 Interrupt enable
X base + 2 Interrupt identification (read only)
X base + 3 Line control
X base + 4 MODEM control
X base + 5 Line status
X base + 6 MODEM status
X base + 7 Scratched register
1 base + 0 Divisor latch (least significant byte)
1 base + 1 Divisor latch (most significant byte)
ACE Accessible Registers
(1) Receiver Buffer Register (RBR)
Bit 0-7: Received data byte (Read Only)
(2) Transmitter Holding Register (THR)
Bit 0-7: Transmitter holding data byte (Write Only)
(3) Interrupt Enable Register (IER)
Bit 0: Enable Received Data Available Interrupt (ERBFI)
Bit 1: Enable Transmitter Holding Empty Interrupt (ETBEI)
Bit 2: Enable Receiver Line Status Interrupt (ELSI)
Bit 3: Enable MODEM Status Interrupt (EDSSI)
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
(4) Interrupt Identification Register (IIR)
Bit 0: “0” if Interrupt Pending
Bit 1: Interrupt ID Bit 0
Bit 2: Interrupt ID Bit 1
Bit 3: Must be 0
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0

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(5) Line Control Register (LCR)
Bit 0: Word Length Select Bit 0 (WLS0)
Bit 1: Word Length Select Bit 1 (WLS1)
Bit 2: Number of Stop Bit (STB)
Bit 3: Parity Enable (PEN)
Bit 4: Even Parity Select (EPS)
Bit 5: Stick Parity
Bit 6: Set Break
Bit 7: Divisor Latch Access Bit (DLAB)
(6) MODEM Control Register (MCR)
Bit 0: Data Terminal Ready (DTR)
Bit 1: Request to Send (RTS)
Bit 2: Out 1 (OUT 1)
Bit 3: Out 2 (OUT 2)
Bit 4: Loop
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
(7) Line Status Register (LSR)
Bit 0: Data Ready (DR)
Bit 1: Overrun Error (OR)
Bit 2: Parity Error (PE)
Bit 3: Framing Error (FE)
Bit 4: Break Interrupt (BI)
Bit 5: Transmitter Holding Register Empty (THRE)
Bit 6: Transmitter Shift Register Empty (TSRE)
Bit 7: Must be 0
(8) MODEM Status Register (MSR)
Bit 0: Delta Clear to Send (DCTS)
Bit 1: Delta Data Set Ready (DDSR)
Bit 2: Training Edge Ring Indicator (TERI)
Bit 3: Delta Receive Line Signal Detect (DSLSD)
Bit 4: Clear to Send (CTS)
Bit 5: Data Set Ready (DSR)
Bit 6: Ring Indicator (RI)
Bit 7: Received Line Signal Detect (RSLD)
(9) Divisor Latch (LS, MS)
LS MS
Bit 0: Bit 0 Bit 8
Bit 1: Bit 1 Bit 9
Bit 2: Bit 2 Bit 10
Bit 3: Bit 3 Bit 11
Bit 4: Bit 4 Bit 12
Bit 5: Bit 5 Bit 13
Bit 6: Bit 6 Bit 14
Bit 7: Bit 7 Bit 15
WLS1 WLS0 Word Length
0 0 5 Bits
0 1 6 Bits
1 0 7 Bits
1 1 8 Bits

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Desired Baud Rate Divisor Used to Generate 16x Clock
300 384
600 192
1200 96
1800 64
2400 48
3600 32
4800 24
9600 12
14400 8
19200 6
28800 4
38400 3
57600 2
115200 1
Serial Port Divisor Latch
2.6 PARALLEL PORT
(1) Register Address
Port Address Read/Write Register
base + 0 Write Output data
base + 0 Read Input data
base + 1 Read Printer status buffer
base + 2 Write Printer control latch
Registers’ Address
(2) Printer Interface Logic
The parallel port of the W83977F-A is for attaching various devices that accept eight bits of parallel data at
standard TTL level.
(3) Data Swapper
The system microprocessor can read the contents of the printer’s Data Latch through the Data Swapper by reading
the Data Swapper address.
(4) Printer Status Buffer
The system microprocessor can read the printer status by reading the address of the Printer Status Buffer. The bit
definitions are described as follows:
XXX
12345670
-ERROR
SLCT
PE
-ACK
-BUSY
Printer Status Buffer
NOTE: X presents not used.

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Bit 7: This signal may become active during data entry, when the printer is off-line during printing, or when the
print head is changing position or in an error state. When Bit 7 is active, the printer is busy and cannot
accept data.
Bit 6: This bit represents the current state of the printer’s ACK signal. A0 means the printer has received the
character and is ready to accept another. Normally, this signal will be active for approximately 5
microseconds before receiving a BUSY message stops.
Bit 5: A1 means the printer has detected the end of the paper.
Bit 4: A1 means the printer is selected.
Bit 3: A0 means the printer has encountered an error condition.
(5) Printer Control Latch & Printer Control Swapper
The system microprocessor can read the contents of the printer control latch by reading the address of printer
control swapper. Bit definitions are as follows:
XX1
2 3 4 5 6 70
STROBE
A
UTO FD XT
INIT
SLDC IN
IRQ ENABLE
DIR(write only)
Bit’s Definition
NOTE: X presents not used.
Bit 5:
Direction control bit. When logic 1, the output buffers in the parallel port are disabled allowing data driven
from external sources to be read; when logic 0, they work as a printer port. This bit is writing only.
Bit 4: A1 in this position allows an interrupt to occur when ACK changes from low state to high state.
Bit 3: A1 in this bit position selects the printer.
Bit 2: A0 starts the printer (50 microseconds pulse, minimum).
Bit 1: A1 causes the printer to line-feed after a line is printed.
Bit 0: A0.5 microsecond minimum highly active pulse clocks data into the printer. Valid data must be present for
a minimum of 0.5 microseconds before and after the strobe pulse.

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3. SETTING UP THE SYSTEM
This section describes pin assignments of on board connector and jumper settings.
! Overview
! System Setting
3.1 OVERVIEW
LVDS1
AR-B1543 is a Pentium Grade CPU Board, which supports Ethernet, DOC, SSD, Compact Flash (AR-B9462A)
functions. This section provides the hardware’s jumper settings, the connectors’ locations, and the pin assignments.
External System Location
3.2 SYSTEM SETTING
Jumper pins allow you to set specific system parameters. Set them by changing the pin location of jumper blocks.
(A jumper block is a small plastic-encased conductor that slips over the pins.) To change a jumper setting, remove
the jumper from its current location with your fingers or small needle-nosed pliers. Place the jumper over the two
pins designated for the desired setting. Press the jumper evenly onto the pins. Be careful not to bend the pins.
CAUTION: Do not touch any electronic components unless you are safely grounded. Wear a grounded wrist strap
or touch an exposed metal part of the system unit chassis. The static discharges from your fingers can
permanently damage electronic components.

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3.2.1 Hard Disk (IDE) Connector
(1) 40-Pin Hard Disk (IDE) Connector (CN6)
A 40-pin header type connector (CN6) is provided to interface with up to two embedded hard disk drives (IDE AT
bus). This interface, through a 40-pin cable, allows the user to connect up to two drives in a “daisy chain” fashion.
To enable or disable the hard disk controller, please use the BIOS Setup program, which is explained further in
chapter 5. The following table illustrates the pin assignments of the hard disk drive’s 40-pin connector.
1
240
39
Pin Signal Pin Signal
1 -RESET 2 GROUND
3 DATA 7 4 DATA 8
5 DATA 6 6 DATA 9
7 DATA 5 8 DATA 10
9 DATA 4 10 DATA 11
11 DATA 3 12 DATA 12
13 DATA 2 14 DATA 13
15 DATA 1 16 DATA 14
17 DATA 0 18 DATA 15
19 GROUND 20 NOT USED
21 IDEDREQ 22 GROUND
23 -IOW A 24 GROUND
25 -IOR A 26 GROUND
27 IDEIORDYA 28 GROUND
29 -DACKA 30 GROUND
31 AINT 32 GROUND
33 SA 1 34 Not Used
35 SA 0 36 SA 2
37 CS 0 38 CS 1
39 HD LED A 40 GROUND
Hard Disk (IDE0) Connector
(2) 44-Pin Hard Disk (IDE) Connector (CN7)
AR-B1543 also provides IDE interface 44-pin connector to connect with the hard disk device.
1
244
43
Pin Signal Pin Signal
1 -RESET 2 GROUND
3 DATA 7 4 DATA 8

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5 DATA 6 6 DATA 9
7 DATA 5 8 DATA 10
9 DATA 4 10 DATA 11
11 DATA 3 12 DATA 12
13 DATA 2 14 DATA 13
15 DATA 1 16 DATA 14
17 DATA 0 18 DATA 15
19 GROUND 20 NOT USED
21 IDEDREQ 22 GROUND
23 -IOW A 24 GROUND
25 -IOR A 26 GROUND
27 IDEIORDYA 28 GROUND
29 -DACKA 30 GROUND
31 AINT 32 GROUND
33 SA 1 34 Not Used
35 SA 0 36 SA 2
37 CS 0 38 CS 1
39 HD LED A 40 GROUND
41 VCC 42 VCC
43 GROUND 44 Not Used
Hard Disk (IDE1) Connector
3.2.2 FDD Port Connector (CN2)
The AR-B1543 provides a 34-pin header type connector for supporting up to two floppy disk drives.
To enable or disable the floppy disk controller, please use the BIOS Setup program.
1
2
34
33
Figure 0-1 CN2: FDD Port connector
Pin Signal Pin Signal
1-33(odd) GROUND 18 DIRECTION
2 DRVEN 0 20 -STEP OUTPUT PULSE
4 NOT USED 22 -WRITE DATA
6 DRVEN 1 24 -WRITE GATE
8 -INDEX 26 -TRACK 0
10 -MOTOR ENABLE 0 28 -WRITE PROTECT
12 -DRIVE SELECT 1 30 -READ DATA
14 -DRIVE SELECT 0 32 -SIDE 1 SELECT
16 -MOTOR ENABLE 1 34 DISK CHANGE
Table 0-1 FDD Pin Assignment
3.2.3 Network Setting (LAN1)
The LAN1 RJ-45&LED headers are the standard network headers. The following table is the pin assignment.
18
LAN1 FUNCTION
1 TPTX+
2 TPTX -
3 TPRX+
4 Not Used

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5 Not Used
6 TPRX -
7 Not Used
8 Not Used
RJ-45 Pin Assignment
3.2.4 PS/2 KB/Mouse Connector (CN3 & PS1)
To use the PS/2 interface, an adapter cable has to be connected to the CN3 (6-pin header type) connector. This
adapter cable is mounted on a bracket and is included in your AR-B1543 package. The connector for the PS/2
KB/mouse is a Mini-DIN 6-pin connector. Pin assignments for the PS/2 port connector are as follows:
KBCLK
VCC
KBDAT
MSDAT
6
5
4
3
2
1
GND
MSCLK 12
34
56
CN3 6 Pin Mini-DIN
PS1
1 KBDAT
3 GND
2 MSDAT
6 MSCLK
4 VCC
5 KBCLK
Figure 0-2 CN3 & PS1: PS/2 KB/Mouse Connector
3.2.5 PS-ON Header (CN4)
1. PS-ON
2.VCC
3.5VSB
CN4
3.2.6 Reset Header (J10)
The J10 is a reset switch. Shorting these two pins will reset the system.
1
2J10
3.2.7 Power Connector (PWR1)
The PWR1 is a 4-pin power connector. It’s the standard connector on all Acrosser boards.
2 GND
3 GND
4 +5V
1 +12V
PWR1
PWR1: 4-Pin Power Connector
# When AT power supplier is applied, jumper 2&3 should
be tied together.(Factory preset)
# When ATX power supplier is applied, pin1&pin 3 should
be connect to proper location of ATX power supplier.

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3.2.8 CRT Connector (DB2)
DB2: CRT Connector
3.2.9 LCD Supported Voltage Select (JP6)
Factory Preset
5V
3.3V
1
2
3
4
5
6
1
2
3
4
5
6
Figure 0-3 JP6: LCD Supported Voltage Select
3.2.10 LCD Panel Display Connector (LCD1)
Attach a display panel connector to this 44-pin connector with pin assignments as shown below:
Figure 0-4 LCD1: LCD Display Connector
1
2
Pin Signal Pin Signal
1 GND 2 SHFCLK
3 GND 4 LP
5 FLM 6 GND
7 NC 8 NC
9 P0 (B0) 10 P1 (B1)
11 P2 (B2) 12 P3 (B3)
13 GND 14 DB2 (B4)
15 P5 (B5) 16 NC
17 NC 18 P6 (G0)
19 P7 (G1) 20 GND
21 P8 (G2) 22 P9 (G3)
23 P10 (G4) 24 P11 (G5)
25 NC 26 NC
27 GND 28 P12 (R0)
29 P13 (R1) 30 P14 (R2)
31 P15 (R3) 32 P16 (R4)
33 P17 (R5) 34 GND
35 VCC 36 VCC
37 +12V 38 +12V
39 GND 40 GND
41 DE 42 ENABLK
43 GND 44 VEE
Table 0-2 LCD Display Pin Assignment
DB2(CRT Connector)
6
10
15
11 1
2
3
4
5
1 Red
2 Green
3 Blue
13 Horizontial
14 Vertical Sync
4, 9, & 11 Not used
5 & 10 Ground
6, 7 & 8 AGND
12 DDC DATA
15 DDC CLOCK