Advantech PCI-1751U User manual

PCI-1751U
48-bit Digital Input/Output Card
with Universal PCI Bus
User Manual

PCI-1751U User Manual ii
Copyright
This documentation and the software included with this product are copy-
righted 2006 by Advantech Co., Ltd. All rights are reserved. Advantech
Co., Ltd. reserves the right to make improvements in the products
described in this manual at any time without notice.
No part of this manual may be reproduced, copied, translated or transmit-
ted in any form or by any means without the prior written permission of
Advantech Co., Ltd. Information provided in this manual is intended to
be accurate and reliable. However, Advantech Co., Ltd. assumes no
responsibility for its use, nor for any infringements of the rights of third
parties which may result from its use.
Acknowledgments
PC-LabCard is a trademark of Advantech Co., Ltd. IBM and PC are
trademarks of International Business Machines Corporation. MS-DOS
and Windows are trademarks of Microsoft Corporation. Intel and Pentium
are trademarks of Intel Corporation.
CE Notification
The PCI-1751U, developed by ADVANTECH CO., LTD., has passed the
CE test for environmental specifications when shielded cables are used
for external wiring. We recommend the use of shielded cables. This kind
of cable is available from Advantech. Please contact your local supplier
for ordering information.
Part No. 2003175110 2nd Edition
Printed in Taiwan December 2006

iii Table of Contents
Contents
Chapter 1 General Information ....................................... 2
1.1 Introduction ....................................................................... 2
1.1.1 Numbering Convention .................................................. 2
1.1.2 Features .......................................................................... 2
1.1.3 Applications ................................................................... 3
1.1.4 Specifications ................................................................. 3
1.1.5 Input Signal .................................................................... 3
1.1.6 Output Signal ................................................................. 3
1.1.7 Interrupt Source ............................................................. 4
1.1.8 Transfer Rate .................................................................. 4
Chapter 2 Installation ....................................................... 6
2.1 Initial Inspection................................................................ 6
2.2 Unpacking ......................................................................... 6
2.3 Jumper Settings ................................................................. 7
Figure 2.1:Connectors & Jumpers ................................. 7
2.3.1 Set Ports as Input or Output by Software ...................... 7
2.3.2 Using Jumpers to Set Ports as Output Ports .................. 8
2.3.3 Restore Ports to Condition Prior to Reset ...................... 8
2.3.4 Select Clock Source of Timers and Counter .................. 9
Table 2.1:Jumper Settings .............................................. 9
2.4 Setting the BoardID Switch (SW1)................................. 10
Table 2.2:BoardID Setting (SW1) ............................... 10
2.4.1 BoardID Register ......................................................... 10
Table 2.3:BoardID Register ......................................... 10
2.5 PCI-1751U Block Diagram............................................. 11
Figure 2.2:PCI-1751U Block Diagram ........................ 11
2.6 Pin Assignments.............................................................. 12
2.7 Installation Instructions ................................................... 13
Chapter 3 Operation ....................................................... 16
3.1 Introduction ..................................................................... 16
3.2 Digital I/O Ports .............................................................. 16
3.2.1 8255 Mode 0 ................................................................ 16
3.2.2 Interrupt Function of the DIO Signals ......................... 17
3.2.3 Input/Output Control .................................................... 17
Table 3.1:Bit map of port configuration register ......... 17
3.2.4 Initial Configuration .................................................... 17
3.2.5 Dry Contact Support for Digital Input ......................... 18
Figure 3.1:Wet & Dry Contact Inputs ......................... 18
3.3 Timer/Counter Operation ................................................ 19
3.3.1 Introduction .................................................................. 19
Figure 3.2:Timer & Counter Structure ........................ 19
3.3.2 Timer 0 & 1: Two 16-bit Timers or One 32-bit Timer 19
3.3.3 Counter 2 ...................................................................... 20

PCI-1751U User Manual iv
3.3.4 Timer/Counter Frequency and Interrupt ...................... 20
3.4 Interrupt Function............................................................ 21
3.4.1 Introduction .................................................................. 21
3.4.2 IRQ Level .................................................................... 21
3.4.3 Interrupt Control Register (Base + 32) ........................ 21
Table 3.2:Interrupt control register bit map ................. 21
3.4.4 Interrupt Source Control .............................................. 22
Figure 3.3:Figure 3-3: Interrupt sources ...................... 22
Table 3.3:Interrupt mode bit values ............................. 22
3.4.5 Interrupt Triggering Edge Control ............................... 23
Table 3.4:Triggering edge control bit values ............... 23
3.4.6 Interrupt Flag Bit ......................................................... 23
Table 3.5:Interrupt flag bit values ................................ 23
Appendix A Counter Chip Function................................. 26
A.1 The Intel 8254 ................................................................. 26
A.2 Counter Read/Write and Control Registers..................... 26
A.3 Counter Operating Modes ............................................... 29
A.3.1 MODE 0 – Stop on Terminal Count ............................ 29
A.3.2 MODE 1 – Programmable One-shot ........................... 29
A.3.3 MODE 2 – Rate Generator .......................................... 29
A.3.4 MODE 3 – Square Wave Generator ............................ 30
A.3.5 MODE 4 – Software Triggered Strobe ........................ 30
A.3.6 MODE 5 – Hardware Triggered Strobe ....................... 30
A.4 Counter Operations ......................................................... 31
A.4.1 Read/Write Operation .................................................. 31
A.4.2 Counter Read-back Command ..................................... 31
A.4.3 Counter Latch Operation ............................................. 31
A.5 Counter Applications....................................................... 32
Appendix B Register Format ............................................ 34

2
CHAPTER
1
General Information

PCI-1751U User Manual 2
Chapter 1 General Information
1.1 Introduction
The PCI-1751U is a 48-bit DI/O and counter/timer card with Universal
PCI bus. It provides you with 48 bits of parallel digital input/output as
well as 3 timers. It emulates mode 0 of the 8255 PPI chip, but the buff-
ered circuits offer a higher driving capability than the 8255.
The card emulates two 8255 PPI chips to provide 48 DI/O bits. The I/O
bits are divided into six 8-bit I/O ports: A0, B0, C0, A1, B1 and C1. You
can configure each port as either input or output via software. The dual
interrupt handling capability provides users the flexibility to generate
interrupts to a PC. A pin in the connector can output a digital signal
simultaneously with the card's generating an interrupt. This card uses a
high density SCSI 68-pin connector for easy and reliable connections to
field devices.
Two other features give the PCI-1751U practical advantages in an indus-
trial setting. When the system is hot reset (the power is not turned off)
the PCI-1751U retains the last I/O port settings and output values if the
user has set jumper JA1 to enable this feature. Otherwise, port settings
and output values reset to their safe default state, or to the state deter-
mined by other jumper settings. The PCI-1751U's other useful feature is
it supports both wet and dry contacts, allowing it to interface with other
devices more easily.
1.1.1 Numbering Convention
All numbers given in this manual are in decimal format unless specifi-
cally noted otherwise. In particular, where a register address is given as
(Base + 32), the decimal number "32" should be added to the base value.
1.1.2 Features
• 48 TTL level digital I/O lines.
• Emulates mode 0 of 8255 PPI
• Buffered circuits provide higher driving capability
• Interrupt handling
• Interrupt output pin for simultaneously triggering external devices with
the interrupt

3 Chapter1
• High density SCSI 68-pin connector
• Output status readback
• Two 16-bit timers can be cascaded to one 32-bit timer, and can generate
watchdog timer interrupts
• One 16-bit event counter can generate event interrupts
• Keeps port I/O settings and digital output states after hot system reset
• Supports dry contact and wet contact
• BoardID
1.1.3 Applications
• Industrial AC/DC I/O devices monitoring and control
• Relay and switch monitoring and control
• Parallel data transfer
• Sensing the signals of TTL, DTL, CMOS logic
• Driving indicator LEDs
1.1.4 Specifications
• I/O channels: 48 digital I/O lines
• Programming mode: 8255 PPI mode 0
1.1.5 Input Signal
• Logic high voltage: 2.0 to 5.25 V
• Logic low voltage: 0.0 to 0.80 V
• High level input current: 20 mA
• Low level input current: -0.2 mA
1.1.6 Output Signal
• Logic high voltage: 2.4 V minimum.
• Logic low voltage: 0.4 V maximum
• High level input current: 15 mA maximum (source)
• Low level input current: 24 mA maximum (sink)
• Driving capability: 15 LS TTL

PCI-1751U User Manual 4
1.1.7 Interrupt Source
• PC00, PC04, PC10, PC14, Timer 1 and Counter 2.
1.1.8 Transfer Rate
(This value depends on software and speed of computer.)
• Typical: 1 MB/sec (tested under DOS, Pentium® 100 MHz CPU)
• Maximum: 1.5 MB/sec
• Connector: One SCSI-II 68-pin female connector
• Power consumption: 5 V @ 850 mA (Typical)
5 V @ 1.0 A (Max.)
• Operating temperature: 0 ~ 70º C (32º F ~ 158 ºF)
• Storage temperature: -20 ~ 80º C(-4º F ~ 176º F)
• Humidity: 5% ~ 95% non-condensing
• Dimension: 170 x 100 mm (6.9" x 3.9")

2
CHAPTER
2
Installation

PCI-1751U User Manual 6
Chapter 2 Installation
2.1 Initial Inspection
Before starting to install the PCI-1751U, make sure there is no visible
damage on the card. We carefully inspected the card both mechanically
and electrically before shipment. It should be free of marks and in perfect
order on receipt.
As you unpack the PCI-1751U, check it for signs of shipping damage
(damaged box, scratches, dents, etc.) If it is damaged or fails to meet its
specifications, notify our service department or your local sales represen-
tative immediately. Also, call the carrier immediately and retain the ship-
ping carton and packing materials for inspection by the carrier. We will
then make arrangements to repair or replace the unit.
2.2 Unpacking
The PCI-1751U contains components that are sensitive and vulnerable to
static electricity. Discharge any static electricity on your body to ground
by touching the back of the system unit (grounded metal) before you
touch the board.
Remove the PCI-1751U card from its protective packaging by grasping
the card's rear panel. Handle the card only by its edges to avoid static dis-
charge which could damage its integrated circuits. Keep the antistatic
package. Whenever you remove the card from the PC, please store the
card in this package for its protection.
You should also avoid contact with materials that hold static electricity
such as plastic, vinyl and styrofoam.
Check the product contents inside the packing. There should be one card,
one CD-ROM, and this manual. Make sure nothing is missing.

7 Chapter2
2.3 Jumper Settings
We designed the PCI-1751U with ease-of-use in mind. It is a "plug and
play" card, i.e. the system BIOS assigns the system resources such as
base address and interrupt automatically. There are only two functions
with 11 jumpers to be set by the user. The following section describes
how to configure the card. You may want to refer to the figure below for
help in identifying card components.
Figure 2.1: Connectors & Jumpers
2.3.1 Set Ports as Input or Output by Software
By shorting the upper two pins of jumpers JPA0, JPB0, JPC0L, JPC0H,
JPA1, JPB1, JPC1L or JPC1H, a user sets the corresponding ports to be
configurable as input or output ports by software. (JPA0 means jumper
for port A0, JPB0 means jumper for port B0, etc.) The initial state of
each port after system power on or reset will be set as input logic 1 (volt-
age high), provided that no external signals are connected, and provided
jumper JA1 does not determine otherwise (see Jumper J4 discussion
below).

PCI-1751U User Manual 8
2.3.2 Using Jumpers to Set Ports as Output Ports
By shorting the lower two pins of the jumpers JPA0, JPB0, JPC0L,
JPC0H, JPA1, JPB1, JPC1L or JPC1H, a user sets the corresponding
ports to be output ports. (JPA0 means jumper for port A0, JPB0 means
jumper for port B0, etc.) Shorting the lower two pins of a port's jumper
pins disables the port from being software configurable as an input port.
The initial state of each of these ports after system power on or reset will
be logic 0 (voltage low), unless jumper JA1 determines otherwise. (See
Jumper JA1 below.)
2.3.3 Restore Ports to Condition Prior to Reset
Jumper JA1 gives the PCI-1751U a new and valuable capability. With
JA1 enabled, the PCI-1751U "memorizes" all port I/O settings and output
values, and, in the event of a "hot" reset, the settings and output values
present at the port just prior to reset are restored to each port following
reset. This feature applies to both ports set by software, and to ports con-
figured as output ports via jumper. Depending on the application, this
capability may allow a card to be reset without requiring a complete shut-
down of processes controlled by the card (since port values are left
unchanged and are interrupted only momentarily).
Complete loss of power to the chip clears chip memory. Thus, even if
JA1 is enabled, if the power to the card is disconnected, the card's initial
power-on state will be the default state (for software-set ports) or the state
of an output port with voltage low output (for jumper-set ports).
When jumper JA1 is not enabled, power-off or reset results in ports
returning to their default state (for software-set ports) or returning to the
state of output port with voltage low output (for jumper-set ports).

9 Chapter2
2.3.4 Select Clock Source of Timers and Counter
Jumpers JP1, JP2 and JP3 are used to select the clock source of Timer 0,
Timer 1 and Counter 2, respectively. Short the upper two pins of the
jumpers to select an external clock source, or short the lower two pins to
select an internal clock source. However, the internal clock source of
Timer 1 is connected to the output of Timer 0, so shorting the upper two
pins of JP2 results in the cascading of Timer 0 and Timer 1 as a 32-bit
timer.
Table 2.1: Jumper Settings
Names of Jumpers Function description
JPA0, JPA1: Jumpers for ports A0, A1
JPB0, JPB1: Jumpers for ports B0, B1
JPC0L, JPC1L: Jumpers for low nibble
of ports C0, C1
JPC0H, JPC1H: Jumpers for high nibble
of ports C0, C1
Sets port as an output port
Sets port to be software
configurable as input or
output (default)
JP1: Timer 0
P2: Timer 1
P3: Counter 2
Internal counter clock
source
External counter clock
source (default)
JA1
All ports return to state
held just prior to reset
All ports return to default
states (for software-set
ports) or to output port,
output low (for jumper-set
ports
1
1
1
1
1
1

PCI-1751U User Manual 10
2.4 Setting the BoardID Switch (SW1)
You can use the BoardID command (0x20) to get the board’s unique
identifier. PCI-1751U has a built-in BoardID DIP switch (SW1), which
is used to define each card's unique identifier. You can determine the
identifier in the register as shown in Table 2.2. When there are multiple
cards on the same chassis, this BoardID setting is useful for identifying
each card's device number. We set the PCI-1751U’s BoardID switch to 0
at the factory. If you need to adjust this setting, please see below..
2.4.1 BoardID Register
You can determine the BoardID setting in the register as shown below.
Table 2.2: BoardID Setting (SW1)
BoardID (DEC) Switch Position
ID3 ID2 ID1 ID0
0* ON ON ON ON
1ONONONOFF
2ONONOFFON
3ONONOFFOFF
4 ON OFF ON ON
5 ON OFF ON OFF
6ONOFFOFFON
7 ON OFF OFF OFF
8 OFF ON ON ON
9 OFF ON ON OFF
10 OFF ON OFF ON
11 OFF ON OFF OFF
12 OFF OFF ON ON
13 OFF OFF ON OFF
14 OFF OFF OFF ON
15 OFF OFF OFF OFF
* : Default
Table 2.3: BoardID Register
Base+20 3 2 1 0
Abbreviation ID3 ID2 ID1 ID0
Note: ID0: The least significant bit (LSB) of BoardID
ID3: The most significant bit (MSB) of BoardID

11 Chapter2
2.5 PCI-1751U Block Diagram
Figure 2.2: PCI-1751U Block Diagram

PCI-1751U User Manual 12
2.6 Pin Assignments
Port0:
PA00 ~ PA07: I/O pins of Port A0
PB00 ~ PB07: I/O pins of Port B0
PC00 ~ PC07: I/O pins of Port C0
Port1:
PA10 ~ PA17: I/O pins of Port A1
PB10 ~ PB17: I/O pins of Port B1
PC10 ~ PC17: I/O pins of Port C1
CNT0_OUT, CNT1_OUT and
CNT2_OUT:
Output pins of Counter/Timer 0, 1
and 2
CNT0_CLK, CNT1_CLK and
CNT2_CLK:
External clock source of Counter /
Timer 0, 1 and 2
CNT0_G, CNT1_G and CNT2_G:
Gate control pins of Counter / Timer
0, 1 and 2
INT_OUT: Interrupt output. This pin
changes to logic 1 whenever PCI-
1751U generates an interrupt, and
returns to logic 0 when the interrupt
is cleared.
GND: Ground
VCC: +5 VDC voltage output

13 Chapter2
2.7 Installation Instructions
The PCI-1751U can be installed in any PCI slot in the computer. How-
ever, refer to the computer user's manual to avoid any mistakes and dan-
ger before you follow the installation procedure below:
1. Turn off your computer and any accessories connected to the com-
puter.
2. Disconnect the power cord and any other cables from the back of
the computer.
3. Remove the cover of the computer.
4. Select an empty 5 V PCI slot. Remove the screw that secures the
expansion slot cover to the system unit. Save the screw to secure
the interface card retaining bracket.
5. Carefully grasp the upper edge of the PCI-1751U. Align the hole
in the retaining bracket with the hole on the expansion slot and
align the gold striped edge connector with the expansion slot
socket. Press the card into the socket gently but firmly. Make sure
the card fits the slot tightly.
6. Secure the PCI-1751U by screwing the mounting bracket to the
back panel of computer.
7. Attach any accessories (68-pin cable, wiring terminal, etc.) to the
card.
8. Replace the cover of your computer. Connect the cables you
removed in step 2.
9. Turn the computer power on.
Warning! TURN OFF your computer power supply whenever
you install or remove any card, or connect and dis-
connect cables.

PCI-1751U User Manual 14

2
CHAPTER
3
Operation

PCI-1751U User Manual 16
Chapter 3 Operation
3.1 Introduction
This chapter describes the operating characteristics of the PCI-1751U.
The driver software provided allows a user to access all of the card's func-
tions without register level programming. Please see the User's Manual
for the driver bundled with this card for more information. For users who
prefer to implement their own bit-level programming to drive the card's
functions, information useful for making such a program is included in
this chapter.
3.2 Digital I/O Ports
The PCI-1751U emulates two 8255 programmable peripheral interface
(PPI) chips in mode 0, but with higher driving capability than a standard
8255 chip. Each of the 8255 chips has 24 programmable I/O pins that are
divided into three 8-bit ports. The total 48 DI/O pins from both chips are
divided into 6 ports, designated PA0, PB0, PC0, PA1, PB1 and PC1.
Each port can be programmed as an input or an output port. The I/O pins
in port A0 are designated PA00, PA01,..., PA07; the pins in port B0 are
designated PB00, PB01,..., PB07, etc. These port names are used both in
this manual and in the software library. Refer to Section 2.5, Pin Assign-
ments.
3.2.1 8255 Mode 0
The basic functions of 8255 mode 0 include:
• Two 8-bit I/O ports - port A (PA) and port B (PB)
• Port C is divided into two nibble-wide (4-bit) I/O ports:- PC upper and
PC lower
• Any port can be used for either input or output.
• Output status can be read back.