Analog Devices ADA8282CP-EBZ User manual

ADA8282CP-EBZ User Guide
UG-846
One Technology Way •P. O. Box 9106 •Norwood, MA 02062-9106, U.S.A. •Tel: [phone] •Fax: [phone] •www.analog.com
Evaluating the ADA8282 Radar Receive Path AFE
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.Rev. 0 | Page 1 of 16
FEATURES
Ready SPI interface for setup and control
Easy connection to test equipment
EVALUATION KIT CONTENTS
ADA8282CP-EBZ evaluation board
6 V, 2 A switching power source
EQUIPMENT NEEDED
PC running Windows®
USB 2.0 port
SDP-B
SOFTWARE NEEDED
Analysis control evaluation (ACE) software
GENERAL DESCRIPTION
The ADA8282CP-EBZ is designed to aid in the evaluation of
the ADA8282 radar receive path analog front-end (AFE). The
board connects to the system demonstration platform (SDP) for
easy configuration of registers through a serial peripheral
interface (SPI) using the ACE evaluation software. The board
provides headers to allow configuration using other platforms.
It also includes on-board options to provide manual reset
capability to the part.
This user guide provides quick start instructions for working
with the board.
Full specifications for the ADA8282 are available in the product
data sheet, which should be consulted in conjunction with this
user guide when using the evaluation board.
DIGITAL PICTURE OF THE BOARD
Figure 1.
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UG-846 ADA8282CP-EBZ User Guide
Rev. 0 | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Evaluation Kit Contents................................................................... 1
Equipment Needed........................................................................... 1
Software Needed............................................................................... 1
General Description ......................................................................... 1
Digital Picture of the Board ............................................................ 1
Revision History ............................................................................... 2
Evaluation Board Hardware ............................................................ 3
Power Supply................................................................................. 3
Analog Inputs................................................................................ 3
Analog Outputs............................................................................. 3
Reset Logic Input.......................................................................... 3
Digital Lines .................................................................................. 3
Jumper Configurations.................................................................3
Evaluation Board Software Quick Start Procedures.....................4
Evaluation Board Software...........................................................4
Quick Start Procedures.................................................................4
Configuring the ADA8282 through ACE ..................................5
Using the Register Debugger .......................................................5
Using the ACE Software Chip View ...........................................5
Using the ACE Memory Map ......................................................6
ADA8282 Register Summary ......................................................7
Evaluation Board Schematics and Artwork...................................8
Ordering Information.................................................................... 15
Bill of Materials........................................................................... 15
REVISION HISTORY
7/15—Revision 0: Initial Version
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ADA8282CP-EBZ User Guide UG-846
Rev. 0 | Page 3 of 16
EVALUATION BOARD HARDWARE
POWER SUPPLY
The ADA8282CP-EBZ comes with a wall-mountable switching
power supply that provides a 6 V, 2 A maximum output. The
supply may be connected to the rated 100 V ac to 240 V ac to
provide power to the board.
The ADA8282 requires 3.3 V for both analog (AVDD) and
digital (VIO) power. The evaluation board has an on-board
ADP7118 (U3) regulator for this purpose. U3 directly supplies
the power for AVDD. The user may opt to use U3 to provide
power to VIO by placing a header at VIO_3V3.
The SDP requires a 5 V supply to properly control the board.
This supply is derived from the on-board ADP7105 (U2). The
5V_EN header allows the user to enable or disable this supply.
Positions for the shunt to enable or disable are indicated on the
board. U2 may be disabled if a different external controller is used.
ANALOG INPUTS
Each input is configured with SMA ports, +JINx and –JINx
(where x stands for Channel A, Channel B, Channel C, or
Channel D), and terminated with 50 Ω for easy interfacing to
source equipment. The inputs are ac-coupled through 0.1 µF
capacitors to the ADA8282. Use P1INx (where x stands for
Channel A, Channel B, Channel C, or Channel D) to short any
two differential lines together.
The inputs of the ADA8282 are intended to be driven by a
differential signal source. The output signal swing is reduced by
a factor of 2 when driven by a single-ended source.
ANALOG OUTPUTS
Each output is configured with SMA ports, +JOUTx and
−JOUTx (where x stands for Channel A, Channel B, Channel C,
or Channel D), which allows easy interfacing to equipment.
Components are included for high-pass filtering at the output.
RESET LOGIC INPUT
A switch to control the RESET pin of the ADA8282 is available
on the board. The switch position to reset the board is indicated
on the evaluation board.
DIGITAL LINES
The SDP-B is used to provide digital signals to configure the
ADA8282. Short the SPI headers to use the SDP. If an external
controller is used to generate the digital signals, the signals can
be ported through the SPI header.
JUMPER CONFIGURATIONS
The jumper settings/link options on the evaluation board for
the required operating modes are described in Table 1. Figure 2
shows the default jumper settings.
Table 1. Jumper Descriptions
Jumper
Description
SPI SPI lines. Short all jumpers to configure the registers via the SDP.
VIO_3V3 Digital supply pin, VIO. Short the jumper to supply the VIO pin of the ADA8282 with the on-board regulator supply of 3.3 V.
5V_ENBL 5 V supply enable. Place a shunt at Position 1 to enable the 5 V on-board regulator. Place the shunt at Position 3 to disable the 5 V
on-board regulator. Correct positions are indicated on the board.
RESET This switch provides the required logic level to reset the device through hardware. To reset, follow the indicated position on the board.
Figure 2. Default Evaluation Board Configuration
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UG-846 ADA8282CP-EBZ User Guide
Rev. 0 | Page 4 of 16
EVALUATION BOARD SOFTWARE QUICK START PROCEDURES
This section provides quick start procedures and software
information for using the ADA8282CP-EBZ board.
EVALUATION BOARD SOFTWARE
To use the board with the SDP-B, make sure that the ACE
software is available on your computer. The software installer
and a comprehensive user guide for the tool are available on the
ACE Wiki.
QUICK START PROCEDURES
Figure 6 shows the typical evaluation board setup for the
ADA8282CP-EBZ. Complete the following steps to enable
functionality testing of the part:
1. Configure the jumpers as shown in Figure 2.
2. Connect the SDP connector on the ADA8282CP-EBZ
to Connector A of the SDP-B.
3. Connect the 6 V power supply to the board at P2 and
connect to a power source.
4. Plug the USB cable into the USB port.
5. Run the ACE software.
6. Upon running the software, the hardware should
automatically be detected (see Figure 3).
Figure 3. ACE Executable
7. Double-click the ADA8282 evaluation board plug-in to
navigate to the ACE board view (see Figure 4).
Figure 4. ADA8282 ACE Board View
8. Double-click the ADA8282 component on the board to
navigate to the chip view (see Figure 5). Click the tabs to
select a previous or different view.
Figure 5. ADA8282 ACE Chip View
9. Write a data byte of 0x0F to Register 0x17 to enable all
channels of the device, using any of the configuration
methods discussed in the Configuring the ADA8282
through ACE section.
10. Power up the signal generator and check the waveform
through the oscilloscope. The default gain is 18 dB for all
channels.
Figure 6. Typical Evaluation Setup
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COMPUTER
RUNNING
ACE SDP-B
OSCILLOSCOPE
SIGNAL
GENERATOR
+JINxP2
TO AC
POWER SOURCE
–JINx
+JOUTx
ADA8282CP-EBZ
EVALUATION BOARD
–JOUTx
TO
USB
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ADA8282CP-EBZ User Guide UG-846
Rev. 0 | Page 5 of 16
CONFIGURING THE ADA8282 THROUGH ACE
The ACE software provides several views or interfaces for
configuring the ADA8282 via the SDP-B. Raw SPI writes and
reads may be done through the register debugger. The chip
view provides a more graphical approach to configuring the
ADA8282, while the memory map provides users with the
option to change register settings bit by bit.
USING THE REGISTER DEBUGGER
Raw SPI data writes and reads may be performed on the device
using the register debugger.
To write to the device, complete the following steps:
1. Select the address from the Address drop-down menu on
the register debugger (see Figure 7).
Figure 7. Register Debugger Drop-Down Menu
2. Enter the data to be written to the device in the Data text
box and click Wri t e (see Figure 8).
Figure 8. Writing Data to the ADA8282
To read from the device, complete the following steps:
1. Select the address from the Address drop-down menu,
2. Click Read (see Figure 9).
Figure 9. Reading Data from the ADA8282
USING THE ACE SOFTWARE CHIP VIEW
The ACE software provides a chip view for the ADA8282. This
allows the user to configure the part graphically. Enabling or
disabling channels, along with gain manipulation, can be
accomplished using the chip view.
To enable or disable a channel, click the channel of interest. An
enabled channel is highlighted in blue, while a disabled channel
is grayed out. In Figure 10, Channel A is enabled, while the rest
of the channels are disabled.
Figure 10. Enabled and Disabled Channels
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UG-846 ADA8282CP-EBZ User Guide
Rev. 0 | Page 6 of 16
To manipulate the gain of a channel, type in the desired gain on
the corresponding channel that should be changed in the PGA
section. Note that only the gain of enabled channels may be
changed (see Figure 11).
Figure 11. Manipulating Gain
To write the preferred settings to the registers of the device,
click Apply Changes on the toolbar (see Figure 12).
Figure 12. Chip View Toolbar
USING THE ACE MEMORY MAP
The memory map for the ADA8282 can be accessed by clicking
the Proceed to Memory Map found on the lower right portion
of the chip view (see Figure 5). The memory map view can
show either the register fields or the bit fields of the device.
The register view allows the user to manipulate the bits one by
one. Each register may be expanded to show its corresponding
bit fields for easier configuration.
Clicking a bit toggles its value (see Figure 13).
Figure 13. Register Field View
The bit field view allows the user to configure the ADA8282 by
modifying its control values. The hexadecimal data is displayed
in the Data (Hex)column.
Figure 14. Bit Field View
As with the chip view, the desired setting of the registers is only
written to the ADA8282 when Apply Changes is clicked.
For more detailed information on using the ACE software, see
the ACE Wiki.
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ADA8282CP-EBZ User Guide UG-846
Rev. 0 | Page 7 of 16
ADA8282 REGISTER SUMMARY
The register settings for the ADA8282 are given in the register section of the ADA8282 data sheet. An abbreviated register summary is
shown in Table 2.
Table 2. ADA8282 Register Summary
Register Address Register Name
0x00 INTF_CONFA
0x01 SOFT_RESET
0x04 CHIP_ID1
0x05 CHIP_ID2
0x06 Revision
0x10 LNA_OFFSET0
0x11 LNA_OFFSET1
0x12 LNA_OFFSET2
0x13 LNA_OFFSET3
0x14 BIAS_SEL
0x15
PGA_GAIN
0x17 EN_CHAN
0x18 EN_BIAS_GEN
0x1D SPAREWR0
0x1E SPARERD0
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UG-846 ADA8282CP-EBZ User Guide
Rev. 0 | Page 8 of 16
EVALUATION BOARD SCHEMATICS AND ARTWORK
Figure 15. Input Schematic
0.1µF
0.1µF
49.9Ω
0.1µF
0.1µF
49.9Ω 49.9Ω
49.9Ω
0.1µF
0.1µF
0.1µF
0.1µF
49.9Ω
49.9Ω
49.9Ω
49.9Ω
P1INA
–JIND
+JIND
R2IND R1IND
P1IND
C1IND
–JINC
+JINC
R2INC R1INC
C2INC
C1INC
P1INC
C2IND
–JINB
R2INB
C2INB
+JINB
R1INB
C1INB
P1INB
C1INA
R1INA
–JINA
C2INA
+JINA
R2INA
–INC
–INB
+INA
+INB
–INA
+INC
–IND
+IND
2
1
2
1
2
1
2
1
1
2 3 4 5
1
2 3 4 5
1
2 3 4 5
1
2 3 4 5
1
2 3 4 5
1
2 3 4 5
1
2 3 4 5
1
2 3 4 5
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
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ADA8282CP-EBZ User Guide UG-846
Rev. 0 | Page 9 of 16
Figure 16. Output Schematic
0
0.1µF
5kΩ
5PF
5PF
0.1µF
0.1µF
5kΩ
5PF
00.1µF
0.1µF
0
5PF
5kΩ
0.1µF
0.1µF
0
5kΩ
0
5kΩ
0
5kΩ
0
0.1µF
0
5kΩ 5kΩ
R1OUTD
C1OUTD
C3OUTD
C2OUTD
P2OUTD
R3OUTD
–JOUTD
R4OUTD
+JOUTD
R2OUTC
P1OUTC
R1OUTC
C1OUTC
C3OUTC
C2OUTC
R3OUTC
P2OUTC
–JOUTC
R4OUTC
+JOUTC
R2OUTD
P1OUTD
R2OUTB
C1OUTB
C3OUTB
R3OUTB
–JOUTB
R4OUTB
P1OUTB
R1OUTB C2OUTB +JOUTB
P2OUTB
–JOUTA
R3OUTA
C2OUTA +JOUTA
R4OUTA
P2OUTA
C3OUTA
R1OUTA
C1OUTA
R2OUTA
P1OUTA
–OUTA
–OUTC
+OUTD
–OUTD
+OUTC
–OUTB
+OUTA
+OUTB
2
1
1
1
2
12 1
1
1
2
1
1
2
1
1
2
1
1
1
2
1
2
1
AGND AGND
AGND AGND AGND AGND
AGND AGND AGND
AGND
AGND AGND AGND
AGND
AGND AGND
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UG-846 ADA8282CP-EBZ User Guide
Rev. 0 | Page 10 of 16
Figure 17. DUT Schematic
0.1µF
0.1µF
0.1µF
0.1µF
ADA8282WBCPZ
0.1µF
C5 C6
C4
C3
C2
U5
OUTD
RESET
3V3A
–INA
+INB
–INC
+INC
+OUTA
3V3A
3V3A
SDO
SDI
CSB
SCLK
VIO
OUTA
+OUTB
OUTB
+OUTC
OUTC
+OUTD
3V3A
–IND
+IND
–INB
+INA
26
31 30 28 27
15 14 13
12
11
10
PAD 29 32 25
16
9
17
19
21
23
8
6
4
2
18
20
22
24
7
5
3
1
AGND AGND AGND
AGND
GND
AVDD
SDO
SDI
CSB
SCLK
PDWN
VIO
AVDD
+OUTA
–OUTA
+OUTB
–OUTB
+OUTC
–OUTC
+OUTD
–OUTD
AVDD NIC
NIC
NIC
NIC
NIC NIC
AVDD
–IND
+IND
–INC
+INC
–INB
+INB
–INA
+INA
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ADA8282CP-EBZ User Guide UG-846
Rev. 0 | Page 11 of 16
Figure 18. Power Section Schematic
ADP7105ARDZ-5.0
SML-LX0603GW-TR
1kΩ
10µF
TSW-102-08-G-S
DNI
ADP7118ARDZ-3.3
DNI
5001
DNI
10µF
0Ω
SML-LX0603GW-TR
5001
DNI
330OHM
5001
500150015001
DNIDNI
5001
DNIDNI
DNI
5001
165Ω
5001
DNI
DNI
5001
0Ω
1µF 1µF
1µF
16V
4A
SAMTECTSW10608GS3PIN
1µF
SMBJ5342B-TP
6.8V
0.50A
PJ-002A-SMT
DS2
R4
5V_EN
VIO_3V3
TP_VIO
E1
CR1
F1
TP1 TP2
5V
R7
C9
C8
U2
P2
3V3
R5
R6
DS1
C14
C13
C12
GND2GND1
U3
GND6GND5GND4GND3
C7
RESET
C1
AVDD
VIO
3V3A
RESET VIO
3V3A
5V
1
3PAD
4
C
1
3
1
21
A
C
2
1
11
1
A
3 2 1
8
2 7
6
5
3 2 1
1
A
C
1
1G 2G
11
2 1
8 7 6 3
4DAP
5
2
1111
NP
1
2
NP
1
AGND
AGND
AGND
AGND
AGND DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
PAD
VIN
PGEN/UVLO
SS
GND
SENSE/ADJ
VOUT
AGND
OUT 3
IN
AGND
AGND
AGND
AGND
VOUTVIN
PAD
VIN SS EN
GND
SENSE/ADJ
VOUT
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UG-846 ADA8282CP-EBZ User Guide
Rev. 0 | Page 12 of 16
Figure 19. SDP Schematic
SPI_SEL1/SPI_SS MUST BE ONLY USED
WITH EXTERNAL SPI FLASH
BMOD E 1: PULL UP WITH A 10kΩ RESISTOR
TO SET SDP TO BOOT FROM A SPI FLASH
ON THE DAUGHTER BOARD
12C BUS 1 IS COMMON ACROSS BOTH
CONNECTORS ON SDP - PULL UP RESISTORS
REQUIRED (CONNECTED TOBLACKFIN
GPIO - USE 12C_0 FIRST)
VIO: USE TOSET IOVOLTAGE MAX DRAW 20MA: USE ONLY TO POWER THE EEPROM (3MA MAX DRAW)
THE SDP REQUIRES 5V 300MA
VIN:USE THIS PIN TO POWER
THE SDP CONNECTOR IMPLEMENTS THE E13 CONNECTOR SPECIFICATIONS STANDARD. THIS IS A STANDARD FOR USE ACROSS ADI AND CANNOT BE MODIFIED
BOARD ID EEPROM(24LC32)
MUST BE ON I2C BUS 0
MAIN 12C BUS (CONNECTED TOBLACKFIN TWI-
PULL UP RESISTORS NOT REQUIRED)
WHEN USING SPIINTERFACE,BE AWARE OF ADDING A PULL UP
ON THE SPI_SEL_A/B/C LINES THAT ARE ACTIVE LOW ENABLED
SINCE SPI IS A SHARED BUS, ENSURE THAT ANY SPI DEVICE ON DAUGHTER BOARD
IS NOT ACTIVELY DRIVING THE MISO DATA LINE UNLESS PROPERLY ADDRESSED WITH
AN ACTIVE LOWCHIP SELECT. ENSURE ALSO THAT THE SPI CLK LINE IS NOT HELD
HIGH OR LOW BY YOUR BOARD AT POWER UP. FAILURE TO MEET THIS
RESULT TOA NON-FUNCTIONAL SYSTEM.
R0603
R0603
R0603
74HC1G125GW
33Ω
33Ω
R0603
33Ω
R0603
TOL=1
100kΩ
100kΩ
R0603
TOL=1
DNI
100kΩ
R0603
0.1µF
10µF 0.1µF
TSSOP8
24LC32A-I/ST
49.9kΩ
FX8-120S-SV(21)
TSW-104-08-G-D
SPI
C10
R71
U4
C39 C40
R63
R62
R61
R60
R1
R3
R2 U1
SDP
SDP_CSB
SCLK
SDP_SCLK
SDP_SDI
3.3V
3.3V
3.3V
3.3V
5V
SDP_SCLK
CSB
SDI
SDP_SDO
SDP_SDO
SDO
SDP_SDI
SDP_CSB
5
2
3
8
7
6
4
3
1
4
5
1
3
2
N
P
7
4
8
5
6
2
1
65
116
1
5
6259
72
49
7348
87
89
30
29 92
90
32
88
31
91
38
37
85
39
84
83
34
33
82
64
35
41 80
42 79
57
60
10021
99
26 95
27
7114
8113
9112
10 111
110
12
13 108
14 107
15 106
16 105
18 103
19 102
20 101
22
94
24 97
25 96
120
119
70
68
67
6655
54
53
51
50
2
7447
7645
7744
78
43
118
117
115
109
104
98
93
86
81
75
69
6358
52
46
40
36
28
23
17
11
6
4
3
56
71
61
DGND
DGND
DGND
DGND
DGND
OE_N
GND
VCC
YA
VSS
VCC
WP
A2
A1
A0
SCL
SDA
DGND
DGND
DGND
SPI_SEL_A
CLKOUT
NC
NC
GND
GND
VIO(+3.3V)
GND
PAR_D22
PAR_D20
PAR_D18
PAR_D16
PAR_D15
GND
PAR_D12
PAR_D10
PAR_D8
PAR_D6
GND
PAR_D4
PAR_D2
PAR_D0
PAR_WR_N
PAR_INT
GND
PAR_A2
PAR_A0
PAR_FS2
PAR_CLK
GND
SPORT_RSCLK
SPORT_DR0
SPORT_RFS
SPORT_TFS
SPORT_DT0
SPORT_TSCLK
GND
SPI_MOSI
SPI_MISO
SPI_CLK
GND
SDA_0
SCL_0
GPIO1
GPIO3
GPIO5
GND
GPIO7
TMR_B
TMR_D
NC
GND
NC
NC
NC
WAKE_N
SLEEP_N
GND
UART_TX
BMODE1RESET_IN_N
UART_RX
GND
RESET_OUT_N
EEPROM_A0
NC
NC
NC
GND
NC
NC
TMR_C
TMR_A
GPIO6
GND
GPIO4
GPIO2
GPIO0
SCL_1
SDA_1
GND
SPI_SEL1/SPI_SS_N
SPI_SEL_C_N
SPI_SEL_B_N
GND
SERIAL_INT
SPI_D3
SPI_D2
SPORT_DT1
SPORT_DR1
SPORT_TDV1
SPORT_TDV0
GND
PAR_FS1
PAR_FS3
PAR_A1
PAR_A3
GND
PAR_CS_N
PAR_RD_N
PAR_D1
PAR_D3
PAR_D5
GND
PAR_D7
PAR_D9
PAR_D11
PAR_D13
PAR_D14
GND
PAR_D17
PAR_D19
PAR_D21
PAR_D23
GND
USB_VBUS
GND
GND
NC
VIN
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ADA8282CP-EBZ User Guide UG-846
Rev. 0 | Page 13 of 16
Figure 20. Evaluation Board Layout, Layer 1
Figure 21. Evaluation Board Layout, Layer 2
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UG-846 ADA8282CP-EBZ User Guide
Rev. 0 | Page 14 of 16
Figure 22. Evaluation Board Layout, Layer 3
Figure 23. Evaluation Board Layout, Layer 4
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ADA8282CP-EBZ User Guide UG-846
Rev. 0 | Page 15 of 16
ORDERING INFORMATION
BILL OF MATERIALS
Table 3.
Item Qty Reference Designator Description Manufacturer Part Number
1 1 U1 IC 32 kB serial EEPROM Microchip Technology 24LC32A-I/ST
2 1 U2 500 mA, low noise regulator Analog Devices, Inc. ADP7105ARDZ-5.0
3 1 U3 Low noise linear regulator Analog Devices, Inc. ADP7118ARDZ-3.3
4 1 U4 IC-TTL bus buffer NXP Semiconductors 74HC1G125GW
5 1 U5 4-channel LNA and PGA Analog Devices, Inc. ADA8282WBCPZ
6 8 +JINA, +JINB, +JINC, +JIND,
−JINA, −JINB, −JINC, −JIND
End launch SMA Johnson 142-0701-801
7 8 +JOUTA, +JOUTB, +JOUTC, +JOUTD,
−JOUTA, −JOUTB, −JOUTC, −JOUTD
Straight SMA Johnson 142-0701-201
8
1
5V_EN
3-pin header
Samtec
TSW-103-08-G-S
9 2 C1, C7 10 µF, 100 V tantalum
capacitor
Kemet T491D106K025AT
10 14 C2 to C6, C10, C1INA, C1INB, C1INC,
C1IND, C2INA, C2INB, C2INC, C2IND
0.1 µF, X7R, 50 V, 0805
capacitor
Kemet C0805C104J5RACTU
11 1 C12 1 µF, 25 V, 0805 capacitor Murata NFM21PC105B1C3B
12 4 C8, C9, C13, C14 1 µF, X5R, 6.8 V, 0603
capacitor
Murata GRM188R61E105KA12D
13 4 C1OUTA, C1OUTB, C1OUTC, C1OUTD 5 pF, C0G, 2.2 V, 0805
capacitor
Murata GQM2195C2A5R0CB01D
14 8 C2OUTA, C2OUTB, C2OUTC, C2OUTD,
C3OUTA, C3OUTB, C3OUTC, C3OUTD
1 µF, X7R, 0805 capacitor AVX 08051C104JAT2A
15 1 C39 10 µF, 13.2 V tantalum
capacitor
AVX TAJA106K010RNJ
16 1 C40 1 µF, X8R, 0603 capacitor TDK C1608X8R1E104K
17 1 CR1 Zener Micro Commercial
Components
SMBJ5342B-TP
18 2 DS1, DS2 LED Lumex SML-LX0603GW-TR
19 1 E1 Ferrite bead, 330 Ω, 0805 Murata BLM21PG331SN1D
20 1 F1 Fuse, 50 V Littelfuse 1210L050YR
21 12 P1INA, P1INB, P1INC, P1IND, P1OUTA,
P1OUTB, P1OUTC, P1OUTD, P2OUTA,
P2OUTB, P2OUTC, P2OUTD
2-pin header Berg 69157-102
22 1 P2 Power jack CUI Inc. PJ-002A-SMT
23 8 R1INA, R1INB, R1INC, R1IND, R2INA,
R2INB, R2INC, R2IND
SM, 49.9 Ω, 1%, 1/10 W, 0805
resistor
Panasonic ERJ-6ENF49R9V
24 10 R5, R7, R1OUTA, R1OUTB, R1OUTC,
R1OUTD, R2OUTA, R2OUTB, R2OUTC,
R2OUTD
SM, 0 Ω, 1%, 1/16 W, 0805
resistor
Panasonic ERJ-6GEY0R00V
25 2 R2, R3 SM, 100 kΩ, 1%, 1/10 W,
0603 resistor
Panasonic ERJ-3EKF1003V
26 8 R3OUTA, R3OUTB, R3OUTC, R3OUTD,
R4OUTA, R4OUTB, R4OUTC, R4OUTD
SM, 5 kΩ, 0805 resistor Vishay PNM0805E5001BST5
27 1 R4 SM, 1 kΩ, 0603 resistor Panasonic ERJ-3EKF1001V
28 1 R6 SM, 165 Ω, 0603 resistor Panasonic ERJ-3EKF1650V
29 4 R60 to R63 SM, 33 Ω, 0603 resistor Multicomp MC 0.063W 0603 1% 33R
30 1 R71 SM, 49.9 kΩ, 0603 resistor Panasonic ERJ-3EKF4992V
31 1 RESET Slide switch Secma 09-03-201-02
32 1 SDP SDP connector Hirose FX8-120S-SV(21)
33
1
SPI
8-pin header
Samtec
TSW-104-08-G-D
34 1 TP_VIO Test point Vector K24A
35 1 VIO_3V3 2-pin header Samtec TSW-102-08-G-S
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UG-846 ADA8282CP-EBZ User Guide
Rev. 0 | Page 16 of 16
NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
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AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
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©2015 Analog Devices, Inc. All rights reserved. Trademarks and
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UG13269-0-7/15(0)
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