Analog Devices ADV7511W Installation manual

Page 1 of 45 Rev A
ADV7511W
Low-Power HDMI 1.4a Transmitter
HARDWARE USER’S
GUIDE
- Revision A –
July 2011

ADV7511W HARDWARE USER’S GUIDE
Rev.A
Page 2 of 45 Rev A
REVISION HISTORY
Rev. 0:
Initial Release 4/11
Rev A:
Section Change Description
Section ▶6.1.2 Corrected register bit information for the “Input ID” bits
Figure 17 Corrected Mux select bit table

ADV7511W HARDWARE USER’S GUIDE
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TABLE OF CONTENTS
Section 1: Introduction.........................................................................................................................................................................................7
1.1Scope and Organization.......................................................................................................................................................................7
1.1.1Links ................................................................................................................................................................................................7
1.1.2Symbols ...........................................................................................................................................................................................7
1.1.3Format Standards...........................................................................................................................................................................7
1.2Overview ................................................................................................................................................................................................8
1.3Hardware Features................................................................................................................................................................................8
1.4Supported Input Formats ....................................................................................................................................................................8
1.5Supported Output Formats .................................................................................................................................................................8
Section 2: Reference Documents.........................................................................................................................................................................9
2.1ADI Documents....................................................................................................................................................................................9
2.2Industry Specifications.........................................................................................................................................................................9
Section 3: Block diagram ....................................................................................................................................................................................10
Section 4: Specifications......................................................................................................................................................................................11
4.1Explanation of Test Levels.................................................................................................................................................................15
4.2ESD Caution........................................................................................................................................................................................15
Section 5: Pin and package information...........................................................................................................................................................16
5.1Mechanical Drawings and Outline Dimensions ............................................................................................................................19
Section 6: Functional Description.....................................................................................................................................................................20
6.1Input Connections..............................................................................................................................................................................20
6.1.1Unused Inputs..............................................................................................................................................................................20
6.1.2Video Data Capture Block..........................................................................................................................................................20
6.1.2.1Video Input Connections ...................................................................................................................................................20
6.1.3Audio Data Capture Block .........................................................................................................................................................26
6.1.3.1Supported Audio Input Format and Implementation....................................................................................................26
6.1.3.2Inter-IC Sound (I2S) Audio ...............................................................................................................................................28
6.1.3.3Sony/Philips Digital Interface (S/PDIF) ...........................................................................................................................30
6.1.3.4HBR Audio............................................................................................................................................................................30
6.1.4Hot Plug Detect (HPD) pin........................................................................................................................................................30
6.1.5Power Down / I2C Address (PD/AD) ......................................................................................................................................30
6.1.6Input Voltage Tolerance .............................................................................................................................................................31
6.2Output Connections...........................................................................................................................................................................31
6.2.1Output Formats Supported ........................................................................................................................................................31
6.2.2TMDS Outputs.............................................................................................................................................................................31
6.2.2.1ESD Protection.....................................................................................................................................................................31
6.2.2.2EMI Prevention....................................................................................................................................................................31
6.2.3Display Data Channel (DDC) pins............................................................................................................................................31
6.2.4Interrupt Output (INT) ..............................................................................................................................................................32
6.2.5PLL Circuit....................................................................................................................................................................................32
6.3Consumer Electronic Control (CEC) ..............................................................................................................................................32
6.3.1Unused Inputs..............................................................................................................................................................................32
6.3.2CEC Function...............................................................................................................................................................................32
6.4Video Data Formatting......................................................................................................................................................................33
6.4.1Supported 3D Formats................................................................................................................................................................33
6.4.2DE, Hsync and Vsync Generation.............................................................................................................................................33
6.4.3Color Space Conversion (CSC) Matrix.....................................................................................................................................34

ADV7511W HARDWARE USER’S GUIDE
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6.4.44:2:2 to 4:4:4 and 4:4:4 to 4:2:2 Conversion Block...................................................................................................................36
6.5DDC Controller ..................................................................................................................................................................................36
6.6Inter-IC Communications (I2C)......................................................................................................................................................36
6.6.1Two-Wire Serial Control Port ...................................................................................................................................................36
6.6.2Data Transfer via I2C..................................................................................................................................................................37
6.6.3Serial Interface Read/Write Examples ......................................................................................................................................38
6.7Power Domains...................................................................................................................................................................................39
6.7.1Power Supply Sequencing ..........................................................................................................................................................40
6.7.2Power Consumption ...................................................................................................................................................................40
Section 7: PCB Layout Recommendations ......................................................................................................................................................41
7.1Power Supply filtering........................................................................................................................................................................41
7.2Video Clock and Data Inputs............................................................................................................................................................42
7.3Audio Clock and Data Inputs ...........................................................................................................................................................42
7.4SDA and SCL.......................................................................................................................................................................................42
7.5DDCSDA and DDCSCL....................................................................................................................................................................42
7.6Current Reference Pin: R_EXT.........................................................................................................................................................43
7.7CEC Implementation .........................................................................................................................................................................43
Section 8: Glossary ..............................................................................................................................................................................................45

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TABLE OF FIGURES
Figure 1ADV7511W Functional Block Diagram.......................................................................................................................................10
Figure 2Timing for Video Data Interface ...................................................................................................................................................13
Figure 3Timing for I2S Audio Interface .....................................................................................................................................................13
Figure 4Timing for S/PDIF Audio Interface..............................................................................................................................................14
Figure 564-lead LQFP configuration (top view - not to scale) ................................................................................................................16
Figure 664-lead Low-Profile Quad Flat Pack [LQFP-SW64-2]...............................................................................................................19
Figure 72X Clock timing ...............................................................................................................................................................................23
Figure 8DDR DE timing - Register 0x16[1] = 1.........................................................................................................................................26
Figure 9DDR DE timing - Register 0x16[1] = 0.........................................................................................................................................26
Figure 10I2S Standard Audio – Data width 16 to 24 bits per channel..................................................................................................28
Figure 11I2S Standard Audio – 16-bit samples only...............................................................................................................................29
Figure 12Serial Audio – Right-Justified ....................................................................................................................................................29
Figure 13Serial Audio – Left-Justified.......................................................................................................................................................29
Figure 14AES3 Direct Audio ......................................................................................................................................................................30
Figure 15S/PDIF Data Timing....................................................................................................................................................................30
Figure 16Typical All-HDMI Home Theatre.............................................................................................................................................32
Figure 17Sync Processing Block Diagram ................................................................................................................................................34
Figure 18Single Channel of CSC (In_A)...................................................................................................................................................35
Figure 19Serial Port Read/Write Timing ..................................................................................................................................................38
Figure 20Serial Interface—Typical Byte Transfer....................................................................................................................................39
Figure 21Power Supply Domains...............................................................................................................................................................39
Figure 22AVDD and PVDD Max Noise vs. Frequency..........................................................................................................................41
Figure 23LC Filter Transfer Curve............................................................................................................................................................42
Figure 24CEC external connection............................................................................................................................................................43
Figure 25Example Schematic......................................................................................................................................................................44

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TABLE OF TABLES
Table 1Electrical Specifications ..................................................................................................................................................................11
Table 2Absolute Maximum Ratings ..........................................................................................................................................................14
Table 3Complete Pinout List ADV7511W ...............................................................................................................................................17
Table 4Input ID Selection ...........................................................................................................................................................................20
Table 5Normal RGB or YCbCr 4:4:4 (24 bits) with Separate Syncs; Input ID = 0..............................................................................21
Table 6YCbCr 4:2:2 Formats (24, 20, or 16 bits) Input Data Mapping: 0x48[4:3]=‘00’ (evenly distributed) Input ID=1 or 2 ...22
Table 7YCbCr 4:2:2 Formats (12, 10, or 8 bits) Input Data Mapping: 0x48[4:3]=‘00’ (evenly distributed) Input ID = 3,4,7,8..23
Table 8YCbCr 4:2:2 (8 bits) DDR with Separate Syncs: Input ID = 6, right justified (R0x48[4:3] = ‘01’).......................................24
Table 9YCbCr 4:2:2 (8 bits) DDR with Separate Syncs: Input ID = 6, left justified (R0x48[4:3] = ‘10’)..........................................24
Table 10YCbCr 4:2:2 (12, 10, 8 bits) DDR with Separate Syncs:Input ID = 6, evenly distributed (R0x48[4:3] = ‘00’)................25
Table 11Audio input format summary....................................................................................................................................................27
Table 12SCLK Duty Cycle .........................................................................................................................................................................28
Table 13Some useful “End-User” CEC Features:...................................................................................................................................33
Table 14Supported 3D Formats................................................................................................................................................................33
Table 15Channel Assignment for Color Space Converter (CSC)........................................................................................................35
Table 16Serial Port Addresses...................................................................................................................................................................37
Table 17Maximum Power Consumption by Circuit – note these values will change after characterization................................40

ADV7511W HARDWARE USER’S GUIDE
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SECTION 1: INTRODUCTION
1.1 Scope and Organization
This document is intended to help the hardware designer understand what is necessary to design for the ADV7511W
and maintain the highest levels of performance. The ADV7511W Hardware User's Guide (HUG) provides guidelines to
design the schematics and board layout. Included are sections on the 64-lead LQFP package and an overview of the
functional blocks (including a brief description for each block) to provide an understanding of the ADV7511W
functional and performance capabilities. The ADV7511 Programming Guide (PG) is available as a separate document
and should be used to gain a complete understanding on how to configure the ADV7511W within a system
application.
It is divided into the following sections:
Section 2:Reference Documents is a list of other references, which will be helpful when designing with the
ADV7511W HDMI Transmitter.
Section 3:Block Diagram gives an overall functional view of the HDMI transmitter.
Section 4:Specifications give all pertinent data such as: timing, power and testing.
Section 5:Pin and Package Information give the mechanical details of the interface.
Section 6:Functional Description serves to elaborate on input, output and internal operations.
Section 7:PCB Layout Recommendations are an aid to low noise operation.
1.1.1 Links
There are many links in this document to help with navigation. Use a mouse click to follow a link, and use the Alt key +
left arrow key to return. Active links can be identified by the dotted blue underline.
1.1.2 Symbols
Symbols are used to indicate internal and external document references as follows:
▶Indicates a linked reference to another section of this document.
▷Indicates a reference to another document, either an ADI document or an external specification.
1.1.3 Format Standards
In this document, ADI has chosen to represent data in the following ways:
0xNN Hexadecimal (base-16) numbers are represented using the “C” language notation, preceded by 0x.
0bNN Binary (base-2) numbers are represented using “C” language notation, preceded by 0b.
NN Decimal (base-10) numbers are represented using no additional prefixes or suffixes.
Bit Bits are numbered in little-endian format; i.e., the least-significant bit of a byte or word is referred to
as bit 0.

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1.2 Overview
The ADV7511W is a high speed High Definition Multimedia Interface (HDMI) transmitter that is capable of
supporting an input data rate up to 165MHz (1080p @ 60Hz, UXGA @ 60Hz). Careful hardware design (schematics
and PCB layout) is recommended to optimize the performance and to ensure HDMI compliance.
▷The ADV7511W Programming Guide and ADV7511W Software Driver User Guide are also available if required.
1.3 Hardware Features
■HDMI v1.4 features supported
3D video
Advanced Colorimetry
•sYCC601
•Adobe RGB
•Adobe YCC601
■Operation up to 165MHz (TMDS link frequency)
■Integrated CEC support with 3 message buffers
■Supports x.v.Color™ (Gamut Metadata)
■Internal HDCP key storage
■Interrupt (INT) output pin eliminates constant I2C monitoring
■Supports I2S, S/PDIF and HBR audio input formats
■No audio Master Clock (MCLK) required for audio
■Requires 1.8V and 3.3V supply
■EDID buffered on chip
■Color Space Converter (CSC) with video range clipping
■64-lead LQFP package
■-40°C to +105°C temperature range
1.4 Supported Input Formats
■24 bit RGB 4:4:4 (separate syncs)
■24 bit YCbCr 4:4:4 (separate syncs)
■24, 20, or 16 bit YCbCr 4:2:2 (embedded or separate syncs)
■12, 10, or 8 bit YCbCr 4:2:2 (2x pixel clock with embedded or separate syncs)
■12, 10, or 8 bit YCbCr 4:2:2 (DDR with embedded or separate syncs)
1.5 Supported Output Formats
■24 bit RGB 4:4:4
■24 bit YCbCr 4:4:4
■24 bit YCbCr 4:2:2

ADV7511W HARDWARE USER’S GUIDE
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SECTION 2: REFERENCE DOCUMENTS
2.1 ADI Documents
ADV7511W Data Sheet
ADV7511W Programming Guide
AN-810 - EDID/HDCP Controller Application Note
2.2 Industry Specifications
EIA/CEA-861-E
HDMI Specification 1.4a
HDCP 1.4

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SECTION 3: BLOCK DIAGRAM
Figure 1 ADV7511W Functional Block Diagram
I2C
SLAVE
I2C
MASTER
SDA
SCL
INT
HPD
TX0+/TX0–
TX1+/TX1–
TX2+/TX2–
TXC+/TXC–
DDCSDA
DDCSCL
ADV7511W
TMDS
OUTPUTS
CEC
CEC CONTROLLER/
BUFFER
SPDIF
I2S[3:0]
MCLK
LRCLK
SCLK
AUDIO
DATA
CAPTURE
D[23:0]
VSYNC
HSYNC
DE
CLK
VIDEO
DATA
CAPTURE
REGISTERS
AND
CONFIG.
LOGIC
4:2:2
4:4:4
AND
COLOR
SPACE
CONVERTER
HDCP
AND EDID
MICROCONTROLLER
HDCP KEYS
HDCP
ENCRYPTION
CEC_CLK