Cromemco 32K Bytesaver User manual

Cromemeo
31K
By te saver
Five Dollars

.
Cromemco
......
•••
.. .
•
;.
..
..
..
•
CopyrIght c,1978 by Cromemco Inc A1ll1ghlS reserved
[3
cromemco
irocorpo,.t~d
Tomorrow's Computers Today
::l!OBER!;AAOO "'.'E UOUN1'A N V'E;W c.\ \joIljolJ
Part No. 023·0002
April 1979

Table of COntents
Section 1
I ntraduction .. _. _ ... _ ..... _ .........•......•......•.. 1
Technical Specifications ...........•................ ,
Section 2
Operating Instructions .. _ ... _ ..... _ .............••.... _.2
2.1 Switch Options-An Overview
..........•...••...... 2
PROGRAM POWER Toggle Switch
ADDR/CONTROL Switches
PROGRAM ENABLE Switches
BAN K SE LEer Switches
SHADOW ROM Switches
2.2 Addressing The 32K BYTESAVER .. _. _ •.••••...... 7
2.3 Board Select/Chip Select _ _ 8
2.4 Shadowing ROM Socket Pairs _ 10
2.5 Memory Banks 12
2.6 Select
BANK 0 On RESET Or POWER·ONCLEAR 16
2.7 Direct Memory Access. _16
Section 3
PROM Programming Instructions 19
3.1 Programming From RODS Or
2·80 Monitor 19
3.2 Programming From 3K Control BASIC 20
3.3 Programming From l-80 Assembly Code 22
Section 4
Theory Of Operation
...........••.•...•••......•...... 24
4.1 Power Supplies ................•.............. 24
4.2 Addressing. . ................•.............. 24
4.3 Memory Read Cycles ....................•...... 25
4.4 Memory Write Cycles
.......•.................. 25
4.5
DMA Cycles .......•.................... 25
Section 5
Assembly Instructions
............•••....•••........... 27
5.1 Assembly Steps .........................•..... 27
5.2 Power
line Testing ........•................... 28
Parts List. .. _. _. _ _ .......•.....••.•.......... 30
Parts Location Diagram .. _. _ .......•.....••......•..... 32
Switch Options-Ouick Reference ....•......••.....•..... 33
Warranty _. _ _ .........•......•........... 34
Schematic Diagram .....••......•... _. _. _ ......•... _ .. 35

Table of COntents
LIST OF ILLUSTRATIONS
Figure 1 - Switch Locations. .............•....•......... 2
Figure 2 - ADDR!CONTROL Switches .........•.......... 3
Figure 3 - Example 1 Switch Settings _ _ _ 5
Figure 4 - Example 2
Switch Settings _. _. _. _ _ .6
Figure 5 • 32K BYTESAVER Addressing .. __ . __ 7
Figure 6 .
Two 32K BYTESAVEAS Spanning The 64K
Address Space _ 9
Figure 7 - Example 4
Switch Settings And Memory Map 11
Figure 8 . The Memory Map With Multiple Memory Banks 12
Figure 9 - Example 5 Switch Settings 13
Figure
10 -Example 5Memory Map 14
Figure 1'- DMA OVERRIDE Example Configuration 17
Figure
12 - Control BASIC Memory Map _ 21
Figure 13 -IC Pin Position 28

32K Bytesaver
Introduction
This manual provides assembly instructions,
operating instructions and theory of operation for
the Cromemco 32K BYTESAVER memory board.
The 32K BYTESAVER is an 5-100 bus com-
patible. 32K-byte capacity. 2716-type EPROM
memory board and programmer. The 32K BYTE·
SAVER features:
•Independent operation as a 32K-byte ROM
memory board.
• Independent operation as a 2716 PROM pro-
grammer.
•BANK SE LEeT allowing memory expansion
beyond 64K-bytes_
•ROM SHADOWING allowing external mem-
ory to overlap portions of the 32K BYTE-
SAVER's address space.
• Powerful DMA configuration options with
DMA OVERRIDE.
•Fully buffered address lines.
• Digital count derived PROGRAM PULSES
(no erratic one-shots).
• A separate memory protect switch for each
ROM socket.
• All options SWitch selectable lno soldered
jumper wires).
This manual consists of four basic sections:
Operating Instructions. PROM Programming Instruc-
tions, Theory of Operation and Assembly Instruc-
tions. If you purchased a 32K BYTESAVEA kit, the
Assembly Instructions provide step-by-step con-
struction and initial test procedures. The section
"Switch Options - An Overview" of the Operating
Instructions provides a 32K BYTESAVER opera·
tional overview for those who want to put the board
quickly to use.
Technical Specifications-32K BYTESAVER PROM Card
MEMORY CAPACITY:
MEMORY TYPE:
MEMORY ACCESS TIME:
WAIT STATES@2 MHZ:
WAIT STATES@4 MHZ:
BUS COMPATIBILITY:
POWER REQUIREMENTS:
OPERATING ENVIRONMENT:
32K BYTES
INTEL 2716, TI 2516 DR EQUIVALENT'
450 NANOSECONDS
NONE REQUIRED
ONE PER MACHINE CYCLE
S·100
+B VOLTS AT 2.1 AMPS (MAX.)
0-55 DEGREES CELSIUS
I
·NOTE: Texas Instrument's 2716 PROM is not
equivalenr to the Intel 2716 PROM. and
thus
it may not be used with the 32K
BYTESAVER. The TI 2516 IS equivalenr
to the Intel
2716, so it may be used with
the 32K BYTESAVER.
1

32K Bytesaver
operating Instructions
=--
- -~-
Operating the 32K BYTESAVER board involves
inserting from one to sixteen 2716 PROM devices in
sockets ROM 0 - ROM 15 (any sockets may be
used or left unused), setting six switch groups to
configure the board, plugging the board into acon-
venient 5·100 bus slot, and then applying system
power. To program aPROM, you will additionally
need to run software described in the Section 3,
PROM PROGRAMMING INSTRUCTIONS.
2.1 Switch Options-AnOverview
The 32K BYTESAVER is configured by setting
six switch groups located along the top edge of the
board (see Figure 1). To provide an operational
overview and for later quick reference, the function
of each switch group is briefly explained in this
section.
Figure I-Switch Locations
PROGRAM
POWER
r--l., ADDR;!DNTRDL
PROGRAM
ENABLE
""
~ •• t.....:
..
. 'r
'H
..
.. ". "
..
... ~
~.....
,- ....
[) Croon_on",o
jZl<
BI'TESA/.'ER'~
I
BANK iLEeT SHADO\ ROMS
2

32K Bytesaver
PROGRAM POWER Toggle Switch
The PROGRAM POWER switch turns the +26
volt de to de power supply and the nearby red LED
indicator ON and OFF. Position this switch ON be-
fore PROM programmmg: position it OFF when
done to prevent inadvertent re-programming.
ADDR/CONTROL Switches
The ADDA/CONTROL switches control several
different functions (see Figure 2).
Switches 1, 2 and 3are not used.
The BANK ENABLE/DISABLE switch enables
multiple 64K memory banks (bank 0-bank 7) when
ON, and disables multiple banks when OFF(normal
direct 64K addressing).
The WAIT STATE switch is used to match the.
CPU cycle time to the 2716 PROM 45005 (max)
memory access time. Positioning the WAIT STATE
switch ON introduces one wait state per machine
cycle; the OFF position introduces no wait states.
When used
in aCromemco system with aZPU run-
ning at 4
MHz, position the switch ON. The switch
may be left OFF when operating at 2 MHz.
The A15 switch memory maps the 32K BYTE·
SAVER board in the lower 32K half of the memory
address space lOOOOH -7FFFHI when in the OFF
pOSItion IA15=0>, and memory maps the board in
the upper 32K half of memory address space
(8000H-FFFFHI when in the ON position
(A 15'11.
The DMA ENABLE/DISABLE switch enables
DMA OVERRIDE when ON and disables OMA
OVERRIDE when OFF. For normal direct 64K
DMA addressing, position the switch OFF. When
performing OMA with memory banks enabled. turn
Figure 2-ADDR/CONTROL Switches
~~--- MEMORY BAN~S ENABLED
I
~~==ONE WAIT STATE
AIS=I (UPPER 32~)
DMA OVERRIDE ENABLED
r-DMA OUT
~2E8-\HPJ.HI-I' -lH
L-DMAIN
L
-'=== DMA OVERRIDE DISABLED
AIS=O (LOWER
32KI
l
_~~==== NO WAIT STATES
MEMORY BANKS DISABLED
NOT USED •
3

,
32K Bytesaver
the switch ON. The DMA IN/OUT switch is active
only when DMA OVERRIDE is enabled. With DMA
OVERRIDE enabled, the 32K BYTESAVER will
respond directly to a DMA in the board's 16-bit
address range by board enabling if DMA is IN, and
by board disabling if DMA is OUT, regardless of
current active memory bank status at the time. This
feature effectively permits the user to define one
board out of several stacked in different memory
banks as the DMA board (the one with DMA INI.
and the boards in other memory banks as non-DMA
boards (the ones with DMA OUT).
PROGRAM ENABLE Switches
The sixteen PROGRAM ENABLE switches indi-
vidually enable and disable programming sockets
ROMO thru ROM15. An ON switch enables pro-
gramming; an OFF switch inhibits programming.
These switches may be alternately viewed as MEM-
ORY PROTECT switches, preventing any memory
write operations when in the OFF position.
To enable and disable socket programming,
associate the board socket numbers
IROM0-
ROM15) with the numerals printed above the two
switch DIPs
on the p.c. board (15 to the far left,
a to the far right).
4
BANK SELECT Switches
The eight BANK SE LECT switches map the 32K
BYTESAVER IOta any combination of eight possi-
ble 64K byte memory banks (bank 0 - bank 71. Set
ting aBANK SELECT switch ON logically places
the board
in the correspondingly numbered memory
bank; an OFF switch logically removes the board
from abank. Again, associate
the bank number with
the numerals printed above the BANK SELECT
switches
on the p.c. board, not the numerals on the
DIP proper_
SHADOW ROM Switches
Each SHADOW ROM switch controls two ROM
sockets (the rightmost controls ROMe and ROM 1,
the leftmost controls ROM 14 and ROM 151 by plac-
ing
both sockets in the memory map when the
switch is OFF, and by removing both sockets
("floating"
the board when either socket is address-
ed) from the memory map when ON. Placing a
SHADOW
ROM SWitch ON effectively creates a
4K-byte
"hole" In the 32K BYTESAVER address
space,
into which another memory module may be
mapped.