Efinix Trion T120 BGA324 User manual

Trion® T120 BGA324
Development Kit User
Guide
T120F324-DK-UG-v1.0
April 2020
www.efinixinc.com
Copyright © 2020. All rights reserved. Efinix, the Efinix logo, Quantum, Trion, and Efinity are trademarks of Efinix, Inc. All other trademarks and
service marks are the property of their respective owners. All specifications subject to change without notice.

Contents
Introduction..................................................................................................................................... 3
What's in the Box?.................................................................................................................................... 3
Register Your Kit........................................................................................................................................ 3
Download the Efinity® Software.............................................................................................................. 3
Board Functional Description..........................................................................................................4
Features.......................................................................................................................................................4
Overview..................................................................................................................................................... 5
Power On.................................................................................................................................................... 7
Reset............................................................................................................................................................ 7
Clock Sources............................................................................................................................................ 8
Configuration............................................................................................................................................. 8
EEPROM......................................................................................................................................................8
Camera Power-Up Circuit.........................................................................................................................9
Headers.......................................................................................................................................................9
User Outputs............................................................................................................................................21
User Inputs............................................................................................................................................... 21
MIPI and LVDS Expansion Daughter Card.................................................................................... 22
Features.....................................................................................................................................................22
Headers.....................................................................................................................................................22
Raspberry Pi Camera Connector Daughter Card.......................................................................... 26
Features.....................................................................................................................................................26
Headers.....................................................................................................................................................26
Setting up the Board.....................................................................................................................29
Installing Standoffs..................................................................................................................................29
Setting the Power-Up Sequence for MIPI Cameras............................................................................29
Attaching the MIPI and LVDS Expansion Daughter Card..................................................................30
Attaching Camera Connector Daughter Cards.................................................................................. 31
Running the Example Design....................................................................................................... 32
Creating Your Own Design........................................................................................................... 33
Revision History.............................................................................................................................33

Trion T120 BGA324 Development Kit User Guide
Introduction
Thank you for choosing the Trion® T120 BGA324 Development Kit (part number:
T120F324-DK), which allows you to explore the features of the T120 FPGA with a MIPI
CSI-2 interface and DDR controller. The kit includes 3 daughter cards that let you connect
MIPI cameras, a Raspberry Pi V2 camera module, and extend the GPIO, plus a Raspberry Pi
camera module and accessories.
Warning: The board can be damaged without proper anti-static handling.
What's in the Box?
The Trion® T120 BGA324 Development Kit includes:
•Trion® T120 BGA324 Development Board preloaded with a demonstration design
•MIPI and LVDS Expansion Daughter Card
•2 Raspberry Pi Camera Connector Daughter Cards
•Raspberry Pi V2 camera module with 15-pin FFC/FPC cable
•10 standoffs, 10 screws, 6 nuts, and 3 jumpers for development board and daughter cards
•3 foot USB cable (type A to micro type B)
•Universal AC to DC power adapter
Register Your Kit
When you purchase an Efinix development kit, you also receive a copy of the Efinity®
software plus one year of software upgrades and patches. The Efinity® software is available
for download from the Support Center on the Efinix web site.
To get access to our Support Center to download your software, register your development
kit at https://www.efinixinc.com/register.
Download the Efinity® Software
To develop your own designs for the T120 device on the board, you must install the Efinity®
software. You can obtain the software from the Efinix® Support Center under Efinity
Software (www.efinixinc.com/support/).
The Efinity® software includes tools to program the device on the board. Refer to the
Efinity® Software User Guide for information about how to program the device.
Learn more: Efinity® documentation is installed with the software (see Help > Documentation) and is also
available in the Support Center under Documentation (www.efinixinc.com/support/).
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Trion T120 BGA324 Development Kit User Guide
Board Functional Description
The Trion® T120 BGA324 Development Board contains a variety of components to help you
build designs for the Trion® T120 device.
Figure 1: Trion® T120 BGA324 Development Board Block Diagram
2 User Pushbuttons
4 User LEDs
Micro-USB
Connector
NOR
Flash
T120 FPGA
10 MHz
Oscillator
FTDI
USB
JTAG Header
MIPI RX0 Header
MIPI RX1 Header
SPI
Header
SMA
Input
8 Pairs
9 Pairs
1 Clock Pair
4 Data, 1 Clock
4 Data, 1 Clock
SPI Interface
JTAG Interface
MIPI TX0 Header
MIPI TX1 Header
4 Data, 1 Clock
4 Data, 1 Clock
20, 30, 50,
74.25 MHz
Oscillators
25 MHz Oscillator
(Dedicated MIPI)
60
Connector
for GPIO and
Configuration
Raspberry Pi
Connector
40
2 User DIP Switches
LVDS RX, Clock
& GPIO Header
HDMI
Connector
Ethernet
Connector
LVDS TX & GPIO Header
EEPROM, 1 Mbit
2 PMOD
Compatible
GPIO Sockets
LPDDR3 Module, 4 Gb
Features
•Efinix® T120F324I4 device in an 324-ball FineLine BGA package with MIPI CSI-2
interface and DDR DRAM controller
•LPDDR3 256 Mbits x 16 bits memory supporting up to 4 Gb
•HDMI 1080p transmitter for video output
•Triple-speed Ethernet PHY
•1 Mbit EEPROM
•128 Mbit SPI NOR flash memory
•FTDI FT2232H dual-channel chipset with USB controller
•Micro-USB type B receptacle
•Designed to accommodate multiple daughter cards:
—Four MIPI high-speed connectors to attach Efinix camera connector daughter cards
—Two LVDS high-speed headers to attach the Efinix GPIO daughter card
•60-pin high-speed connector for user I/O
•40-pin socket compatible with Raspberry Pi computer
•Two 12-pin PMOD-compatible GPIO sockets
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Trion T120 BGA324 Development Kit User Guide
•User LEDs and switches:
—4 LEDs on T120F324I4 bank 2F
—2 pushbutton switches (connected to bank 2F I/O pins)
—2 DIP switches (connected to bank 2F I/O pins)
•10, 20, 25, 30, 50, and 74.25 MHz oscillators for T120F324I4 PLL input
•Optional 3.3 V external clock source available through SMA input to drive the
T120F324I4 PLL input or clock input pin
•Power:
—Power source: 12 V, 5 A power supply
—On-board regulator sources: 1.2 V (5 A), 1.25 V (0.5 A), 3.3 V (5 A), 5 V (0.5 A), 1.8 (2
A), 2.5V (2 A), and 2.8 V (0.5 A)
—On-board regulator for LPDDR3 memory
—Fixed 3.3 V VCCIO for T120F324I4 I/O banks 1A, 1D, 1E, 1F, 1G, 2D, 2E, 3D, 4E,
and 4F
—User selectable voltages from 1.8 V, 2.5 V, and 3.3 V for bank 1B, 1C, and 2F
—Optional header for camera power supply with power on sequence
—Optional header for daughter card power supply
•Power good and T120F324I4 configuration done LEDs
Overview
The board features the Efinix® T120 programmable device in a 324-ball FBGA package,
which is fabricated using Efinix® Quantum™ technology. The Quantum™-accelerated
programmable logic and routing fabric is wrapped with an I/O interface in a small footprint
package. T120 devices also include embedded memory blocks and multiplier blocks (or DSP
blocks). You create designs for the T120 device in the Efinity® software, and then download
the resulting configuration bitstream to the board using the USB connection.
Learn more: For more information on T120 FPGAs, refer to the T120 Data Sheet.
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Trion T120 BGA324 Development Kit User Guide
Figure 2: Trion® T120 BGA324 Development Board Components (Top)
LVDS TX LVDS RX
Micro-USB
Type AB
12 V Power Supply
User Pushbuttons
and Switches
Power
Supply
Select
PMOD
SMA Connector
SPI NOR
Programming
On/Off Switch
MIPI RX Channel 1
Reset
Pushbutton
PMOD
RJ-45 Ethernet
HDMI
MIPI RX
Channel 0
JTAG Header
GPIO and
Configuration
T120 BGA324 LEDs
Figure 3: Trion® T120 BGA324 Development Board Components (Bottom)
MIPI TX
Channel 1
Raspberry Pi
Computer
MIPI TX
Channel 0
Bottom
The Trion® T120 BGA324 Development Board provides four 0.8 mm high-speed ground
plane sockets for the MIPI CSI-2 interface and two 0.8 mm high-speed ground plane sockets
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Trion T120 BGA324 Development Kit User Guide
for the LVDS transmitters and receivers. It has two sockets to connect PMOD-compatible
peripherals. Additionally, it has a 0.5 mm high-speed connector for additional I/O pins and
one 40-pin header for connecting to a Raspberry Pi computer.
The FTDI FT2232H module has two channels to support SPI (FTDI interface 0) and
JTAG (FTDI interface 1) configuration. It receives the T120 configuration bitstream
from a USB host and writes to the on-board SPI NOR flash memory. After a reset in SPI
passive mode, the FTDI controller can also write the configuration bitstream directly to the
FPGA. Additionally, it supports direct JTAG programming mode in which it writes the
configuration bitstream directly to the FPGA through the JTAG interface.
Learn more: Refer to AN 006 Configuring Trion FPGAs for more information.
The SPI NOR flash memory stores the configuration bitstream it receives from the FTDI
FT2232H module. The T120 device accesses this configuration bitstream when it is in active
configuration mode (default).
The board's main power supply is the 12 V DC input. Use the included power supply to
provide the board with power through the 12 V input jack. The recommended power input
is a 12 V (5 A minimum) DC power source.
The board regulates down the 12 V DC input using on-board switching regulators to provide
the necessary voltages for the T120 device, LPDDR3, Ethernet PHY, HDMI transmitter,
PMOD module, SPI flash memory, SDRAM and on-board oscillator.
Power On
To turn on the development board, turn on switch SW17. Upon power-up, the 12 V DC
power is input to the on-board regulators through 12 V input jack (CON1) to generate the
required 3.3 V, 2.8 V, 2.5 V, 1.8 V, 1.25 V, and 1.2 V for components on the board. When
these voltages are up and stable, on-board LEDs (D1, D2, D3, and D4) illuminate, giving you
a visual confirmation that the power supplies on the board are up and stable.
Note: The micro-USB cable cannot power the board. You must use the provided 12 V DC power supply
cable.
Reset
The T120F324I4 device is typically brought out of reset with the CRESET signal. Upon
power up, the T120F324I4 device is held in reset until CRESET toggles high-low-high.
Note: You can manually assert the high-low-high transition with pushbutton switch SW2.
CRESET has a pull-up resistor. When you press SW2, the board drives CRESET low; when
you release SW2, the board drives CRESET high. Thus, a single press of SW2 provides the
required high-low-high transition.
After toggling CRESET, the T120F324I4 device goes into configuration mode and reads
the device configuration bitstream from the flash memory. When configuration completes
successfully, the device drives the CDONE signal high. CDONE is connected to a green LED
(D6), which turns on when the T120F324I4 device enters user mode.
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Trion T120 BGA324 Development Kit User Guide
Clock Sources
Five on-board oscillators (10, 20, 25, 30, 50, and 74.25 MHz), are available to drive the
T120F324I4 PLL input pin and clock input. Alternatively, you can disable the 10 MHz
oscillator and use an external clock source through the SMA input (J9). Set jumper J10 to use
the 10 MHz or SMA input as the clock source.
Table 1: Oscillator and Clock Generator Sources
Clock Source PLL Input Pin
10 MHz oscillator or 3.3 V SMA input GPIOR_188_PLLIN2
20 MHz oscillator GPIOR_167_PLLIN1
25 MHz oscillator (dedicated MIPI clock
source)
GPIOR_169_MREFCLK
30 MHz oscillator GPIOL_15_PLLIN0
50 MHz oscillator GPIOR_186_PLLIN0
74.25 MHz oscillator GPIOR_166_PLLIN0
Configuration
The Trion® T120 BGA324 Development Board has two DIP switches to set the configuration
mode for the T120 FPGA.
Learn more: For more details on configuration, refer to AN 006: Configuring Trion FPGAs.
Table 2: Configuration Pins
Reference Configuration Pin Notes
SW3 CBSEL Choose which image to load from the SPI flash device.
SW4 CBUS Select SPI active or passive configuration.
EEPROM
The Trion® T120 BGA324 Development Board has a 1 Mbit (131,072 x 8) EEPROM to store
user data (part number AT24CM01-SHD-T). You can program the EEPROM through the
I2C bus at the preset address 0x50.
Table 3: EEPROM Pins
Signal Name FPGA Pin
EEPROM_SCL GPIOL_04
EEPROM_SDA GPIOL_05
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Trion T120 BGA324 Development Kit User Guide
Camera Power-Up Circuit
The Trion® T120 BGA324 Development Board includes a basic power up sequence circuit for
MIPI CSI-2 cameras. You control the circuit using SW1. When SW1 is on, the power up goes
from VSUP1 to VSUP2 to VSUP3 in sequence.
Note: To apply power in sequence, set the jumpers for J4, J5 and J6 as described in Header J4, J5, and
J6 (Power Select) on page 15.
Headers
The board contains a variety of headers to provide power, inputs, and outputs, and to
communicate with external devices or boards.
Table 4: Trion® T120 BGA324 Development Board Headers
Reference
Designator
Description
P1 60-pin high-speed connector for GPIO and configuration
P2 40-pin high-speed connector for LVDS receiver (RX) and GPIO
P3 40-pin high-speed connector for LVDS transmitter (TX) and GPIO
P4 40-pin connector for MIPI CSI-2 channel 1 receiver, 1.8, 2.5, 3.3 V GPIO, and power supply
P5 40-pin connector for MIPI CSI-2 channel 1 transmitter, 1.8, 2.5, 3.3 V GPIO, and power supply
P6 40-pin connector for MIPI CSI-2 channel 0 receiver, 1.8, 2.5, 3.3 V GPIO, and power supply
P7 40-pin connector for MIPI CSI-2 channel 0 transmitter, 1.8, 2.5, 3.3 V GPIO, and power supply
J1 12 V DC power supply input jack
J2 User selectable VCCIO for banks 1B and 1C
J3 User selectable VCCIO for bank 2F
J4 User selectable supply with or without power up sequence for MIPI CSI-2 camera (5.0 V, 3.3 V,
and 2.8 V)
J5 User selectable supply with or without power up sequence for MIPI CSI-2 camera (3.3 V and
1.8 V)
J6 User selectable supply with or without power up sequence for MIPI CSI-2 camera (1.2 V)
J7 External SPI NOR flash programming header
J8 JTAG header
J9 SMA connector for external 3.3 V clock source input
J10 3-pin header to select whether to use the on-board 10 MHz oscillator or SMA input from
external clock source
J11 40-pin connector compatible with Raspberry Pi computer
J12, J13 12-pin PMOD socket
J14 Micro-USB Type-AB receptacle
J15 RJ-45 triple-speed Ethernet connector
J16 HDMI output connector
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Trion T120 BGA324 Development Kit User Guide
Header P1 (GPIO and Configuration)
P1 is a high-speed connector (part number is LSHM-130-02.5-L-DV-A-S-TR) that you
can connect to an external board. Through it, the external board can configure the T120
FPGA and control the GPIO. P1 connects to GPIO pins in banks 1B, 1C, 1G, 3D, and
TR_CORNER. These pins are fixed to 3.3 V.
P1 also provides 12 V DC power directly from the DC adapter. To connect to P1, use part
number: LSHM-130-02.5-L-DV-A-S-TR.
Table 5: P1 Pin Assignments
Pin Number Pin Name Pin Number Pin Name
1 12V 2 12V
3 CCK 4 CBUS0
5 SS 6 CBUS1
7 CDI0 8 CBUS2
9 CDI1 10 CONDONE
11 CDI2 12 NSTATUS
13 CDI3 14 CRESET_N
15 CDI4 16 NC
17 CDI5 18 NC
19 CDI6 20 NC
21 CDI7 22 NC
23 GND 24 NC
25 GPIOL_66 26 GND
27 GPIOT_RXP15 28 NC
29 GPIOT_RXN15 30 NC
31 GPIOT_RXP16 32 NC
33 GPIOT_RXN16 34 NC
35 GPIOT_RXP17 36 NC
37 GPIOT_RXN17 38 NC
39 GPIOT_RXP18 40 NC
41 GPIOT_RXN18 42 NC
43 GND 44 GND
45 GPIOR_168 46 NC
47 GPIOR_187 48 NC
49 GPIOT_RXN14 50 NC
51, 53, 55, 57, 59 NC 52, 54, 56, 58, 60 NC
61 GND 62 GND
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Trion T120 BGA324 Development Kit User Guide
Headers P2 and P3 (LVDS)
P2 and P3 contain the LVDS signals. Each header has 9 dedicated LVDS channels. You can
also use LVDS pins as GPIO.
Learn more: Refer to the Trion Interfaces User Guide for instructions on using the LVDS pins as GPIO.
Table 6: P2 Pin Assignments
Pin
Number
Signal Name Description Pin
Number
Signal Name Description
1 GPIOT_RXP09_CLKP0 2 GPIOT_RXP07
3 GPIOT_RXN09_CLKN0
Dedicated LVDS
RX clock 4 GPIOT_RXN07
Dedicated LVDS
RX Channel 07
5 GND Ground 6 GND Ground
7 GPIOT_RXP01 8 GPIOT_RXP08
9 GPIOT_RXN01
Dedicated LVDS
RX Channel 01 10 GPIOT_RXN08
Dedicated LVDS
RX Channel 08
11 GND Ground 12 GND Ground
13 GPIOT_RXP02 14 NC
15 GPIOT_RXN02
Dedicated LVDS
RX Channel 02 16 NC
No Connect
17 GND Ground 18 GND Ground
19 GPIOT_RXP03 20 NC
21 GPIOT_RXN03
Dedicated LVDS
RX Channel 03 22 NC
No Connect
23 GND Ground 24 GND Ground
25 GPIOT_RXP04 26 NC
27 GPIOT_RXN04
Dedicated LVDS
RX Channel 04 28 NC
No Connect
29 GND Ground 30 GND Ground
31 GPIOT_RXP05 32 NC
33 GPIOT_RXN05
Dedicated LVDS
RX Channel 05 34 NC
No Connect
35 GND Ground 36 GND Ground
37 GPIOT_RXP06 38 NC
39 GPIOT_RXN06
Dedicated LVDS
RX Channel 06 40 NC
No Connect
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Trion T120 BGA324 Development Kit User Guide
Table 7: P3 Pin Assignments
Pin
Number
Signal Name Description Pin
Number
Signal Name Description
1 GPIOB_TXP00 2 GPIOB_TXP07
3 GPIOB_TXN00
Dedicated LVDS
TX Channel 00 4 GPIOB_TXN07
Dedicated LVDS
TX Channel 07
5 GND Ground 6 GND Ground
7 GPIOB_TXP01 8 GPIOB_TXP08
9 GPIOB_TXN01
Dedicated LVDS
TX Channel 01 10 GPIOB_TXN08
Dedicated LVDS
TX Channel 08
11 GND Ground 12 GND Ground
13 GPIOB_TXP02 14 NC
15 GPIOB_TXN02
Dedicated LVDS
TX Channel 02 16 NC
No Connect
17 GND Ground 18 GND Ground
19 GPIOB_TXP03 20 NC
21 GPIOB_TXN03
Dedicated LVDS
TX Channel 03 22 NC
No Connect
23 GND Ground 24 GND Ground
25 GPIOB_TXP04 26 NC
27 GPIOB_TXN04
Dedicated LVDS
TX Channel 04 28 NC
No Connect
29 GND Ground 30 GND Ground
31 GPIOB_TXP05 32 NC
33 GPIOB_TXN05
Dedicated LVDS
TX Channel 05 34 NC
No Connect
35 GND Ground 36 GND Ground
37 GPIOB_TXP06 38 NC
39 GPIOB_TXN06
Dedicated LVDS
TX Channel 06 40 NC
No Connect
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Trion T120 BGA324 Development Kit User Guide
Headers P4 and P6 (MIPI Receiver)
P4 and P6 are dedicated MIPI CSI-2 receiver high-speed interface connectors that support
1 clock lane and 4 data lanes. These headers also include optional supply pins VSUP1,
VSUP2, VSUP3, as well as five 1.8 V or 3.3 V GPIO pins (user selectable). You can use these
connectors to attach a camera connector daughter card.
Table 8: MIPI Receiver Channel 0 (P6) and Channel 1 (P4)
where x is 1 or 0
Pin
Number
Signal Name Description Pin
Number
Signal Name Description
1 VSUP1 Voltage supply 1 2 MIPIx_RXD_P0
3 VSUP2 Voltage supply 2 4 MIPIx_RXD_N0
Differential MIPI
Receiver Channel
Lane 0
5 GND Ground 6 GND Ground
7 NC 8 MIPIx_RXD_P1
9 NC
No Connect
10 MIPIx_RXD_N1
Differential MIPI
Receiver Channel
Lane 1
11 GND Ground 12 GND Ground
13 NC 14 MIPIx_RXD_P2
15 NC
No Connect
16 MIPIx_RXD_N2
Differential MIPI
Receiver Channel
Lane 2
17 GND Ground 18 GND Ground
19 NC 20 MIPIx_RXD_P3
21 NC
No Connect
22 MIPIx_RXD_N3
Differential MIPI
Receiver Channel
Lane 3
23 GND Ground 24 GND Ground
25 NC 26 MIPIx_RXD_P4
27 NC
No Connect
28 MIPIx_RXD_N4
Differential MIPI
Receiver Channel 0
Lane 4
29 GND Ground 30 GND Ground
31 NC 32 USER_SWITCH0 (P4)
PMOD_A_IO0 (P6)
1.8 or 3.3 V GPIO
33 NC
No Connect
34 USER_SWITCH1 (P4)
PMOD_A_IO1 (P6)
1.8 or 3.3 V GPIO
35 GND Ground 36 GND Ground
37 VSUP3 Voltage supply 3 38 USER_DIP0 (P4)
PMOD_A_IO2 (P6)
1.8 or 3.3 V GPIO
39 GPIOT_RXP16 (P4)
GPIOT_RXP15 (P6)
1.8 or 3.3 V GPIO 40 USER_DIP1 (P4)
PMOD_A_IO3 (P6)
1.8 or 3.3 V GPIO
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Trion T120 BGA324 Development Kit User Guide
Headers P5 and P7 (MIPI Transmitters)
P5 and P7 are dedicated MIPI CSI-2 transmitter high-speed interface connectors that support
1 clock lane and 4 data lanes. These headers also include optional supply pins VSUP1,
VSUP2, VSUP3, as well as five 1.8 V or 3.3 V GPIO pin (user selectable). You can use these
connectors to attach a camera connector daughter card.
Note: P5 and P7 are located on the bottom of the board.
Table 9: MIPI Transmitter Channel 0 (P7) and Channel 1 (P5)
where x is 1 or 0
Pin
Number
Signal Name Description Pin
Number
Signal Name Description
1 VSUP1 Voltage supply 1 2 MIPIx_TXD_P0
3 VSUP2 Voltage supply 2 4 MIPIx_TXD_N0
Differential MIPI
Transmitter Channel
Lane 0
5 GND Ground 6 GND Ground
7 NC 8 MIPIx_TXD_P1
9 NC
No Connect
10 MIPIx_TXD_N1
Differential MIPI
Transmitter Channel
Lane 1
11 GND Ground 12 GND Ground
13 NC 14 MIPIx_TXD_P2
15 NC
No Connect
16 MIPIx_TXD_N2
Differential MIPI
Transmitter Channel
Lane 2
17 GND Ground 18 GND Ground
19 NC 20 MIPIx_TXD_P3
21 NC
No Connect
22 MIPIx_TXD_N3
Differential MIPI
Transmitter Channel
Lane 3
23 GND Ground 24 GND Ground
25 NC 26 MIPIx_TXD_P4
27 NC
No Connect
28 MIPIx_TXD_N4
Differential MIPI
Transmitter Channel
Lane 4
29 GND Ground 30 GND Ground
31 NC 32 USER_LED0 (P5)
PMOD_A_IO4 (P7)
1.8 or 3.3 V GPIO
33 NC
No Connect
34 USER_LED1 (P5)
PMOD_A_IO5 (P7)
1.8 or 3.3 V GPIO
35 GND Ground 36 GND Ground
37 VSUP3 Voltage supply 3 38 USER_LED02 (P5)
PMOD_A_IO6 (P7)
1.8 or 3.3 V GPIO
39 GPIOT_RXN16 (P5)
GPIOT_RXN15 (P7)
1.8 or 3.3 V GPIO 40 USER_LED3 (P5)
PMOD_A_IO7 (P7)
1.8 or 3.3 V GPIO
Header J1 (12 V Power)
J1 is a 12 V DC power supply input jack. J1 supplies power to regulators on the board that
power the T120F324I4 FPGA. The maximum current supply to this input jack is 10 A.
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Trion T120 BGA324 Development Kit User Guide
Header J2 and J3
J2 and J3 are a 6-pin headers used to select the voltage supply for banks 1B and 1C (J2) and
bank 2F (J3). By default, the jumpers connect pin 1 and 2, which is 3.3 V. Connect the
jumpers as shown in the following table to change the voltages..
Jumper VCCIO1B_1C (J2) VCCIO2F (J3)
Connect pins 1 and 2 3.3 V (default) 3.3 V (default)
Connect pins 3 and 4 2.5 V 2.5 V
Connect pins 5 and 6 1.8 V 1.8 V
Warning: For J2 and J3, only select one voltage at a time; otherwise you may damage the board.
Header J4, J5, and J6 (Power Select)
J4, J5, and J6 are headers you use to select the voltage and/or power up sequence option. Use
a jumper across 2 pins to make your selection.
•J4 controls the voltage (5.0, 3.3, and 2.8) for the 4 MIPI headers and 2 LVDS headers
•J5 controls the voltage (3.3 and 1.8) for the 4 MIPI headers and 2 LVDS headers
•J6 controls the voltage (1.2) for the four MIPI headers
Table 10: Voltage Selection for J4, J5, and J6
Jumper VSUP1 (J4) VSUP2 (J5) VSUP3 (J6)
Connect pins 1 and 2 5.0 V 3.3 V 1.2 V
Connect pins 3 and 4 3.3 V 1.8 V 1.2 V with power up
sequence (default)
Connect pins 5 and 6 3.3 V with power
up sequence
1.8 V with power up
sequence (default)
–
Connect pins 7 and 8 2.8 V – –
Connect pins 9 and 10 2.8 V with power up
sequence (default)
– –
Warning: For each header, only select one voltage at a time; otherwise you may damage the board.
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Trion T120 BGA324 Development Kit User Guide
Header J7 (SPI)
J7 is a SPI interface that you can use to configure the on-board NOR flash or T120F324I4
FPGA.
Table 11: J7 Pin Assignments
Pin Number Signal Name Description T120F324I4 Pin Name
1 CCK SPI configuration clock GPIOL_01_CCK
2 CRESET_N Configuration reset pin (active low) CRESET_N
3 CDI0 SPI serial data output GPIOL_08_CDI0
4 CONDONE Configuration done status pin CONDONE
5 CDI1 SPI serial data input GPIOL_09_CDI1
6 HOLD SPI hold pin (active low) –
7 SS SPI slave select pin (active low) GPIOL_00_SS
8 3V3 3.3 V power supply –
9 FTDI_RST Reset pin for on board FTDI FT2232
chipset (active low)
–
10 GND Ground –
Header J8 (JTAG)
Headers J8 is the JTAG interfaces for configuration or boundary scan testing.
Table 12: J8 Pin Assignments
Pin Number Signal Name Description
1 TDO JTAG data output signal
2 3.3V 3.3 V power supply
3 TCK JTAG data clock
4 TDI JTAG data input
5 TMS JTAG TMS mode select
6 FTDI_RST Reset pin for on-board FTDI FT2232 module (active
low)
7 SS Slave select signal
8 CRESET_N Configuration reset pin (active low)
9 GND Ground
10 GND Ground
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Trion T120 BGA324 Development Kit User Guide
Header J10 (Clock and PLL Input Select)
J10 is a 3-pin header used to select the source for the T120F324I4 clock input and PLL input.
Drive a 3.3 V clock source input into the SMA connector, J9, if you are using the external
clock source option.
Table 13: Clock Selection Pin Assignments
Pin Number Signal Notes
1 (default) 10 MHz on-board oscillator Connect pins 1 and 2 to select the
oscillator (default)
2 GPIOR_188_PLLIN2
3 External clock source from SMA
input J9
Connect pins 2 and 3 to select the
SMA input
Header J11 (Raspberry Pi)
J11 is a 40-pin connector that is compatible with Raspberry Pi computers. It connects to
GPIO pins in banks 1C, 1D, and 3D.
Note: J11 is located on the bottom of the board.
Table 14: J11 Pin Assignments
Pin Number Signal Name T120F324I4
Pin Name
Pin Number Signal Name T120F324I4
Pin Name
1 3.3 V 3.3 V supply 2 5.0 V 5.0 V supply
3 GPIOT_RXP18 GPIOT_RXP18 4 5.0 V 5.0 V supply
5 GPIOT_RXN18 GPIOT_RXN18 6 GND Ground
7 GPIOR_168 GPIOR_168 8 GPIOT_RXP17 GPIOT_RXP17
9 GND Ground 10 GPIOT_RXN17 GPIOT_RXN17
11 GPIOT_RXN14 GPIOT_RXN14 12 NC No connect
13, 15 NC No connect 14 GND Ground
17 3.3 V 3.3 V Supply 16, 18 NC No connect
19 GPIOT_RXP16 GPIOT_RXP16 20 GND Ground
21 GPIOT_RXN16 GPIOT_RXN16 22 NC No connect
23 GPIOR_187 GPIOR_187 24 GPIOT_RXP15 GPIOT_RXP15
25 GND Ground 26 GPIOT_RXN15 GPIOT_RXN15
27, 29, 31,
33, 35, 37
NC No connect 30, 34 GND Ground
39 GND Ground 28, 32, 36, 38, 40 NC No connect
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Trion T120 BGA324 Development Kit User Guide
Headers J12 and J13 (PMOD)
J12 and J13 are 12-pin sockets for connecting to peripheral modules (PMODs) such as ADC,
DAC, audio, WiFi, Bluetooth, etc. These interfaces support PMOD type 1, 2, 2A, 3, 4, 4A, 5
and 6. You can choose between 1.8 V, 2.5 V, and 3.3 V for these sockets.
Table 15: J12 Pin Assignments
Pin Number Signal Name T120F324I4
Pin Name
Pin Number Signal Name T120F324I4
Pin Name
1 PMOD_A_IO0 GPIOT_RXP20 2 PMOD_A_IO1 GPIOT_RXN20
3 PMOD_A_IO2 GPIOT_RXP21 4 PMOD_A_IO3 GPIOT_RXN21
5 PMOD_A_IO4 GPIOT_RXP22 6 PMOD_A_IO5 GPIOT_RXN22
7 PMOD_A_IO6 GPIOT_RXP23 8 PMOD_A_IO7 GPIOT_RXN23
9 Ground GND 10 Ground GND
11 VCC 3.3 V 12 VCC 3.3 V
Table 16: J13 Pin Assignments
Pin Number Signal Name T120F324I4
Pin Name
Pin Number Signal Name T120F324I4
Pin Name
1 USER_LED0 GPIOT_RXP24 2 USER_DIP0 GPIOT_RXP28
3 USER_LED1 GPIOT_RXN24 4 USER_DIP1 GPIOT_RXN28
5 USER_LED2 GPIOT_RXP27 6 USER_SWITCH0 GPIOT_RXP29
7 USER_LED3 GPIOT_RXN27 8 USER_SWITCH1 GPIOT_RXN29
9 Ground GND 10 Ground GND
11 VCC 3.3 V 12 VCC 3.3 V
Header J14 (USB Connector)
J14, a micro-USB type B socket, is the interface between the board and your computer for
communication. Connect the micro-USB cable for configuring T120F324I4 FPGA and NOR
flash. The board supports three different configuration modes: SPI passive mode, SPI active
mode, and JTAG mode.
Note: The USB cable cannot power the board.
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Trion T120 BGA324 Development Kit User Guide
Header J15 (RJ-45 Ethernet)
The board has a Gigabit Ethernet transceivers from Davicom (part number: DM9119IN,
which is compliant with IEEE Std. 802.33 MAC and IEEE STD. 802.3I 1000BASE-
TX/100BASE-TX/10BASE-T. The chip supports:
•Reduced Gigabit Media Independent Interface (RGMII) to the MAC controller
•Standard unshielded twisted pair (UTP) CAT6, CAT5e, CAT5, CAT3 cable (10 Mbps
only)
•Auto-negotiation with auto MDI/MDI crossover correction, auto polarity correction, and
power down mode
•Advanced DSP for baseline wander correction, equalization, echo, and crosstalk
cancellation
The Ethernet transceiver U18 is set to address 0x03H.
Table 17: J15 (Ethernet) Pin Assignments
Signal Name Pin Name T120F324I4 Name Description
ETH_GTXCLK GTXCLK GPIOL_72 GMII transmit clock
ETH_TXEN TXEN GPIOT_RXP11 GMII/MII transmit enable
ETH_TXD3 TXD[3] GPIOR_178 GMII and MII transmit data
ETH_TXD2 TXD[2] GPIOR_183 GMII and MII transmit data
ETH_TXD1 TXD[1] GPIOR_174 GMII and MII transmit data
ETH_TXD0 TXD[0] GPIOR_173 GMII and MII transmit data
ETH_RXC RXC GPIOL_73 GMII and MII receive clock
ETH_RXDV RXDV/AD[2] GPIOT_RXP12 GMII and MII receive data valid
ETH_RXD3 RXD[3]/AN[1] GPIOL_75 GMII and MII receive data
ETH_RXD2 RXD[2]/AN[0] GPIOL_17 GMII and MII receive data
ETH_RXD1 RXD[1]/TXDLY GPIOL_63 GMII and MII receive data
ETH_RXD0 RXD[0]/AD[3] GPIOL_62 GMII and MII receive data
ETH_RSTN RSTN GPIOT_RXN13 Global reset input; active-low to reset the
entire chip
ETH_MDC MDC GPIOT_RXN12 Serial clock line
ETH_MDIO MDIO GPIOT_RXP13 Serial data line
ETH_IRQ IRQ GPIOT_RXN11 Interrupt to MAC
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Trion T120 BGA324 Development Kit User Guide
Header J16 (HDMI)
J16 is an HDMI connector that outputs video through the on-board LVDS HDMI
transmitter from ITE Tech. Inc. (part number: IT6263N). The IT6263 is a high-performance,
single-chip De-SSC LVDS to HDMI converter. It supports HDMI v1.4a standard with
resolutions up to 1080p with UXGA and 10-bit deep colors. The HDMI transmitter I/O pins
are connected to banks 2E, 4E and 4F. The HDMI device is set to address 0x98, and you can
access it through the I2C interface.
Table 18: J16 HDMI Pin Assignments
Signal Name Pin Name T120F324I4 Name Description
HDMI_RESET SYSRSTN GPIOT_RXP14 Hardware reset pin. Active Low
HDMI_RXPCLK RXPCLK GPIOB_TXP09 LVDS positive clock input
HDMI_RXNCLK RXNCLK GPIOB_TXN09 LVDS negative clock input
HDMI_RXPA1 RXPA1 GPIOB_TXP10 LVDS first link positive input
HDMI_RXNA1 RXNA1 GPIOB_TXN10 LVDS first link negative input
HDMI_RXPB1 RXPB1 GPIOB_TXP11 LVDS first link positive input
HDMI_RXNB1 RXNB1 GPIOB_TXN11 LVDS first link negative input
HDMI_RXPC1 RXPC1 GPIOB_TXP12 LVDS first link positive input
HDMI_RXNC1 RXNC1 GPIOB_TXN12 LVDS first link negative input
HDMI_RXPD1 RXPD1 GPIOB_TXP13 LVDS first link positive input
HDMI_RXND1 RXND1 GPIOB_TXN13 LVDS first link negative input
HDMI_RXPE1 RXPE1 GPIOB_TXP14 LVDS first link positive input
HDMI_RXNE1 RXNE1 GPIOB_TXN14 LVDS first link negative input
HDMI_RXPA2 RXPA2 GPIOB_TXP15 LVDS second link positive input
HDMI_RXNA2 RXNA2 GPIOB_TXN15 LVDS second link negative input
HDMI_RXPB2 RXPB2 GPIOB_TXP16 LVDS second link positive input
HDMI_RXNB2 RXNB2 GPIOB_TXN16 LVDS second link negative input
HDMI_RXPC2 RXPC2 GPIOB_TXP17 LVDS second link positive input
HDMI_RXNC2 RXNC2 GPIOB_TXN17 LVDS second link negative input
HDMI_RXPD2 RXPD2 GPIOB_TXP18 LVDS second link positive input
HDMI_RXND2 RXND2 GPIOB_TXN18 LVDS second link negative input
HDMI_RXPE2 RXPE2 GPIOB_TXP19 LVDS second link positive input
HDMI_RXNE2 RXNE2 GPIOB_TXN19 LVDS second link negative input
HDMI_PCSCL PCSCL GPIOT_RXP19 Serial programming clock for chip
programming
HDMI_PCSDA PCSDA GPIOT_RXN19 Serial programming data for chip
programming
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