FDI LPC3180 User manual

LPC3180 Development Kit
User’s Manual
For Software and Documentation please go to:
www.teamfdi.com/lpc3180

FDI
NXP LPC3180 Demo
User’s Manual
FDI
Rev 2 Page 2 10/1/2007
Information in this document is provided solely to enable the use of Future Designs products. FDI assumes
no liability whatsoever, including infringement of any patent or copyright. FDI reserves the right to make
changes to these specifications at any time, without notice. No part of this document may be reproduced or
transmitted in any form or by any means, electronic or mechanical, for any purpose, without the express
written permission of Future Designs, Inc. 2702 Triana Boulevard, Huntsville, AL 35805
NOTE: The inclusion of vendor software products in an FDI kit does not imply an endorsement of the
product by Future Designs, Inc.
©2007 Future Designs, Inc. All rights reserved.
Microsoft, MS-DOS, Windows, Microsoft Word are registered trademarks of Microsoft Corporation
Other brand names are trademarks or registered trademarks of their respective owners.
Revision 2, 9/11/2007 6:20:00 PM
Printed in the United States of America

FDI
NXP LPC3180 Demo
User’s Manual
FDI
Rev 2 Page 3 10/1/2007
Table of Contents
1.0 Introduction....................................................................................................................................................... 4
2.0 Guide to Kit....................................................................................................................................................... 4
2.1 Kit Contents................................................................................................................................................. 4
2.2 Software and Documentation....................................................................................................................... 4
2.3 Power Requirements.................................................................................................................................... 4
2.4 Jumpers........................................................................................................................................................ 4
2.5 JTAG Connectors ........................................................................................................................................ 5
2.6 Serial Connection......................................................................................................................................... 5
2.7 GUI Board ................................................................................................................................................... 5
3.0 Hardware Setup................................................................................................................................................. 6
4.0 Software Installation ......................................................................................................................................... 7
4.1 Host PC........................................................................................................................................................ 7
4.2 Build System................................................................................................................................................ 8
5.0 Boot Process...................................................................................................................................................... 9
5.1 SIBL ............................................................................................................................................................ 9
5.2 U-Boot....................................................................................................................................................... 10
5.3 Linux Boot................................................................................................................................................. 10
5.4 SDRAM Memory Map.............................................................................................................................. 10
5.5 NAND Flash Memory Map....................................................................................................................... 10
6.0 Downloading New Software........................................................................................................................... 11
6.1 Loading Images Into SDRAM Memory..................................................................................................... 11
6.2 Writing SDRAM to NAND Flash.............................................................................................................. 13
7.0 Building Images in Linux................................................................................................................................ 14
7.1 Building U-Boot ........................................................................................................................................ 14
7.2 Building the Linux Kernel......................................................................................................................... 14
7.2.1. Kernel Modules............................................................................................................................... 15
7.3 Editing the root file system........................................................................................................................ 15
8.0 Linux Features ................................................................................................................................................ 16
8.1 USB Block Device..................................................................................................................................... 16
8.2 JFFS2......................................................................................................................................................... 16
8.3 WIFI .......................................................................................................................................................... 16
8.4 Bluetooth ................................................................................................................................................... 17
8.5 Framebuffer ............................................................................................................................................... 17
9.0 Functional Tests.............................................................................................................................................. 19
9.1 Entering Functional Test Mode.................................................................................................................. 19
9.2 Functional Test Menu................................................................................................................................ 19
9.3 Test LEDs.................................................................................................................................................. 20
9.4 Test I2C1 ................................................................................................................................................... 20
9.5 Test I2C2 ................................................................................................................................................... 21
9.6 Test SPI ..................................................................................................................................................... 21
9.7 Test UART2 to Bluetooth.......................................................................................................................... 22
9.8 Exhaustive Memory Test........................................................................................................................... 23
9.9 ST Codec Loopback test............................................................................................................................ 23
10.0 Technical Support........................................................................................................................................... 24
11.0 General Sales and Contact Information........................................................................................................... 24
11.1 General Sales............................................................................................................................................. 24
11.2 Contact Information................................................................................................................................... 24
12.0 APPENDIX A: Board Layout and Connectors .............................................................................................. 25
13.0 APPENDIX B: Schematic and Parts List....................................................................................................... 26
14.0 APPENDIX C: Framebuffer API................................................................................................................... 26
14.1 IOCTL Calls.............................................................................................................................................. 26
15.0 APPENDIX D: GUI Keypad Mapping .......................................................................................................... 30

FDI
NXP LPC3180 Demo
User’s Manual
FDI
Rev 2 Page 4 10/1/2007
1.0 Introduction
The NXP LPC3180 Demo Board is a Linux based reference design that shows the
ARM9-based microcontroller interfacing to an audio codec for VoIP, an 802.11b/g
wireless network, Bluetooth transceiver, and user interface board. Features include:
•200 MHz ARM926EJ-S Microprocessor (NXP LPC3180)
•64 MB SDRAM Memory (Samsung K4M56163PG)
•128 MB NAND Flash Memory (Samsung K9F1G08R0A)
•Wireless LAN 802.11b/g (NXP BGW211 SIP, Low power)
•Bluetooth 1.2 (NXP BGB203 SIP with 1SPP 1.2.4 firmware)
•Power Management (NXP PCF50606 & PCG50685)
•Optional Voice Codec (NXP PCF87757 1.8V Low power, low-noise)
•Audio Codec (STMicroelectronics STw5095)
•JTAG ports (CPU and Bluetooth)
•Low Power USB Port
•DB9 Serial Port
•SD Card slot
•LCD and Keypad expansion board (optional)
2.0 Guide to Kit
2.1 Kit Contents
The following items are included in the NXP LPC3180 Kit.
•LPC3180 Board Revision 2.0
•LPC3180 GUI Board Revision 1
•Condor AC Adapter 5V, 2.5A
•Serial Cable
•User’s Manual
2.2 Software and Documentation
Currently, all software and documentation related to the LPC3180 Development Kit can
be downloaded from the FDI website at www.teamfdi.com/lpc3180. The release
distribution includes Gerber files, schematics, module datasheets, software currently on
the board, as well as all other patches and setup software required to begin development.
2.3 Power Requirements
The LPC3180 Demo Board is powered by a wall mounted UL and FCC listed power
supply designed for 110VAC outlets. It provides 5V DC at 2.5 Amp. The power
connector is a 2.1mm plug with center positive polarity.
For some International Applications where a special 220V Power Supply is required, or
for larger power supply options, contact Condor Power Supplies at phone number (408)
745-7141 or DigiKey at [phone].
2.4 Jumpers
The following table lists all jumpers on the LPC3180 board, their default configurations,
and a description on the manipulation of their positions.

FDI
NXP LPC3180 Demo
User’s Manual
FDI
Rev 2 Page 5 10/1/2007
NOTE: The silkscreen markings on Rev2 for JP4 are wrong. Please see the table below
to see the correct configuration settings.
Jumper Positions Description
1-2 Allows Boot from UART Connection.JP4 2-3 (default) Allows Boot from NAND Flash.
1-2 (default) Allows PMU/JTAG to reset BGW211JP5 2-3 BGW211 can only be reset by POR
Table 1: Jumper Descriptions
2.5 JTAG Connectors
The following table lists the JTAG connectors of the LPC3180 board and the devices to
which they connect.
JTAG Connector Device Connecting
J2 LPC3180
J4 BGB203 Bluetooth
Table 2: JTAG Connections
2.6 Serial Connection
A serial connection may be made to the LPC3180 board from a host PC by connecting a
serial cable from an open COM port on the host PC to connector P1 on the LPC3180
board. Jumpers JP2 and JP3 should both be in the 1-2 positions as described in Table 1.
This connection allows the user to observe the full boot process and log into Linux after a
successful boot. A proper configuration in HyperTerminal is described below:
Baud rate: 115200
Data bits: 8
Parity: None
Stop bits: 1
Flow Control: None
2.7 GUI Board
The GUI board provides an input/output interface to the LPC3180 board. The board
contains a simple keypad with cellular phone-like buttons as well as the Densitron
DVC40406 LCD module. The LCD module allows for a resolution of 128x160 and up to
65K Colors.
With the power off, the GUI board may be connected to the LPC3180 board by lining up
connectors J12 and J13 of the LPC3180 board with connectors J1 and J2 of the GUI
board, respectively, and pushing the boards together until a complete connection is made.

FDI
NXP LPC3180 Demo
User’s Manual
FDI
Rev 2 Page 6 10/1/2007
3.0 Hardware Setup
The list below outlines the necessary steps for getting the LPC3180 and optional GUI
board up and running. Images are provided where necessary as visual aides to the setup
process.
1. Place LPC3180 and GUI boards on a flat surface.
2. OPTIONAL: Connect GUI board to LPC3180 board by lining up connectors J12
and J13 of the LPC3180 board with connectors J1 and J2 of the GUI board,
respectively. Push the boards together until a complete connection is made (see
Figure 1).
3. Connect Condor Power supply from wall outlet to P3 on the LPC3180 board (see
Figure 3).
4. Setup serial connection and HyperTerminal as described in section 2.6 (see Figure
2).
5. Toggle switch SW1 to provide power to the board(s) (see Figure 3). Text should
be immediately visible in the HyperTerminal window and on the LCD panel (if
connected).
6. If JTAG is immediately required, please consult section 4.1 on installing JLink
Commander and 6.0 on connecting JTAG for downloading software.
Figure 1: GUI Board Connection Figure 2: Serial Connection
Figure 3: Power Switch

FDI
NXP LPC3180 Demo
User’s Manual
FDI
Rev 2 Page 7 10/1/2007
4.0 Software Installation
4.1 Host PC
To download images into the LPC3180 board’s NAND flash, the J-Link Commander tool
should be used. To install this product, double-click on the
“Setup_JLinkARM_V356b.exe” file included in the distribution. After executing the
file, the user will be prompted with the install wizard. Click “Next” to advance to the
License Agreement:
Figure 4: JLink License Agreement
Click “Yes” to agree to the license and “Next” to advance to the “Destination Location”
window. The software should be installed in C:\Program
Files\SEGGER\JLinkARM_V356b. Batch files included in the distribution reference the
binary at this location. Therefore, if this installation path is modified the batch files must
be updated with the new path:
Figure 5: Destination Location
Click “Next” and “Next” again to begin the installation process. The install process will
be reflected as files are copied to your machine:

FDI
NXP LPC3180 Demo
User’s Manual
FDI
Rev 2 Page 8 10/1/2007
Figure 6: Install Progress
Finally, click “Finish” to end the installation. Shortcuts should now be placed on your
desktop which will allow you to open JLink Commander and run the programming
scripts.
Figure 7: Finish Installation
4.2 Build System
To successfully re-build kernel, u-boot, and root filesystem images for the LPC3180
board, a build system must be set up. This requires setting up a proper environment for
cross-compiling ARM binaries. Please see www.gnuarm.com for details on how to set
up such a system.

FDI
NXP LPC3180 Demo
User’s Manual
FDI
Rev 2 Page 9 10/1/2007
5.0 Boot Process
This section provides a detailed description of the boot process for the LPC3180 board.
First, a general list of steps is given as an overview to the boot process. A more detailed
explanation is then provided for the main applications responsible for loading Linux on
the LPC3180.
The boot process of the LPC3180 project is broken up into the following general steps:
1. On power-up, the LPC3180 begins booting by reading block 0 from the NAND
flash.
2. The secondary boot loader called SIBL is loaded from NAND flash, stored in the
LPC3180’s internal RAM, and executed.
3. SIBL performs initialization commands on the LPC3180 and loads the u-boot,
Linux Kernel, and root filesystem images from NAND flash into SDRAM at
predefined locations.
4. U-Boot is then executed which performs other checks and initialization steps and
finally executes the Linux Kernel image already in memory.
5. Linux boots using standard SysV Init and automatically modprobes all required
kernel modules.
6. The user may then log into the LPC3180 board as superuser “root” with no
password.
5.1 SIBL
The SIBL is the secondary boot loader that is executed before U-Boot. SIBL is
responsible for most of the required initialization and also provides a mechanism to run
functional tests on the LPC3180 board. A list of SIBL’s main responsibilities includes:
1. Lock in the PLL to allow the LPC3180 to run at 208 MHz
2. Initialize, configure, and perform a quick read/write test on the SDRAM
3. Setup NAND controller and load the images out of Flash to SDRAM
4. Perform a CRC check on loaded images to verify their integrity
5. Walk through blocks in SDRAM until an executable image (U-Boot) is located
and run.
On startup, the three LEDs located just above the LPC3180 will blink indicating CPU
activity. Following this the LEDs will count from 1 to 5 in binary as SIBL progresses
through various stages. This is useful in circumstances when the GUI board is not
plugged in and a HyperTerminal connection is not being made from a Host PC.
The functional test mode may be entered by either holding down the F1 key on the
keypad of the GUI board or the space key on the keyboard of the Host PC running
HyperTerminal. For details on the purpose and use of the functional tests, please consult
section 9.0 Functional Test.
The SIBL must be programmed into NAND flash with a special tool that also sets the
first 512 bytes of the NAND flash to an appropriate configuration.

FDI
NXP LPC3180 Demo
User’s Manual
FDI
Rev 2 Page 10 10/1/2007
5.2 U-Boot
U-Boot is another boot loader which is mainly responsible for loading the Linux Kernel.
It also provides a number of useful utilities. For example, the auto-boot process can be
aborted and a command line system accessed to handle flashing of the NAND, memory
testing, and other basic low level features (read/write individual bytes). If left to run, U-
Boot will automatically start up the Linux system.
5.3 Linux Boot
Linux is loaded using a standard SysV Init method. As the kernel enters various run-
levels scripts are executed which start specific daemons. One script run is the
/etc/rcS.d/S40modprobe.sh script. This file is actually a symbolic link to a script located
in /lib/modules/2.6.10/S40modprobe.sh. This script modprobes drivers on boot and may
be modified depending on the level of functionality desired in the bootable kernel.
After the kernel finishes booting, the login prompt is observable from the HyperTerminal
window. At this prompt, the user may log in by typing ‘root’ as the username with no
password:
Copacabana - ARM Embedded Linux version 1.1-vfp
Monday 20 December 2004 @ 20:40
(none) login:
5.4 SDRAM Memory Map
Although the images loaded into SDRAM depend on the parameters in the .ubt files,
below is the standard configuration used. The following depicts where the images are
loaded into memory, but the memory map may change as sections are uncompressed
and/or moved. Section Address Start
RootFS 0x80000000
Linux Kernel 0x80620000
U-Boot 0x81EC0000
5.5 NAND Flash Memory Map
The NAND Flash is split into the following sections:
Section Address Start
Interface Configuration data (ICR) 0x00000000
Secondary Boot Loader (SIBL) 0x00000800
RootFS 0x00020000
Linux Kernel 0x00620000
U-Boot 0x00800000
JFFS2 file system 0x01000000