GOWIN EMPU-M1 Quick Design User manual

Gowin_EMPU_M1 Quick Design
Reference Manual
IPUG534-2.0E, 05/11/2023

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is a trademark of Guangdong Gowin Semiconductor Corporation and is
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and is not responsible for any damage incurred to your hardware, software, data, or
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the current documentation and errata.

Revision History
Date
Version
Description
02/19/2019
1.0E
Initial version published.
07/18/2019
1.1E
MCU hardware design and software programming design
support extended peripherals: CAN, Ethernet, SPI-Flash,
RTC, DualTimer, TRNG, I2C, SPI, SD-Card.
MCU supports off-chip SPI-Flash downloading and startup.
08/18/2019
1.2E
MCU hardware design and software programming design
support extended peripheral DDR3.
Fixed known issues of Size and IDE.
09/27/2019
1.3E
MCU hardware design and software programming design
support read, write and erasure of SPI-Flash.
MCU software programming design supports a continuous
multi-byte read and write of I2C.
Fixed known issues of address mapping ofAHB2 andAPB2
extended interface in MCU software programming design.
Fixed known issues of continuous read and write of DDR3
Memory in MCU software programming design.
12/06/2019
1.4E
MCU hardware design and software programming design
supports PSRAM.
Updated MCU compiling software GMD V1.0.
Updated RTOS reference design.
Hardware and software reference design ofAHB2 and
APB2 extension bus interface added.
03/04/2020
1.5E
Software version updated.
06/12/2020
1.6E
MCU supports external instruction memory.
MCU supports external data memory.
Extension of 6AHB bus interfaces.
Extension of 16 APB bus interfaces.
GPIO supports multiple interface types.
I2C supports multiple interface types.
01/25/2021
1.7E
The reference design of GW1N-9C, GW2A-18C and
GW2A-55C (Version C) updated.
The reference design of Gowin Software version updated.
07/16/2021
1.8E
SynplifyPro deleted.
The version of FPGAand MCU updated.
2021/10/12
1.9E
ITCM and DTCM size of GW2AN-9X/GW2AN-18X
modified.
GW2AN-9X/GW2AN-18X does not support external DDR3.
DK-START-GW2AR18 V1.1 development board reference
design updated.
Non-BlockRAM ITCM/DTCM solution added.
05/11/2023
2.0E
Arora VFPGA products supported.
Hardware reference design and software programming
reference design updated.

Contents
IPUG534-2.0E
i
Contents
Contents...............................................................................................................i
List of Figures....................................................................................................iii
List of Tables......................................................................................................iv
1About This Manual..........................................................................................1
1.1 Purpose .............................................................................................................................. 1
1.2 Development Environment ................................................................................................. 1
1.2.1 Hardware Environment....................................................................................................1
1.2.2 Software Environment .....................................................................................................1
1.3 Reference Design............................................................................................................... 1
1.3.1 Software Reference Design............................................................................................. 1
1.3.2 Hardware Reference Design ........................................................................................... 1
2Software Programming Design......................................................................2
2.1 Software Reference Design................................................................................................ 2
2.2 ROM Configuration............................................................................................................. 2
2.3 Build....................................................................................................................................3
2.4 Download............................................................................................................................3
2.5 Reference Manual ..............................................................................................................4
3Hardware Design.............................................................................................5
3.1 Hardware Reference Design .............................................................................................. 5
3.1.1 Cortex-M1 Core System Configuration ........................................................................... 5
3.1.2 Bus Peripheral System Configuration..............................................................................6
3.2 Synthesize .......................................................................................................................... 6
3.3 Place & Route.....................................................................................................................7
3.4 Download............................................................................................................................8
3.5 Reference Manual ..............................................................................................................9
4Debug.............................................................................................................10
4.1 Hardware Debug...............................................................................................................10
4.2 Software Debug................................................................................................................10
4.2.1 Emulator Debug.............................................................................................................10
4.2.2 Serial Debug.................................................................................................................. 10

List of Figures
IPUG534-2.0E
iii
List of Figures
Figure 2-1 Import Software Reference Design ..................................................................................2
Figure 2-2 ROM Start Address and Size Configuration..................................................................... 3
Figure 2-3 Build.................................................................................................................................. 3
Figure 2-4 Device configuration.........................................................................................................4
Figure 3-1 Synthesis.......................................................................................................................... 7
Figure 3-2 Place & Route................................................................................................................... 7
Figure 3-3 Device configuration.........................................................................................................8

1 About This Manual
1.1 Purpose
IPUG534-2.0E
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1About This Manual
1.1 Purpose
This manual describes the quick design of Gowin_EMPU_M1
hardware design and software programming design using the software
development kit DK-START-GW2A18 V2.0 development board reference
design as an example.
1.2 Development Environment
1.2.1 Hardware Environment
DK-START-GW2A18 V2.0
GW2A-LV18PG256C8/I7
GW2A-18 (Version C)
1.2.2 Software Environment
Gowin_V1.9.9 Beta
ARM Keil MDK (V5.26 and above)
GMD (V1.2 and above)
1.3 Reference Design
1.3.1 Software Reference Design
Gowin_EMPU_M1 provides software programming reference design
in ARM Keil MDK (V5.26 and above) and GMD (V1.2 and above) software
environments. Click this link to get the following reference designs:
...\ref_design\MCU_RefDesign\Keil_RefDesign
...\ref_design\MCU_RefDesign\GMD_RefDesign
1.3.2 Hardware Reference Design
Gowin_EMPU_M1 provides hardware reference design. Click this link
to get the following reference design:
...\ref_design\FPGA_RefDesign\DK_START_GW2A18_V2.0

2 Software Programming Design
2.1 Software Reference Design
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2Software Programming Design
2.1 Software Reference Design
Double click to open ARM Keil MDK, select "Project > Open Project…"
to import the software reference design, as shown in Figure 2-1.
Figure 2-1 Import Software Reference Design
2.2 ROM Configuration
Use off-chip SPI-Flash memory download startup method, set the
ROM start address as "0x400" and the ROM Size as "0x7C00", as shown
in Figure 2-2.

2 Software Programming Design
2.3 Build
IPUG534-2.0E
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Figure 2-2 ROM Start Address and Size Configuration
2.3 Build
Click the build button " " to build the reference design and generate
software design BIN file, as shown in Figure 2-3.
Figure 2-3 Build
2.4 Download
Run the download tool "Programmer" integrated in Gowin Software or
in the software installation path. Click "Edit > Configure Device" in the
Programmer menu bar or "Configure Device" ( ) in the tool bar to open
the "Device configuration".

2 Software Programming Design
2.5 Reference Manual
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Select "External Flash Mode" from the "Access Mode" drop-down list.
Select "exFlash C Bin Erase, Program thru GAO-Bridge "or "exFlash C
Bin Erase, Program, Verify thru GAO-Bridge" from the "Operation"
drop-down list.
Import the software programming BIN file in "FW/MCU/Binary Input
Options > Firmware/Binary File".
In "External Flash Options > Device" option, select "Generic Flash".
Set "External Flash Options > Start Address" as "0x400000".
Click "Save" to complete the configuration, as shown in Figure 2-4.
Figure 2-4 Device configuration
After device configuration, click Program/Configure " " to complete
software design BIN file downloading.
2.5 Reference Manual
For Gowin_EMPU_M1 of software design method, see the following
manuals:
IPUG533, Gowin_EMPU_M1 Software Programming Reference
Manual
IPUG536, Gowin_EMPU_M1 IDE Software Reference Manual
IPUG532, Gowin_EMPU_M1 Download Reference Manual
IPUG535, Gowin_EMPU_M1 Serial Debugging Reference Manual
SUG502, Gowin Programmer User Guide

3 Hardware Design
3.1 Hardware Reference Design
IPUG534-2.0E
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3Hardware Design
3.1 Hardware Reference Design
Double click to run Gowin Software. Click "File > Open…" to import
hardware reference design, and you can reconfigure to generate
Gowin_EMPU_M1 according to the application requirements.
Gowin_EMPU_M1 contains Cortex-M1 core system configuration and
bus peripheral system configuration. For these configurations in the
hardware reference design, you can see the followings.
3.1.1 Cortex-M1 Core System Configuration
The configured Cortex-M1 functions are as shown in Table 3-1.
Table 3-1 Cortex-M1 Core System Configuration
Function Mode
Configuration
Number of external interrupts
32
Extended operating system
Supported
Data storage format
Little-endian format
MULT
Standard mode
Debugger
Full mode with 4 breakpoints and 2
watchpoints
Enable debugger
Debug interface
JTAG and Serial Wire interfaces
supported
ITCM Select
Internal Instruction Memory
ITCM size
32KB
ITCM Initialization value
Supported
ITCM Initialization path
32KB Bootload
DTCM Select
Internal Data Memory
DTCM Size
32KB

3 Hardware Design
3.2 Synthesize
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3.1.2 Bus Peripheral System Configuration
The peripheral interfaces of AHB and APB are shown in Table 3-2.
Table 3-2 Bus Peripheral System Configuration
Peripheral Interface
Configuration
UART0
Supported
UART1
Supported
GPIO
Supported
Timer0
Supported
Timer1
Supported
WatchDog
Supported
RTC
Supported
TRNG
Supported
DualTimer
Supported
I2C
Supported
SPI
Supported
SD-Card
Supported
Ethernet
Supported
DDR3 Memory
Supported
CAN
Supported
SPI-Flash Memory
Supported
APB Master [1]
Supported
AHB Master [1]
Supported
3.2 Synthesize
Run GowinSynthesis, the synthesis tool, to generate the Netlist File,
as shown in Figure 3-1.

3 Hardware Design
3.4 Download
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3.4 Download
Run the download tool "Programmer" to complete the hardware design
bitstream file download.
Click "Edit > Configure Device" in the Programmer menu bar or
Configure Device " " in the tool bar to open the "Device configuration".
Select "External Flash Mode" from the "Access Mode" drop-down list.
Select "exFlash C Bin Erase, Program thru GAO-Bridge "or "exFlash C
Bin Erase, Program, Verify thru GAO-Bridge" from the "Operation"
drop-down list.
Import the hardware design bitstream file in "Programming Options >
File name" option.
In "External Flash Options > Device " option, select "Generic Flash".
Set "External Flash Options > Start Address" as "0x000000".
Click "Save" to complete the configuration as shown in Figure 3-3 .
Figure 3-3 Device configuration
After device configuration, click Program/Configure " " in the
Programmer tool bar to complete hardware design bitstream files
download.

3 Hardware Design
3.5 Reference Manual
IPUG534-2.0E
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3.5 Reference Manual
Please refer to the following manuals for Gowin_EMPU_M1 hardware
design:
IPUG531, Gowin_EMPU_M1 Hardware Design Reference Manual
SUG100, Gowin Software User Guide
SUG940, Gowin Design Timing Constraints Guide
SUG935, Gowin Design Physical Constraints Guide
SUG502, Gowin Programmer User Guide

4 Debug
4.1 Hardware Debug
IPUG534-2.0E
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4Debug
4.1 Hardware Debug
Use Gowin Analyzer Oscilloscope (GAO) to debug the
Gowin_EMPU_M1 FPGA hardware design.
4.2 Software Debug
Gowin_EMPU_M1 supports two kinds of software programming
debug:
Emulator Software On-line Debug
Serial Debug
4.2.1 Emulator Debug
Emulator Type
Gowin_EMPU_M1 supports the following emulator to set break points
and perform single-step debug:
J-LINK emulator
U-LINK emulator
Debug Interface
Gowin_EMPU_M1 supports the following debug interfaces:
JTAG
Serial Wire
4.2.2 Serial Debug
Use serial and serial debug assistant to print the running status.
4.3 Reference Manual
For Gowin_EMPU_M1 debugging method, refer to following manuals:
SUG114, GowinAnalyzer Oscilloscope User Guide
IPUG536, Gowin_EMPU_M1 IDE Software Reference Manual
IPUG535, Gowin_EMPU_M1 Serial Debugging Reference Manual

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