GOWIN DK START GW1N-LV9LQ144C6I5 V2.1 User manual

DK_START_GW1N-LV9LQ144C6I5_V2.1
User Guide
DBUG399-1.0E, 08/17/2021

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and is not responsible for any damage incurred to your hardware, software, data, or
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the GOWINSEMI Terms and Conditions of Sale. All information in this document should be
treated as preliminary. GOWINSEMI may make changes to this document at any time
without prior notice. Anyone relying on this documentation should contact GOWINSEMI for
the current documentation and errata.

Revision History
Date
Version
Description
08/17/2021
1.0E
Initial version published.

Contents
DBUG399-1.0E
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Contents
Contents ...............................................................................................................i
List of Figures....................................................................................................iii
List of Tables......................................................................................................iv
1 About This Guide.............................................................................................1
1.1 Purpose .............................................................................................................................. 1
1.2 Related Documents ............................................................................................................1
1.3 Terminology and Abbreviations...........................................................................................2
1.4 Support and Feedback ....................................................................................................... 3
2 Introduction......................................................................................................4
2.1 Overview.............................................................................................................................4
2.2 Development Kit .................................................................................................................5
2.3 PCB Components ...............................................................................................................6
2.4 System Block Diagram ....................................................................................................... 6
2.5 Features.............................................................................................................................. 7
2.6 Development Board Description.........................................................................................8
3 Development Board Circuit ..........................................................................10
3.1 FPGA Module ...................................................................................................................10
Overview .................................................................................................................................10
I/O BANK Introduction ............................................................................................................10
3.2 Download..........................................................................................................................10
3.2.1 Overview........................................................................................................................10
3.2.2 USB Download Circuit ................................................................................................... 11
3.2.3 Download Flow .............................................................................................................. 11
3.2.4 Pinout............................................................................................................................. 11
3.3 Power Supply.................................................................................................................... 11
3.3.1 Overview........................................................................................................................ 11
3.3.2 Power System Distribution ............................................................................................12

Contents
DBUG399-1.0E
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3.3.3 Pinout............................................................................................................................. 12
3.4 Clock .................................................................................................................................13
3.4.1 Overview........................................................................................................................13
3.4.2 Clock ..............................................................................................................................13
3.4.3 Pinout............................................................................................................................. 13
3.5 LED ...................................................................................................................................13
3.5.1 Overview........................................................................................................................13
3.5.2 LED Circuit..................................................................................................................... 14
3.5.3 Pinout............................................................................................................................. 14
3.6 Switches ...........................................................................................................................14
3.6.1 Overview........................................................................................................................14
3.6.2 Switch Circuit .................................................................................................................14
3.6.3 Pinout............................................................................................................................. 15
3.7 Key....................................................................................................................................15
3.7.1 Overview........................................................................................................................15
3.7.2 Key Circuit .....................................................................................................................15
3.7.3 Pinout............................................................................................................................. 15
3.8 GPIO .................................................................................................................................16
3.8.1 Overview........................................................................................................................16
3.8.2 GPIO Circuit................................................................................................................... 16
3.8.3 Pinout............................................................................................................................. 17
3.9 MIPI/LVDS ........................................................................................................................19
3.9.1 Overview........................................................................................................................19
3.9.2 MIPI/LVDS Circuit ..........................................................................................................19
3.9.3 Pinout............................................................................................................................. 20
4 Consideration ................................................................................................23
5 Gowin Software..............................................................................................24

List of Figures
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List of Figures
Figure 2-1 DK_START_GW1N-LV9LQ144C6I5_V2.1 Development Board ...................................... 4
Figure 2-2 A Development Kit ............................................................................................................ 5
Figure 2-3 PCB Components............................................................................................................. 6
Figure 2-4 System Block Diagram .....................................................................................................6
Figure 3-1 FPGA USB Download Diagram........................................................................................11
Figure 3-2 Power System Distribution ............................................................................................... 12
Figure 3-3 Clock Circuit .....................................................................................................................13
Figure 3-4 LED Circuit .......................................................................................................................14
Figure 3-5 Switch Circuit.................................................................................................................... 14
Figure 3-6 Key Circuit Diagram..........................................................................................................15
Figure 3-7 GPIO Circuit .....................................................................................................................16
Figure 3-8 MIPI/LVDS Circuit.............................................................................................................19

List of Tables
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List of Tables
Table 1-1 Terminology and Abbreviations .......................................................................................... 2
Table 2-1 Development Board Description ........................................................................................ 8
Table 3-1 FPGA Download Pinout .....................................................................................................11
Table 3-2 FPGA Power Pinout ...........................................................................................................12
Table 3-3 FPGA Clock Pinout ............................................................................................................ 13
Table 3-4 LED Pinout .........................................................................................................................14
Table 3-5 Switch Circuit Pinout ..........................................................................................................15
Table 3-6 Key Circuit Pinout...............................................................................................................15
Table 3-7 J14 GPIO Pinout ................................................................................................................17
Table 3-8 J13 GPIO Pinout ................................................................................................................17
Table 3-9 J15 FPGA Pinout (IDES 16: 1 Supported) .........................................................................20
Table 3-10 J16 FPGA Pinout (IDES 16: 1 Supported) .......................................................................21
Table 3-11 J18 FPGA Pinout (IDES 16: 1 Supported) ....................................................................... 22

1 About This Guide
1.1 Purpose
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1About This Guide
1.1 Purpose
The DK_START_GW1N-LV9LQ144C6I5_V2.1 user manual consists
of the following four parts:
1. A brief introduction to the features and hardware resources of the
development board;
2. An introduction to the function, circuit, and pinout of each module;
3. Considerations for the use of development board;
4. An introduction to the usage of the FPGA development software.
1.2 Related Documents
The latest user guides are available on the GOWINSEMI Website. You
can find the related documents at www.gowinsemi.com:
1. DS100, GW1N series of FPGA Products Data Sheet
2. UG103, GW1N series of FPGA Products Package and Pinout Manual
3. UG801, GW1N-9 Pinout
4. UG290, Gowin FPGA Products Programming and Configuration Guide
5. SUG100, Gowin Software User Guide

1 About This Guide
1.3 Terminology and Abbreviations
DBUG399-1.0E
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1.3 Terminology and Abbreviations
The terminology and abbreviations used in this manual are as shown
in Table 1-1.
Table 1-1 Terminology and Abbreviations
Terminology and Abbreviations
Meaning
FPGA
Field Programmable Gate Array
SIP
System in Package
SDRAM
Synchronous Dynamic RAM
PSRAM
Pseudo static random access memory
CFU
Configurable Function Unit
CLS
Configurable Logic Slice
CRU
Configurable Routing Unit
LUT4
4-input Look-up Tables
LUT5
5-input Look-up Tables
LUT6
6-input Look-up Tables
LUT7
7-input Look-up Tables
LUT8
8-input Look-up Tables
REG
Register
ALU
Arithmetic Logic Unit
IOB
Input/Output Block
SSRAM
Shadow Static Random Access Memory
BSRAM
Block Static Random Access Memory
SP
Single Port
SDP
Semi Dual Port
DP
Dual Port
DSP
Digital Signal Processing
DQCE
Dynamic Quadrant Clock Enable
DCS
Dynamic Clock Selector
PLL
Phase-locked Loop
DLL
Delay-locked Loop
EQ144
EQFP144 package

1 About This Guide
1.4 Support and Feedback
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1.4 Support and Feedback
Gowin Semiconductor provides customers with comprehensive
technical support. If you have any questions, comments, or suggestions,
please feel free to contact us directly by the following ways.
Website: www.gowinsemi.com
E-mail: [email protected]