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CONTENTS
CHAPTER 1 OVERVIEW ................................................................................................... 1
1.1 MB90460/465 Series Features ........................................................................................................... 2
1.2 MB90460/465 Series Product line-up ................................................................................................. 5
1.3 Block Diagram of MB90460/465 Series .............................................................................................. 7
1.4 Pin Assignment ................................................................................................................................... 8
1.5 Package Dimensions ........................................................................................................................ 11
1.6 I/O Pins and Pin Functions ............................................................................................................... 14
1.7 I/O Circuit Types ............................................................................................................................... 19
CHAPTER 2 NOTES ON HANDLING DEVICES ............................................................ 23
2.1 Notes on Handling Devices .............................................................................................................. 24
CHAPTER 3 CPU ............................................................................................................ 27
3.1 CPU .................................................................................................................................................. 28
3.2 Memory Space .................................................................................................................................. 29
3.3 Memory Maps ................................................................................................................................... 31
3.4 Addressing ........................................................................................................................................ 33
3.4.1 Address Specification by Linear Addressing ............................................................................... 34
3.4.2 Address Specification by Bank Addressing ................................................................................. 35
3.5 Memory Location of Multi-byte Data ................................................................................................. 37
3.6 Registers ........................................................................................................................................... 39
3.7 Dedicated Registers ......................................................................................................................... 40
3.7.1 Accumulator (A) ........................................................................................................................... 42
3.7.2 Stack Pointers (USP, SSP) ......................................................................................................... 45
3.7.3 Processor Status (PS) ................................................................................................................. 47
3.7.4 Condition Code Register (PS: CCR) .......................................................................................... 48
3.7.5 Register Bank Pointer (PS: RP) .................................................................................................. 50
3.7.6 Interrupt Level Mask Register (PS: ILM) ..................................................................................... 51
3.7.7 Program Counter (PC) ................................................................................................................. 52
3.7.8 Direct Page Register (DPR) ........................................................................................................ 53
3.7.9 Bank Registers (PCB, DTB, USB, SSB, ADB) ............................................................................ 54
3.8 General-purpose Registers ............................................................................................................... 55
3.9 Prefix Codes ..................................................................................................................................... 57
3.9.1 Bank Select Prefix (PCB, DTB, ADB, SPB) ................................................................................. 58
3.9.2 Common Register Bank Prefix (CMR) ......................................................................................... 60
3.9.3 Flag Change Suppression Prefix (NCC) ...................................................................................... 61
3.9.4 Restrictions on Prefix Codes ....................................................................................................... 62
CHAPTER 4 RESET ........................................................................................................ 65
4.1 Reset ................................................................................................................................................ 66
4.2 Reset Causes and Oscillation Stabilization Wait Intervals ............................................................... 68
4.3 External Reset Pin ............................................................................................................................ 69
4.4 Reset Operation ................................................................................................................................ 71