HP Deskpro EX Use and care manual

Technical Reference Guide
For the
Compaq Deskpro EX/EXS Series of Personal Computers
Covering Models Featuring
Intel Celeron and Pentium III Processors
And the
Intel 815 Chipset

This document is designed to allow printing as an 8 ½ x 11-inch hardcopy that will fit into a standard 3-ring
binder. Provided below is a title block that can be copied and/or cut out and placed into a slip or taped onto
the edge of the binder.
Deskpro EX Series Personal Computers
Featuring Intel Celeron and Pentium III Processors
and the Intel 815 Chipset TRG

Reader Feedback
Please feel free to send any questions, suggestions, corrections, or comments regarding this
document please to the following email address:
[e-mail]
When responding, please state the title and edition of the referenced document.

Technical Reference Guide
Compaq Deskpro EX Series of Personal Computers
First Edition - August 2000
i
NOTICE
The information in this document is subject to change without notice.
COMPAQ COMPUTER CORPORATION SHALL NOT BE LIABLE FOR TECHNICAL OR
EDITORIAL ERRORS OR OMISSIONS HEREIN; NOR FOR INCIDENTAL OR
CONSEQUENTIAL DAMAGES RESULTING FROM THE FURNISHING, PERFORMANCE,
OR USE OF THIS MATERIAL. IT IS THE RESPONSIBILITY OF MANUFACTURERS TO
ENSURE THAT DEVICES DESIGNED TO BE USED WITH COMPAQ PRODUCTS
COMPLY WITH FCC CLASS B EMISSIONS REQUIREMENTS.
This guide contains information protected by copyright. Except for use in connection with the
described Compaq product, no part of this document may be photocopied or reproduced in any
form without prior written consent from Compaq Computer Corporation.
2000 Compaq Computer Corporation
All rights reserved. Published in the USA
Compaq, Deskpro, LTE, Contura, Presario, ProLinea
Registered U.S. Patent and Trademark Office
Product names mentioned in this document may be trademarks and/or registered trademarks of other companies.
“Celeron,” “Pentium” and “MMX” are registered trademarks of Intel Corporation.
“Microsoft,” “MS-DOS,” “Windows,” and “Windows NT” are registered trademarks of Microsoft Corporation.
For more information regarding specifications and Compaq-specific parts please contact Compaq
Computer Corporation.
Technical Reference Guide
for
Compaq Deskpro EX Series Personal Computers
First Edition - August 2000
Document Number 137H-0800A-WWEN

Technical Reference Guide
Compaq Deskpro EX Series of Personal Computers
First Edition –- August 2000
ii

Technical Reference Guide
Compaq Deskpro EX Series of Personal Computers
First Edition - August 2000
i
ii
TABLE OF CONTENTS
CHAPTER 1 INTRODUCTION..................................................................................................................
1.1 ABOUT THIS GUIDE ................................................................................................................1-1
1.1.1 USING THIS GUIDE..........................................................................................................1-1
1.1.2 ADDITIONAL INFORMATION SOURCES .....................................................................1-1
1.2 MODEL NUMBERING CONVENTION ...................................................................................1-1
1.3 NOTATIONAL CONVENTIONS ..............................................................................................1-2
1.3.1 VALUES..............................................................................................................................1-2
1.3.2 RANGES..............................................................................................................................1-2
1.3.3 SIGNAL LABELS...............................................................................................................1-2
1.3.4 REGISTER NOTATION AND USAGE.............................................................................1-2
1.3.5 BIT NOTATION .................................................................................................................1-2
1.4 COMMON ACRONYMS AND ABBREVIATIONS .................................................................1-3
CHAPTER 2 SYSTEM OVERVIEW..........................................................................................................
2.1 INTRODUCTION .......................................................................................................................2-1
2.2 FEATURES AND OPTIONS......................................................................................................2-2
2.2.1 STANDARD FEATURES...................................................................................................2-2
2.2.2 OPTIONS.............................................................................................................................2-3
2.3 MECHANICAL DESIGN............................................................................................................2-4
2.3.1 CABINET LAYOUTS.........................................................................................................2-5
2.3.2 CHASSIS LAYOUTS..........................................................................................................2-7
2.3.3 BOARD LAYOUT ..............................................................................................................2-9
2.4 SYSTEM ARCHITECTURE.....................................................................................................2-10
2.4.1 PROCESSORS...................................................................................................................2-12
2.4.2 CHIPSET ...........................................................................................................................2-14
2.4.3 SUPPORT COMPONENTS..............................................................................................2-14
2.4.4 SYSTEM MEMORY.........................................................................................................2-15
2.4.5 MASS STORAGE .............................................................................................................2-15
2.4.6 SERIAL AND PARALLEL INTERFACES......................................................................2-15
2.4.7 UNIVERSAL SERIAL BUS INTERFACE.......................................................................2-15
2.4.8 GRAPHICS SUBSYSTEM ...............................................................................................2-16
2.4.9 AUDIO SUBSYSTEM ......................................................................................................2-17
2.5 SPECIFICATIONS....................................................................................................................2-17
CHAPTER 3 PROCESSOR/MEMORY SUBSYSTEM.............................................................................
3.1 INTRODUCTION .......................................................................................................................3-1
3.2 PROCESSOR...............................................................................................................................3-2
3.2.1 CELERON PROCESSOR....................................................................................................3-2
3.2.2 PENTIUM III PROCESSOR...............................................................................................3-3
3.2.3 PROCESSOR UPGRADING ..............................................................................................3-4
3.3 MEMORY SUBSYSTEM...........................................................................................................3-5
3.4 SUBSYSTEM CONFIGURATION ............................................................................................3-8

Technical Reference Guide
Compaq Deskpro EX Series of Personal Computers
First Edition –- August 2000
iv
CHAPTER 4 SYSTEM SUPPORT..............................................................................................................
4.1 INTRODUCTION .......................................................................................................................4-1
4.2 PCI BUS OVERVIEW ................................................................................................................4-2
4.2.1 PCI BUS TRANSACTIONS ...............................................................................................4-3
4.2.2 PCI BUS MASTER ARBITRATION..................................................................................4-6
4.2.3 OPTION ROM MAPPING..................................................................................................4-7
4.2.4 PCI INTERRUPTS..............................................................................................................4-7
4.2.5 PCI POWER MANAGEMENT SUPPORT ........................................................................4-7
4.2.6 PCI SUB-BUSSES...............................................................................................................4-7
4.2.7 PCI CONFIGURATION......................................................................................................4-8
4.2.8 PCI CONNECTOR..............................................................................................................4-9
4.3 AGP BUS OVERVIEW.............................................................................................................4-10
4.3.1 BUS TRANSACTIONS.....................................................................................................4-10
4.3.2 AGP CONFIGURATION..................................................................................................4-13
4.3.3 AGP CONNECTOR ..........................................................................................................4-14
4.4 SYSTEM RESOURCES............................................................................................................4-15
4.4.1 INTERRUPTS ...................................................................................................................4-15
4.4.2 DIRECT MEMORY ACCESS ..........................................................................................4-19
4.5 SYSTEM CLOCK DISTRIBUTION ........................................................................................4-22
4.6 REAL-TIME CLOCK AND CONFIGURATION MEMORY..................................................4-23
4.6.1 CLEARING CMOS ...........................................................................................................4-23
4.6.2 CMOS ARCHIVE AND RESTORE..................................................................................4-24
4.6.3 STANDARD CMOS LOCATIONS ..................................................................................4-24
4.7 SYSTEM MANAGEMENT......................................................................................................4-33
4.7.1 SECURITY FUNCTIONS.................................................................................................4-33
4.7.2 POWER MANAGEMENT................................................................................................4-35
4.7.3 SYSTEM STATUS............................................................................................................4-35
4.7.4 TEMPERATURE SENSING.............................................................................................4-36
4.8 SYSTEM COOLING.................................................................................................................4-37
4.9 REGISTER MAP AND MISCELLANEOUS FUNCTIONS....................................................4-38
4.9.1 SYSTEM I/O MAP............................................................................................................4-38
4.9.2 82801 ICH GENERAL PURPOSE FUNCTIONS.............................................................4-39
4.9.3 LPC47B357 I/O CONTROLLER FUNCTIONS...............................................................4-40
CHAPTER 5 INPUT/OUTPUT INTERFACES..........................................................................................
5.1 INTRODUCTION .......................................................................................................................5-1
5.2 ENHANCED IDE INTERFACE.................................................................................................5-1
5.2.1 IDE PROGRAMMING........................................................................................................5-1
5.2.2 IDE CONNECTOR..............................................................................................................5-3
5.3 DISKETTE DRIVE INTERFACE ..............................................................................................5-4
5.3.1 DISKETTE DRIVE PROGRAMMING..............................................................................5-5
5.3.2 DISKETTE DRIVE CONNECTOR....................................................................................5-7
5.4 SERIAL INTERFACE.................................................................................................................5-8
5.4.1 RS-232 INTERFACE...........................................................................................................5-8
5.4.2 SERIAL INTERFACE PROGRAMMING..........................................................................5-9