HP Vectra VE4 User manual

Vectra 4E/xx Technical Reference 1 System Overview •• 1
HP Vectra VE 4/xx Series PC Technical Reference
Manual Hardware and BIOS
Printed Manual Information
Trademarks
Preface
1 System Overview
High-Level System Architecture
System Board
System Board Diagram
Backplane Diagram
DX2/DX4 Type Processors
WB/WT Type Processors
Write-Through Mode
Write-Back Mode
Main Processor Chipset
I/O Chip
Video Graphics Accelerator Chip
System Physical Characteristics
Electrical Specifications
Power Consumption
Operating Environment
2 Summary of HP System BIOS
I/O Addresses
I/O Port Mapping
Memory Mapping
System Board Component Addressing
3 Integrated Ultra VGA Controller
Main Video Features
Video Memory
Video Resolutions
VESA Connector
4 System Hardware Tests
Shadow RAM Features
POST Features
POST Errors
POST Tests

Vectra 4E/xx Technical Reference 1 System Overview •• 2
Printed Manual Information
© 1995 Hewlett-Packard Company

Vectra 4E/xx Technical Reference 1 System Overview •• 3
Trademarks
Microsoft®, MS-DOS® and Windows NT® are U.S. registered
trademarks of Microsoft Corporation.
Logitech® is a registered trademark of Logitech Corp.
AutoCAD® is a U.S. registered trademark of Autodesk Inc.
PC-AT® is a registered trademark of IBM.
Super I/O® is a trademark of National Semiconductor Corp.

Vectra 4E/xx Technical Reference 1 System Overview •• 4
Preface
This document provides a useful source of technical information about the HP Vectra VE
4/xx Series PCs. It has been written for those engineers and technicians who are required to
provide system level support. The reader is assumed to have a detailed understanding of
PC-AT compatible microprocessor functions and digital addressing techniques.
Please note that this document does not include detailed descriptions of BIOS functionality.
Additional information may be obtained from other sources such as the component
manufacturer's reference documentation.
Bibliography
For additional information, please refer to the following documents:
•HP Vectra VE 4/xx Series PC Users Guide (supplied with the PC).
•HP Vectra VE 4/xx Series PC Familiarization Guide (D35XX+49A+90001).
•HP Vectra PC Service Handbook - 8th edition (5963-6104).
•PC87303VUL Super I/O Sidewinder Lite National Semiconductor Corporation.
•SiS 85C496/497 Chipset Silicon Integrated Systems Corporation.
•Trio64 Graphics Accelerator S3 Incorporated

Vectra 4E/xx Technical Reference 1 System Overview •• 5
1 System Overview

Vectra 4E/xx Technical Reference 1 System Overview •• 6
High-Level System Architecture
The HP Vectra VE 4/xx Series PCs incorporate the Silicon Integrated Systems (SiS)
85C496/85C497© chipset and have the following high-level architecture:

Vectra 4E/xx Technical Reference 1 System Overview •• 7
System Board
The system board has the following main features:
•486 processor (50, 66 or 100 MHz)
•Enhanced IDE (Integrated Drive Electronics) supporting four fast IDE drives
•high performance PCI bus
•fast 64-bit graphics processor
•video memory of 1 MB, upgradable to 2 MB
•BIOS stored in Flash ROM (for easy upgradeability)
•BIOS support for Plug and Play
•preloaded Desktop Management Interface (DM I) software, DOS and Windows software
•Energy Star compliant power management
•main memory of 4 MB or 8 MB, upgradable to 64 MB
•256 KB cache upgrade option
•four device shelves:
◊◊ two with front access for one 3.5-inch device and one 5.25-inch device
◊◊ two internal, for hard disk drives
•four free slots for accessory boards, allowing the installation of:
◊◊ two ISA boards and two PCI boards or
◊◊ three ISA boards and one PCI board
•one parallel and two serial communications ports
For additional information, see “System Physical Characteristics”.

Vectra 4E/xx Technical Reference 1 System Overview •• 8
System Board Diagram

Vectra 4E/xx Technical Reference 1 System Overview •• 9
Backplane Diagram
The backplane provides the following connectors and slots:
•one PCI connector
•one PCI/ISA combination connector
•one ISA connector
•three full-length slots
•one half-length slot
Jumpers must be correctly set for the DX2 or DX4 type processor and for WB (Write-Back)
or WT (Write-Through) line useage.

Vectra 4E/xx Technical Reference 1 System Overview •• 10
DX2/DX4 Type Processors
The CLKMUL pin is controlled by jumper JP16 which is defaulted to x3 mode (DX4). As the
DX2 and DX4 are the same component running at a different clock speed, the jumper
cannot be left in the DX4 position otherwise the DX2 will also run in x3 clock mode.
The trace on the non-component side of the board which connects pin numbers 2 and 3 of
JP16 must be cut. Pin 1 of JP16 can be identified by the square solder pad. JP16 must then
be added to the board. The 1-2 connection is the DX2 position and the 2-3 connection is the
DX4 position.

Vectra 4E/xx Technical Reference 1 System Overview •• 11
WB/WT Type Processors
The non-WB processors do not look at the WB/WT line but all enhanced ones do (they are
all WB type processors). Jumper JP10 is populated on the board. This results in the WB/WT
line continually being pulled, so the processor cannot be run in WT mode.
To allow WT mode for testing purposes, JP10 can be populated, then JP10 would be
changed along with JP8 to select WB or WT modes.

Vectra 4E/xx Technical Reference 1 System Overview •• 12
Write-Through Mode
Use JP10 1-2 and JP8 2-3.

Vectra 4E/xx Technical Reference 1 System Overview •• 13
Write-Back Mode
Use JP10 2-3, JP8 1-2.

Vectra 4E/xx Technical Reference 1 System Overview •• 14
Main Processor Chipset
The main processor chipset is a SiS 85C496/497©. This incorporates two chips:
•PCM chip (PCI/CPU memory controller)
•ATM chip (AT bus controller and megacell)
PCM Chip
The PCM chip provides four basic functions. These are host interface, cache control, DRAM
control and FS link interface. The PCM chip also has the following features:
•Host bus supporting wide range of CPUs
•VESA bus slave
•PCI local bus
•Supports L1 cache write-back CPU systems
•L2 cache controller
•DRAM controller
•Built-in IDE controller
•Fast-slow link interface
•208-pin PQFP
•Low power CMOS technology
Host Interface Operations
The host interface provides an interface among the bus masters (CPU, PCI master and ISA
master), the main memory (L2 cache and DRAM), and the I/O devices (VL-slave, PCI target
and ISA slave).
Cache Operations
The PCM provides control for a cache built with standard SRAMS.
DRAM Memory Operations
The PCM contains a DRAM controller for access to main memory.
FS Link Operations
The chip implements two link machines, a fast master machine and a slow target machine.
CPU I/O Address Map
I/O devices other than the PCM are not permitted on the host bus.
L2 Cache Implementation
The PCM provides cache data and tag control signals for a two banks, interleaved cache
which is implemented using standard asynchronous SRAMs.
ATM Chip

Vectra 4E/xx Technical Reference 1 System Overview •• 15
The ATM chip has the following features:
•Fast-slow link interface
•100% ISA compatibility
•Integrated 8-bit BIOS timer
•De-turbo function switch
•Arbitration for ISA devices
•Utility bus (X-bus) peripheral support
•Integration of two 82C37A DMA controll ers
•Integration of one 82C54 timer
•Integration of two 82C59 interrupt controllers
•Non-maskable interrupts (NMI)
•Support for SMM and PMU features
•CPU to PC/AT and PS/2 keyboard controller (port 92h) emulation of A20M and RC
commands
•Reset and clock circuits
•160-pin PQFP
•0.6µm low power CMOS technology
FS Link Bus Interface
The FS link bus interface provides the interface between the fast machine and the slow
machine.
ISA Decode
The ATM chip contains an address decoder for decoding ISA master and DMA initiated
cycles.
ISA Bus Interface
The ATM chip incorporates a fully ISA-bus compatible master and slave interface.
DMA Control
The DMA controller incorporates the functionality of two 82C37 DMA controllers with seven
independently programmable channels.
Timer Block
The timer block contains three counters that are equivalent in function to those found in one
82C54 programmable internal timer.
Utility Bus (X-Bus) Logic
The ATM provides chip selects logic for flash BIOS, real-time clock and keyboard/mouse
controller.
Interrupt Controller Block

Vectra 4E/xx Technical Reference 1 System Overview •• 16
The ATM provides an ISA compatible interrupt controller that incorporates the functionality of
two 82C59 interrupt controllers.
Power Management
The ATM ensures that power management meets the requirements of the EPA
(Environmental Protection Agency) Energy Star program.
Address Decoding
The ATM contains two decoders—one to decode PCI/CPU master cycles and DMA/ISA
master cycles, the other to handle the cycles with which the DMA/ISA master accesses the
PCI or onboard memory.
ATM I/O Addresses
These addresses are the internal non-configurable ATM register locations.
BIOS Memory Space
The 128 KB memory space is located at 000E0000h to 000FFFFFh (top of 1 MB).
Data Integrity
The processor uses functional redundancy checking to provide maximum error detection of
the processor and its interface. When functional redundancy checking is used, a second
processor (the checker) operates in lock step with the master’s outputs and compares them
with the values it computes internally. An error signal is produced if a mismatch is detected.

Vectra 4E/xx Technical Reference 1 System Overview •• 17
I/O Chip
The basic input/output control functions are provided by a National Semiconductor
PC87303VUL Super I/O© chip. This combines a flexible disk controller, keyboard controller,
real-time clock, dual UARTs, IEEE1284 parallel port and IDE interface. It also has the
following features:
Function Features
Flexible disk controller Software compatible with DP8477, 765A and N82077
16-byte FIFO
Burst and non-burst modes
Perpendicular recording drive support
High-performance internal analog data separator (no external
filter components required
Low power CMOS with power-down mode
Automatic media sense support
Full TDR support for AT and PS/2 drives
Keyboard controller 8042AH and PC87911 software compatible
8-bit microcomputer
2 KB custom ROM and 256 byte data RAM
Dedicated open drain outputs
Asynchronous access to two data and one status register
during normal operation
Supports interrupt and polling
Supports DMA handshake
93 instructions
18 programmable I/O pins
4 dedicated open drain outputs
8-bit timer/counter
Binary and BCD arithmetic
Expandable I/O

Vectra 4E/xx Technical Reference 1 System Overview •• 18
Real-time clock DS1287, MC146818 and PC87911 compatible
242-byte battery backed-up CMOS RAM in two banks
Selective lock mechanism locks any half of RTC RAM
Calendar in days, days of week, months, years with
automatic leap-year adjustment
Time of Day in seconds, minutes, hours
12 or 24 hour format
Optional daylight saving adjustment
BCD or binary format for time keeping
Three individually maskable interrupt event flags
Periodic rates from 122 µs to 500 ms
Time of day alarm once per second to once per day
Separate battery pin, 2.4V operation
2 µA power consumption
Double-buffer time registers
UARTs Software compatible with PC16550A and NS16450
IEEE 1284 parallel
port EPPP IEEE1284, Extended Capabilities Ports ECP 1.7 (DMA1) and ECP 1.9 (DMA3)
IDE control logic Provides a complete IDE interface with DMA control,
including Type F DMA (except for optional buffers)
Programmable Chip
Selects 2 pins for 2 separate programmable chip select decoders can be programmed for game port control
Address decoder Provides selection of all primary and secondary ISA
addresses including COM 1-4
General Low power CMOS technology
Ability to shut off all clocks to all modules
PC87303VUL is drop-in replacement for PC87323VUL
Reduced pin leakage current
Special configuration register for power-down
Disable bit for RTC
160-pin PQFP package

Vectra 4E/xx Technical Reference 1 System Overview •• 19
Video Graphics Accelerator Chip
The video graphics accelerator is an S3 Incorporated Trio64© chip which combines a 24-bit
RAMDAC, dual programmable clock generators and a high-performance accelerator core in
a single device.
The chip also has the following features:
Advanced Architecture
•64-bit graphics engine
•1 MB of Fast-Page Mode DRAMs (upgradeable to 2 MB)
•24-bit on-chip RAMDAC
•135 Mhz output pixel data rate
•Hardware full acceleration of graphics functions (BitBLT, 2-point line draws, polygon fills,
clipping)
Multimedia Support
•VESA feature connector
Green PC
•Hardware and BIOS support for VESA display power management signalling (DPMS)
Display ‘Plug and Play’ Support
•Hardware and BIOS support for DDC 1 monitor communications
Wide Range of Video Resolutions
For additional information, see “Video Resolutions”.
Full Software Support
Drivers for all major operating systems including:
•Windows 3.11
•Windows NT 3.5
•Windows 95
•OS/2 Warp 3.0
•OS/2 2.11
For additional information on video resolutions and operating modes, see Chapter 3,
“Integrated Ultra VGA Controller”.

Vectra 4E/xx Technical Reference 1 System Overview •• 20
System Physical Characteristics
Feature Description
Processor (standard) 486 type, 50, 66, or 100 MHz dependent on model
Level-one cache (write-back) 8 KB on DX2 models, 16 KB on DX4 models
Level-two cache 256 KB (optional)
Main memory (size/speed) Upgradeable to 64 MB (70 ns)
Video Integrated 64-bit Ultra VGA Controller on PCI bus
1 MB standard memory, upgradeable to 2 MB
Disk drive controller Enhanced IDE controller on PCI bus, supporting up to
4 devices
Rear connectors • mini-DIN mouse
• mini-DIN keyboard
• 25-pin parallel
• 9-pin serial (two, buffered)
• 15-pin VGA
25-pin parallel connector • Modes: Centronics, bidirectional, EPP IEEE 1284,
ECP DMA 1, ECP DMA 3
• Parallel ports: option 1 (378h, IRQ 5), option 2
(278h, IRQ 7), option 3 (3BCh, IRQ 7),or Off
9-pin serial connectors • Standard: Two UART 16550 buffered serial ports
(both RS-232-C)
• Serial port:
• Serial Port A: 3F8h (IRQ 4), 3E8h (IRQ 4), or Off
• Serial Port B: 2F8h (IRQ 3), 2E8h (IRQ 3), or Off
System board connectors • VESA internal video pass-through connector
• One flexible disk drive connector (allows 2 drives)
• Two enhanced IDE connectors (allows 2 IDE hard
disk drives and 1 CD-ROM)
Accessory slots Two for 16-bit ISA boards (one full-length)
One for PCI board
One combination slot for PCI or ISA board
Disk drive shelves Four mass storage shelves supporting:
• two front-access devices (one for one-third height
3.5-inch device, one for a one-half height 5.25-inch
device or CD-ROM)
• two internal 3.5-inch hard disk drives (one-third
height)
Mouse Logitech™-compatible mouse with mini-DIN connector
Characteristics
Weight (excluding keyboard
and display) 10 kilograms (22 pounds)