Icom IC-M87 User manual

GUIDE FOR CD
1) COMPOSION
1
IC-M87_ATEX M87_ATEX.pdf
FYC A3format.pdf
A4format.pdf
Instruction.pdf
Installer ar505eng.exe
README.txt
2) DESCRIPTION
A3format.pdf
Consists of A3 format pages (Board layouts, Mechanical parts and disassembly, and etc.). This file is used for printing out A3
format pages.
M87_ATEX.pdf
The service manual for IC-M87 (ATEX version) including all service information in this CD. This file is mainly used for viewing on
the computer display and checking page order to make printed service manual. Or when you want to find a component, you can
find very fast using “FIND” function (except Board Layouts).
A4format.pdf
Consists of A4 format pages (Circuit description, Adjustment procedures, Parts list, and etc.). This file is used for printing out A4
format pages.
Instruction.pdf
The instruction manual for IC-M87 (ATEX version). The contents of this file is exactly same as supplied instruction manual with
product and consists of all A4 format pages. If you have A4 format printer, you can print and make brand new instruction manual
any time you want. This file is also very helpful when you want to change or set product setting condition for adjustment or else.

2
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iC-m87


TABLE OF CONTENTS
SECTION 1 SPECIFICATIONS
SECTION 2 INSIDE VIEWS
SECTION 3 DISASSEMBLY INSTRUCTIONS
SECTION 4 CIRCUIT DESCRIPTION
4 - 1 RECEIVER CIRCUITS ................................................................................................... 4 - 1
4 - 2 TRANSMITTER CIRCUITS ............................................................................................ 4 - 2
4 - 3 PLL CIRCUITS ................................................................................................................ 4 - 3
4 - 4 POWER SUPPLY CIRCUITS ......................................................................................... 4 - 4
4 - 5 CPU PORT ALLOCATIONS ........................................................................................... 4 - 4
SECTION 5 ADJUSTMENT PROCEDURES
5 - 1 PREPARATION ................................................................................................................ 5 - 1
5 - 3 SOFTWARE ADJUSTMENT .......................................................................................... 5 - 4
SECTION 6 PARTS LIST
SECTION 7 MECHANICAL PARTS AND DISASSEMBLY
SECTION 8 SEMI-CONDUCTOR INFORMATION
SECTION 9 BOARD LAYOUTS
9 - 1 MAIN UNIT ...................................................................................................................... 9 - 1
9 - 2 LOGIC UNIT .................................................................................................................... 9 - 3
9 - 3 CHARGER UNIT ............................................................................................................. 9 - 5
9 - 4 VR UNIT .......................................................................................................................... 9 - 5
9 - 5 CONNECTOR UNIT ........................................................................................................ 9 - 5
SECTION 10 BLOCK DIAGRAM
SECTION 11 VOLTAGE DIAGRAM

1 - 1
MGENERAL
• Frequency coverage : TX: 156.000–161.450 MHz, RX: 156.000–163.425 MHz [MARINE]
TX/RX: 146.000–174.000 MHz [PMR]
• Number of free channels : 22 channels
• Type of emission : 16K0G3E (Wide; 25 kHz) [MARINE] for ATIS
16K0F3E (Wide; 25 kHz), 8K50F3E (Narrow; 12.5 kHz) [PMR]*1
14K0F3E (Wide; 20 kHz), 8K50F3E (Narrow; 12.5 kHz) [PMR]*2
• Antenna connector : SMA / 50 Ω
• Power supply requirement : BP-227AX (7.2 V DC, negative ground)
• Current drain (approx.) : Transmit at High (1.0 W) 0.7 A
at Low (0.5 W) 0.6 A
Receive at maximum audio 200 mA
• Frequency stability : ±1.5 kHz
• Usable temperature range : –15˚C to +55˚C [MARINE]; –25˚C to +55˚C [PMR]
• Dimensions (projections not included) : 62(W) × 97(H) × 39(D) mm
• Weight (with antenna, BP-227AX) : 280 g (approx.)
MTRANSMITTER
• RF output power (with BP-227AX) : 1 W [PMR]
1 W / 0.5 W (High / Low) [MARINE]
• Modulation system : Variable reactance frequency modulation
• Maximum frequency deviation : ±5.0 kHz (Wide; 25 kHz) [MARINE]
±5.0 kHz (Wide; 25 kHz), ±2.5 kHz (Narrow; 12.5 kHz) [PMR]*1
±4.0 kHz (Wide; 20 kHz), ±2.5 kHz (Narrow; 12.5 kHz) [PMR]*2
• Spurious emissions : 0.25 µW < 2 GHz, 1.0 µW > 2 GHz
• Adjacent channel power : 70 dB [MARINE], 70 dB (Wide) / 60 dB (Narrow) [PMR]
• Residual modulation : 40 dB [MARINE], 40 dB (Wide) / 34 dB (Narrow) [PMR]
• Audio harmonic distortion : 10% at 60% deviation
• Audio frequency response : +1 dB to –3 dB of 6 dB octave from 300 Hz to 3000 Hz [MARINE] only
• Limiting charact modulation : 60–100% of maximum deviation
• Ext. microphone connector : 9-pin multi connector/2 kΩ
MRECEIVER
• Receive system : Double conversion superheterodyne system
• Intermediate frequencies : 1st 31.05 MHz
2nd 450 kHz
• Sensitivity : –2 dBµ [MARINE] (–4 dBµ [PMR]) emf typical at 20 dB SINAD
• Squelch sensitivity : +0 dBµ emf typical
• Adjacent channel selectivity : 70 dB [MARINE], 70 dB (Wide) / 60 dB (Narrow) [PMR]
• Spurious response rejection : 70 dB
• Intermodulation rejection ratio : 68 dB [MARINE], 65 dB [PMR]
• Hum and noise : 40 dB [MARINE], 40 dB (Wide) / 34 dB (Narrow) [PMR]
• Audio output power : 200 mW [MARINE] (350 mW [PMR]) at 10% distortion with an 8 Ωload
• Audio frequency response : +1 dB to –3 dB of –6 dB octave from 300 Hz to 3000 Hz [MARINE] only
• Ext. speaker connector : 9-pin multi connector/8 Ω
Specifications are measured in accordance with EN301-178-2/EN300-086.
All stated specifications are subject to change without notice or obligation.
SECTION 1 SPECIFICATIONS
NOTE: *1[EUR], [UK] only, *2[FRG] only

1 - 2
M VHF MARINE CHANNEL LIST
Channel No. Frequency (MHz) Channel No. Frequency (MHz) Channel No. Frequency (MHz)
USA INT Transmit Receive USA INT Transmit Receive USA INT Transmit Receive
01 156.050 160.650 22 157.100 161.700 74 74 156.725 156.725
01A 156.050 156.050 22A 157.100 157.100 75 156.775 156.775
02 156.100 160.700 23 157.150 161.750 76 156.825 156.825
03 156.150 160.750 23A 157.150 157.150 77 77 156.875 156.875
03A 156.150 156.150 24 24 157.200 161.800 78 156.925 161.525
04 156.200 160800 25 25 157.250 161.850 78A 156.925 156.925
05 156.250 160.850 26 26 157.300 161.900 79 156.975 161.575
05A 156.250 156.250 27 27 157.350 161.950 79A 156.975 156.975
06 06 156.300 156.300 28 28 157.400 162.000 80 157.025 161.625
07 156.350 160.950 37A*237A*2157.850 157.850 80A 157.025 157.025
07A 156.350 156.350 60 156.025 160.625 81 157.075 161.675
08 08 156.400 156.400 61 156.075 160.675 81A 157.075 157.075
09 09 156.450 156.450 61A 156.075 156.075 82 157.125 161.725
10 10 156.500 156.500 62 156.125 160.725 82A 157.125 157.125
11 11 156.550 156.550 63 156.175 160.775 83 157.175 161.775
12 12 156.600 156.600 63A 156.175 156.175 83A 157.175 157.175
13 13 156.650 156.650 64 156.225 160.825 84 84 157.225 161.825
14 14 156.700 156.700 64A 156.225 156.225 84A 157.225 157.225
15 15 156.750 156.750 65 157.275 160.875 85 85 157.275 161.875
16 16 156.800 156.800 65A 157.275 156.275 85A 157.275 157.275
17 17 156.850 156.850 66 156.325 160.925 86 86 157.325 161.925
18 156.900 161.500 66A 156.325 156.325 86A 157.325 157.325
18A 156.900 156.900 67 67 156.375 156.375 87 157.375 161.975
19 156.950 161.550 68 68 156.425 156.425 87A 87 157.375 157.375
19A 156.950 156.950 69 69 156.475 156.475 88 157.425 162.025
20 20 157.000 161.600 70*170*1156.525 156.525 88A 88 157.425 157.425
20A 157.000 157.000 71 71 156.575 156.575 P4*2P4*2161.425 161.425
21 157.050 161.650 72 72 156.625 156.625
21A 157.050 157.050 73 73 156.675 156.675
*1Receive only
*2UK Marine Channels: M1=37A (157.850 MHz), M2=P4 (161.425 MHz) for [UK] only.
NOTE: USA channels for [UK] only.

2 - 1
AF mute circuit
Q441* : 2SC4116
Q442* : CPH3403
Q443 : CPH3403
Q444 : DTC144EU
EEPROM
(IC591*: HN58X2416TI)
IN/EXT microphone switch
(Q461, Q462: UN911H)
Microphone amplifier
(IC471: NJM2904V)
AF mute
(IC481: TC4W66FU)
S5V regulator
(Q561: 2SA1588)
M5V regulator
Q551: 2SB1132
Q552: XP6501
Q553: DTC144EU
CPU
(IC661: µPC780316GC-511-9EB)
SECTION 2 INSIDE VIEWS
• LOGIC UNIT
Bottom view
*: Located under side of this point.
• MAIN UNIT
Top view Bottom view
1st Mixer
(Q191: 3SK299)
VCO circuit
RF amplifier
(Q165: 3SK294)
Power amplifier
(Q111: RD07MVS1)
Antenna switching circuit
D131, D151: 1SV307
D152: MA77
AF mute
(IC281: TC4W66FU)
T5V regulator
(Q323: 2SA1588)
R5V regulator
(Q322: 2SA1588)
V5V regulator
(Q321: 2SA1588)
Pre-drive amplifier
(Q101: RD01MUS1)

3 - 1
SECTION 3 DISASSEMBLY INSTRUCTIONS
1. Removing the chassis panel
q Remove a nut A.
w Unscrew 2 screws B (2 × 8 mm, black) and 3 screws C
(2 × 4 mm, black) from the chassis.
e Take off the chassis in the direction of the arrow.
NOTE: * Tighten the screws in order of a number (q–y)
when assembling.
2. Removing the LOGIC unit.
q Unplug the cable from J281 on the MAIN unit to separate
the LOGIC unit
w Separate the front panel from the chassis in the direction
of the arrow.
e Unsolder the leads of speaker (11 points) and connector
unit (9 points).
r Unscrew 3 screws D (2 × 4 mm, silver) to separate the
front panel.
NOTE: * Tighten the screws in order of a number (z–c)
when assembling.
3. Removing the MAIN unit
q Unsolder the leads of contact spring (3 points) and
antenna connector (1 point).
w Unscrew 6 screws E (2 × 4 mm, silver) to separate the
chassis.
NOTE: * Tighten the screws in order of a number (q–y)
when assembling.
C
C
A
C
B
q
w
e
r
t
y
q
r
tw
e y
z
x
c
D
D
E
E

4 - 1
SECTION 4 CIRCUIT DESCRIPTION
"NOISV" signal to CPU (LOGIC unit; IC661)
FI231
2nd IF filter 450 kHz
Noise
detector
Limiter
amp.
Quadrature
detector
Active
filter
AF signals
5V
X231
IC251
Mixer
1st IF from IF amplifier (Q211)
8
2
1
753
1614
12
11109
IC231
TA31136FN
Noise
amp.
FI232
RSSI
"RSSIV" signal to CPU (LOGIC unit; IC661)
PLL IC
IC1
X1
15.3 MHz
Q221
30.6 MHz
2
221
• 2ND IF AND DEMODULATOR CIRCUITS
4-1 RECEIVER CIRCUITS
4-1-1 ANTENNA SWITCHING CIRCUIT (MAIN UNIT)
The antenna switching circuit functions as a low-pass filter
while receiving and a resonator circuit while transmitting. This
circuit does not allow transmit signals to enter the receiver
circuits.
Received signals enter the antenna connector (CHASSIS;
J1) and pass through the low-pass filter (L131, L132, C132
–C136). The filtered signals are passed through the 1⁄4type
antenna switching circuit (D151, D152) and then applied to
the RF circuit.
While receiving, no voltage is applied to the D151, D152.
Thus, the receive line and the ground are disconnected and
L151, L152, C152, C153 function as low-pass filter which
leads received signals to the RF circuit.
4-1-2 RF CIRCUIT (MAIN UNIT)
The RF circuit amplifies signals within the range of frequency
coverage and filters out-of-band signals.
The signals from the antenna switching circuit pass through
the two-stage tunable bandpass filters (D154, D155, L154,
L155). The filtered signals are amplified at the RF amplifier
(Q165) and then passed through another two-stage tunable
bandpass filters (D181, D182, L181) to suppress unwanted
signals.
The filtered signals are applied to the 1st mixer circuit.
The tunable bandpass filters (D154, D155, D181, D182)
employ varactor diodes to tune the center frequency of the
RF passband for wide bandwidth receiving and good image
response rejection. These diodes are controlled by the CPU
(LOGIC unit; IC661) via the D/A converter (IC251, pins 14,
15, 22, 23).
4-1-3 1ST MIXER AND 1ST IF CIRCUITS (MAIN UNIT)
The 1st mixer circuit converts the received signal into the
fixed frequency of the 1st IF signal with the PLL output fre-
quencies. By changing the PLL frequency, only the desired
frequency passes through a monolithic filter at the next stage
of the 1st mixer.
The filtered signals from the bandpass filter are applied to
the 1st mixer circuit (Q199). The applied signals are mixed
with the 1st LO signals coming from the RX VCO circuit (Q41)
to produce a 31.05 MHz 1st IF signal. The 1st IF signal is
passed through the monolithic filter (FI211) to suppress out-
of-band signals.
The filtered signal is amplified at the 1st IF amplifier (Q211)
and is then applied to the 2nd IF circuit.
4-1-4 2ND IF AND DEMODULATOR CIRCUITS
(MAIN UNIT)
The 2nd mixer circuit converts the 1st IF signal into the 2nd
IF signal. The double-conversion superheterodyne system
(which convert receive signals twice) improves the image re-
jection ratio and obtains stable receiver gain.
The amplified 1st IF signal from the 1st IF amplifier (Q211) is
applied to the 2nd mixer section of the FM IF IC (IC231, pin
16), and is mixed with the 2nd LO signal to be converted into
a 450 kHz 2nd IF signal.
The FM IF IC (IC231) contains the 2nd mixer, limiter ampli-
fier, quadrature detector, active filter and noise amplifier, etc.
The 2nd LO signal (30.6 MHz) is produced at the PLL circuit
by doubling it’s reference frequency (X1: 15.3 MHz) at dou-
bler circuit (Q221).

4 - 2
The 2nd IF signal from the 2nd mixer section (IC231, pin 3)
passes through the ceramic filter (Wide: FI231 only, Narrow:
both FI231 and FI232) to remove unwanted heterodyned fre-
quencies. The filtered signal is amplified at the limiter ampli-
fier section (IC231, pin 5) and then applied to the quadrature
detector section (IC231, pins 10, 11) to demodulate the 2nd
IF signal into AF signals.
The demodulated AF signals are output from pin 9 (IC231)
and then applied to the AF circuit.
4-1-5 AF AMPLIFIER CIRCUIT (LOGIC UNIT)
The AF signals (detected signals) passes through the
scrambler switch (MAIN unit; IC281, pins 1, 2) and fil-
ter switch (MAIN unit; IC282, pins 1, 7) and then passed
through the low-pass filter (MAIN unit; IC261, pins 6, 7).
The filtered signal is applied to the AF volume (VR unit;
R801) to adjust AF level and then amplified at the AF
power amplifier (IC421, pins 4, 10) via the AF mute switch
(Q411). The power amplified AF signals are applied to
the internal speaker (CHASSIS; SP1) after being passed
through the de-emphasis circuit (R411, C413) to obtain the
–6 dB/octave frequency characteristics.
4-1-6 SQUELCH CIRCUITS (MAIN UNIT)
The noise squelch circuit mutes AF signals when no RF sig-
nals are received. By detecting noise components in the AF
signals, the squelch circuit switches the AF amplifier control-
ler.
Some noise components in the AF signals from the FM IF
IC (IC231, pin 9) are applied to the D/A converter (IC251,
pins 1, 2) to adjust the squelch level. The adjusted signals
are applied to the active filter section in the FM IF IC (IC231,
pins 7, 8). The active filter section filters and amplifies noise
components only. The amplified signals are converted into
the pulse-type signals at the noise detector section. The de-
tected signals output from pin 14 (NOISV).
The “NOISV” signal from the FM IF IC (IC231 pin 14) is ap-
plied to the CPU (LOGIC unit; IC661, pin 32). Then the CPU
analyzes the noise condition and outputs the AF mute signal
as “AFMS” from the pin 84 to the AF mute switch (LOGIC
unit; Q411).
4-2 TRANSMITTER CIRCUITS
4-2-1 MICROPHONE AMPLIFIER CIRCUIT
(LOGIC UNIT)
The microphone amplifier circuit amplifies audio signals with
+6 dB/octave pre-emphasis characteristics from the micro-
phone to a level needed for the modulation circuit.
• In case of the internal microphone
The AF signals from the internal microphone (MC461) are
applied to the microphone amplifier (IC471, pins 6, 7) as the
“INMIC” signal.
• In case of external microphone
The AF signals from the external microphone (CHASSIS unit;
J41, pin 8) are applied to the microphone amplifier (IC471,
pins 6, 7) as the “EXTMIC” signal.
The amplified signals are passed through the pre-emphasis
circuit (R463, C463) and are then applied to the scrambler
switch (IC481, pins 1, 2) after being passed through the an-
other microphone amplifier (IC471, pins 1, 2).
The switched AF signals are amplified again at the limiter-
amplifier (IC491, pins 1, 2) and then passed through the low-
pass filter (IC491, pins 6, 7). The filtered AF signals are ap-
plied to the D/A converter (MAIN unit; IC251, pins 3, 4), and
are then applied to the modulation circuit.
4-2-2 MODULATION CIRCUIT (MAIN UNIT)
The modulation circuit modulates the VCO oscillating signal
(RF signal) using the microphone audio signals.
The AF signals from the D/A converter (IC251, pin 3) change
the reactance of varactor diode (D39) to modulate the os-
cillating signal at the TX VCO circuit (Q51, D35–D38). The
modulated signal is amplified at the buffer amplifiers (Q61,
Q62) and is then applied to the drive amplifier circuit via the
T/R switch (D91).
4-2-3 DRIVE/POWER AMPLIFIER CIRCUITS
(MAIN UNIT)
The drive/power amplifier circuits amplify the VCO oscillating
signal to the output power level.
The switched RF signal from the T/R switch (D91) is ampli-
fied at the buffer (Q91), drive (Q101) and power (Q111) am-
plifiers to obtain 1 W of RF power.
"DET" signal
from FM IF IC
(IC231, pin 9)
1764
10
7
12 LPF
AF
volume
R801
VR UNIT
AF
AMP
IC421
Q411
Speaker
IC261
IC282
IC281
IC471
IC251 D39
MAIN UNIT
LOGIC UNIT
Microphone
AMP 6
7
4D/A converter FM mod. to TX VCO circuit
(Q51, D35−D38)
3
IC471
AMP 21
2
1
61
2
IC491 IC481
AMP
IC491
LPF
7
• AF AMPLIFIER CIRCITS

4 - 3
Shift register
Prescaler
Phase
detector
Loop
filter
Programmable
counter
Programmable
divider
X1
15.3 MHz
"2nd LO" signal (30.6 MHz)
to the FM IF IC (IC231, pin 2)
Q51, D35 D38
TX VCO
Buffer
Buffer
Buffer Q62
D91
D92
Q71
Q61
11
10
9
PLSTBO
IC1
MA15A02PFV1
SDATAO
SCLKO
to transmitter circuit
to the 1st mixer circuit
2
1
58
LPF
Q41, D31 D34
RX VCO
2
• PLL CIRCUIT
The amplified signal is passed through the low-pass filter
(L121, L122, C121, C122), power detector (D121), antenna
switching circuit (D131) and another low-pass filter (L131,
L132, C132-C136).
The filtered signal is applied to the antenna connector
(CHASSIS unit; J1).
4-2-4 APC CIRCUIT (MAIN UNIT)
The APC circuit stabilizes transmit power and selects output
power of HIGH or LOW.
The power detector circuit (D121) detects the transmit power
output level and converts it into DC voltage.
The detected voltage is applied to the APC amplifier (IC141,
pin 3) and is compared with the reference voltage that is sup-
plied from the CPU (LOGIC unit: IC166) as “T1CON” signal
via the D/A converter (IC251, pin 14).
The output voltage from the APC amplifier (IC141, pin 4)
controls the bias voltage of the buffer (Q91), drive (Q101)
and power (Q111) amplifiers to control the output power by
comparing the detected voltage and reference voltage.
4-3 PLL CIRCUITS
4-3-1 PLL CIRCUIT (MAIN UNIT)
A PLL circuit provides stable oscillation of the transmit fre-
quency and receive 1st LO frequency. The PLL output com-
pares the phase of the divided VCO frequency to the refer-
ence frequency. The PLL output frequency is controlled by
the divided ratio (N-data) of a programmable divider.
The PLL circuit contains the RX VCO (Q41, D31–D34) and
TX VCO (Q51, D35–D38). The oscillated signal is amplified
at the buffer amplifiers (Q61, Q71) and then applied to the
PLL IC (IC1, pin 8) after being passed through the low-pass
filter (L72, C74, C75).
The PLL IC contains a prescaler, programmable counter,
programmable divider and phase detector, etc. The applied
signal is divided at the prescaler and programmable coun-
ter section by the N-data ratio from the CPU (LOGIC unit;
IC661).
The reference signal is generated at the reference oscillator
(X1) and is applied to the PLL IC (IC1). The PLL IC detects
the out-of-step phase using the reference frequency and out-
puts it from pin 5 (IC1). The output signal is passed thorough
the loop filter and is then applied to the VCO circuit as the
lock voltage.
If the oscillated signal drifts, its phase changes from that of
the reference frequency, causing a lock voltage change to
compensate for the drift in the oscillated frequency.
Drive
amp.
Buffer
amp.
IC141
T5V
VCC
RF signal
from PLL circuit
to antenna
"TDETV" to the CPU
(LOGIC unit; IC661, pin 31)
"T1CON" signal from the D/A
convertor IC (IC251, pin 14)
"TXMS" signal from the
expander IC (IC341, pin 12)
Q141
3
4
1
S5V APC amplifier
Power detector
circuit (D121)
LPF
D131
ANT
SW
Power
amp.
Q111
Q101Q91
• APC CIRCUIT

4 - 4
4-5 PORT ALLOCATIONS
4-5-1 CPU (LOGIC UNIT; IC166)
Pin
number
Port
name Description
1 BEEP Output beep audio signals.
2 VSSTB
Outputs strobe signal for the
scrambler IC (MAIN unit; IC381, pin
10).
3 EXSTB Outputs strobe signal for the expander
IC (MAIN unit; IC341, pin 1).
4 DASTB Outputs strobe signal for the D/A
converter (MAIN unit; IC251, pin 6).
5 PLSTB Outputs strobe signal for the PLL IC
(MAIN unit; IC1, pin 11).
10 SDATA Outputs serial data for the PLL and
scrambler ICs, etc.
11 SCLK Outputs serial data for the PLL and
scrambler ICs, etc.
12 ESCK Outputs clock signal for the EEPROM
(IC591).
13 ESDA I/O port for the EEPROM data signal
(IC591).
28 WETIN Input port for the transceiver’s internal
inundation detection.
29 EXTSV Input port for the external terminal
connecting detection.
30 BATTV Input port for the attached battery
voltage detection.
31 TDETV Input port for the transmit RF level
detection.
32 NOISV Input port for the noise level detection.
33 RSSIV Input port for the RSSI voltage level
detection.
34 LOINV Input port for the VCO lock voltage
level detection.
35 TEMPV Input port for the transceiver’s internal
temperature detection.
36 CDECV Input port for CTCSS/DTCS detection.
38 ATIS Outputs ATIS wave form.
75, 76 CONT1,
CONT2 Output LCD contrast control signals.
77, 78 LEDS1,
LEDS2
Output LCD and key’s backlight
dimmer control signal.
79 STXMS
Outputs the scrambler switch (IC481,
pin 3) control signal.
Low : While the scrambler function
OFF.
80 MICMS
Outputs the scrambler switch (IC481,
pin 7) control signal.
Low : While the scrambler function
ON.
4-4 POWER SUPPLY CIRCUITS
4-4-1 MAIN UNIT VOLTAGE LINE
Line Description
HV The voltage from the attached battery pack.
VCC
The same voltage as the HV line (battery
voltage) which is controlled by the power
switch (VR unit; R801). The output voltage is
applied to the drive (Q101) and power ampli-
fiers (Q111), etc.
R5V
Receive 5 V controlled by the R5V regulator
circuit (Q322) using the "R5VS" signal from
the CPU (IC661, pin 89). The output voltage
is applied to the RF amplifier (Q165), 1st
mixer (Q191), IF amplifier (Q211), etc.
T5V
Transmit 5 V controlled by the T5V regulator
circuit (Q323) using the "T5VS" signal from
the CPU (IC661, pin 90). The output voltage
is applied to the buffer amplifier (Q91) and
antenna switch (D131), etc.
V5V
Common 5 V converted from the M5V line at
the V5V regulator circuit (Q321). The output
voltage is applied to the VCO circuits (Q41,
Q51), etc.
4-4-2 LOGIC UNIT VOLTAGE LINE
Line Description
CPU5V
Common 5 V converted from the VCC line
at the CPU5V regulator circuit (IC551). The
output voltage is applied to the CPU (IC661),
RESET IC (IC581), EEPROM (IC591), etc.
M5V
Common 5 V converted from the VCC line at
the M5V regulator circuit (Q551–Q553). The
output voltage is applied to V5V, R5V, T5V
regulator circuits (MAIN unit; Q321–Q323),
etc.
S5V
Common 5 V converted from the M5V line at
the S5V regulator circuit (Q561). The output
voltage is applied to the microphone ampli-
fier (IC471), scrambler switch (IC481), etc.
4-3-2 VCO CIRCUITS (MAIN UNIT)
The VCO circuits contain a separate RX VCO (Q41, D31–
D34) and TX VCO (Q51, D35–D38). The oscillated signal is
amplified at the buffer amplifiers (Q61, Q62) and is then ap-
plied to the T/R switches (D91, D92).
The receive 1st LO (RX) signal from the T/R switch (D92) is
applied to the 1st mixer (Q191).
The transmit (TX) signal from the T/R switch (D91) is applied
to the buffer amplifier (Q91).

4 - 5
4-5-2 EXPANDER (MAIN UNIT; IC341)
Pin
number
Port
name Description
5 SRXMS
Outputs the scrambler switch (IC281,
pin 3) control signal.
Low : While the scrambler function
OFF.
6 DETMS
Outputs the scrambler switch (IC281,
pin 7) control signal.
Low : While the scrambler function
ON.
11 ATTS
Outputs the RF attenuator control sig-
nal.
High : While attenuator is ON.
12 TXMS
Outputs the TX mute switch (Q141)
control signal.
Low : While receiving.
13 VCOS Outputs the TX/RX VCO control
signal.
CPU (continued)
Pin
number
Port
name Description
81 ISPMS
Outputs the internal speaker control
signal.
High : While connecting the external
speaker.
82 LDTFS Outputs DTCS’s low-pass filter (Q532)
cut-off frequency control signal.
83 W/NS
Outputs Wide/Narrow mode control
signal.
High : While narrow mode is
selected.
84 AFMS
Outputs the AF mute circuit control
signal.
High : While the squelch is closed.
85 AFVS
Outputs AF amplifier’s power supply
control signal.
High :
While noise/tone squelches
are opened or emitting a
beep.
86 M5VS
Outputs M5V regulator circuit (Q551–
Q553) control signal.
Low : The common 5V is supplied.
87 S5VS
Outputs S5V regulator circuit (Q561)
control signal.
Low : The common 5V is supplied.
88 V5VS
Outputs V5V regulator circuit (MAIN
unit; Q321) control signal.
Low : The common 5V is supplied.
89 R5VS
Outputs R5V regulator circuit (MAIN
unit; Q322) control signal.
Low : While receiving.
90 T5VS
Outputs T5V regulator circuit (MAIN
unit; Q323) control signal.
Low : While transmitting.
98–
100
CENC1–
CENC3 Output DTCS/CTCSS wave form.
102 PTTIN Input port for [PTT] switch detection.
High : While [PTT] switch is pushed.
103 EPTTIN
Input port for HM-138 (optional
speaker-microphone)’s [PTT] switch
detection.
Low : While HM-138’s [PTT] switch
is pushed.
109 SQL Input port for [SQL].
Low : While [SQL] is pushed.
110 UP Input port for [Y].
Low : While [Y] is pushed.
111 DOWN Input port for [Z].
Low : While [Z] is pushed.
112 CH/WX Input port for [DIAL].
Low : While [DIAL] is pushed
113 16/9 Input port for [16•C].
Low : While [16•C] is pushed.
114 SCAN
Input port for [SCN•DUAL].
Low : While [SCAN•DUAL] is
pushed.
115 H/L Input port for the [H/L•LOCK].
Low : While [H/L•LOCK] is pushed.
119 UNLCK Input port for the PLL unlock signal.
High : PLL circuit is unlocked.
4-5-3 D/A CONVERTER (MAIN UNIT; IC251)
Pin
number
Port
name Description
2 SQCON Output AF signals to the squelch cir-
cuit (IC231, pin 8).
3 MOCON Output modulation signals to the VCO
circuit.
10 DTCON Output CTCSS/DTCS signals.
11 FRCON Outputs reference oscillator (X1) con-
trol signal.
14 T1CON
• While receiving
Outputs the bandpass filter (D154)
tuning signal.
• While transmitting
Outputs TX power control signal.
15 T2CON Outputs the bandpass filter (D155)
tuning signal.
22 T3CON Outputs the bandpass filter (D181)
tuning signal.
23 T4CON Outputs the bandpass filter (D182)
tuning signal.
.
h
e

5 - 1
5-1 PREPARATION
When adjusting IC-M87, JIG cable (see illustration on page 5-2), RS-232C cable and optional CS-M88 ADJ ADJUSTMENT
SOFTWARE (Rev. 1.0 or later) are required.
SECTION 5 ADJUSTMENT PROCEDURES
Microsoft and Windows are registered trademarks of
Microsoft Corporation in the U.S.A. and other countries.
MREQUIRED TEST EQUIPMENT
EQUIPMENT GRADE AND RANGE EQUIPMENT GRADE AND RANGE
DC power supply Output voltage : 7.2 V DC
Current capacity : 3 A or more Audio generator Frequency range : 300–3000 Hz
Measuring range : 1–500 mV
FM deviation meter Frequency range : 30–300 MHz
Measuring range : 0 to ±10 kHz Attenuator Power attenuation : 20 or 30 dB
Capacity : 10 W
Frequency counter
Frequency range : 0.1–300 MHz
Frequency accuracy : ±1 ppm or better
Sensitivity : 100 mV or better
Standard signal
generator (SSG)
Frequency range : 100–300 MHz
Output level : 0.1 µV to 32 mV
(–127 to –17 dBm)
Digital multimeter Input impedance : 10 MΩ/V DC or more AC millivoltmeter Measuring range : 10 mV to 10 V
RF power meter
(terminated type)
Measuring range : 0.1–5 W
Frequency range : 100–300 MHz
Impedance : 50 Ω
SWR : Less than 1.2 : 1
Oscilloscope Frequency rang : DC–20 MHz
Measuring range : 0.01–20 V
External speaker Input impedance : 8 Ω
Capacity : 3 W or more
MSYSTEM REQUIREMENTS
• Microsoft®Windows®98/98SE/Me
• RS-232C serial port (D-sub 9 pin)
MADJUSTMENT SOFTWARE INSTALLATION
qQuit all applications when Windows is running.
wInsert the CD into the appropriate CD drive.
eDouble-click the “Setup.exe” contained in the adjustment
software folder in the CD drive.
rThe “Welcome to the InstallShield Wizard for adjustment
software will appear.
Click [Next>].
tThe “Choose Destination Location” will appears.
Click [Next>] to install the software into the specified
folder.
y
After the installation is completed, the “InstallShield Wiz-
ard Complete” will appears.
Click [Finish].
uEject the CD.
iThe adjustment software icon appears on the desk top
screen.
MBEFORE STARTING SOFTWARE ADJUSTMENT
Program the adjustment frequencies (see adjustment fre-
quency list) into the transceiver using with the cloning soft-
ware before starting the software adjustment. Otherwise, the
transceiver cannot be adjusted properly.
CAUTION!: BACK UP the originally programmed mem-
ory data in the transceiver before program-
ming the adjustment frequencies.
When program the adjustment frequencies into
the transceiver, the transceiver’s memory data
will be overwritten and lose original memory
data at the same time.
MSTARTING SOFTWARE ADJUSTMENT
qConnect the transceiver and PC with the JIG CABLE.
wTurn the transceiver power ON.
eBoot up Windows, and double-click the adjustment soft-
ware icon on the desk top screen.
rClick ‘Connect’ on the adjustment software screen, then
appears the transceiver’s adjustment screen.
tSet or modify adjustment data as desired.
• ADJUSTMENT FREQUENCY LIST
CH CH GROUP FREQUENCY CONDITIONS
A1 MARINE 160.000 MHz Mode : Wide
A2 MARINE 160.000 MHz Mode : Narrow
A3 MARINE 160.000 MHz Mode : Wide
DTCS : 007
A4 MARINE 160.000 MHz Mode : Narrow
DTCS : 007
A5 LAND 160.000 MHz Mode : Wide

5 - 2
+
+
Audio generator
300 Hz to 3 kHz
AC
millivoltmeter
SP+
SP
MICE
MIC
PTT
PTTE
Add a jumper wire here
Electrolytic capacity
47 µF
OPC-966
(Cloning cable)
SINAD meter
Speaker (8 Ω)
Audio generator
to the antenna connector
RF power meter
0.1–10 W/50 Ω
Frequency
counter
Attenuator
20 dB or 30 dB
FM
deviation meter
Standard signal generator
0.1 µV to 32 mV
(–127 dBm to –17 dBm)
CAUTION!
DO NOT transmit while
SSG is connected to the
antenna connector.
to an RS-232C port
DB9 female plug
Personal
computer
RS-232C cable (straight) JIG CABLE
• JIG CABLE
• CONNECTION

5 - 3
CS-M88 ADJ Rev.1.0
File
COM 1: OPEN
Option
Connect Reload (F5) Disp para
[A / D]
BATT : 120 : 78h : 7.53 V
NOIS : 59 : 3Bh : 1.16 V
SD : 44 : 2Ch : 0.86 V
LVIN : 119 : 77h : 2.33 V
TEMPS : 178 : B2h : 26.86 'C
TXDET : 0 : 00h : 0.00 V
WET : 255 : FFh : 5.00 V
[D / A]
FRQCON : 127 : 7Fh : 2.49 V
T1/POW : 92 : 5Ch : 1.80 V
T2 : 127 : 7Fh : 2.49 V
T3 : 86 : 56h : 1.69 V
T4 : 117 : 75h : 2.29 V
Dev : 0 : 00h : 0.00 V
CTCS BL : 0 : 00h : 0.00 V
SQL LEV : 76 : 4Ch : 1.49 V
: Transceiver's connection state
: Reload adjustment data
: Receive sensitivity measurement
: Connected battery voltage
: PLL lock voltage
: Dial mode select
: Operating channel select
: RF output power select
NOTE:
1
5
4
6
10
11
12
15
9
14
16
1
2
3
4
5
6
9
10
7
8
11
12
13
: Reference frequency
: RF output power
: FM deviation
: Modulation balance
: Receive sensitivity (automatically)
: Receive sensitivity (manually)
: Squelch level (automatically)
: Squelch level (manually)
14
15
16
The above values for settings are example only.
Each transceiver has its own specific values for each setting.
3
2
8
7
13
• SCREEN DISPLAY EXAMPLE

5 - 4
5-2 SOFTWARE ADJUSTMENTS
• Select the adjustment item with [↑] / [↓] keys, then set specified value or condition with [←] / [→] keys on the connected com-
puter keyboard.
ADJUSTMENT ADJUSTMENT CONDITION MEASUREMENT VALUE
UNIT LOCATION
PLL LOCK
VOLTAGE
1 • Operating CH : A1
• Receiving
PC
screen
Connect a digital multimeter
to the check point LV.
1.85–3.35 V
(Verify)
2 • Operating CH : A1
• Transmitting
1.8–3.3 V
(Verify)
REFERENCE
FREQUENCY
[REF]
1 • Operating CH : A1
• Connect an RF power meter to the an-
tenna connector.
• Transmitting
Top
panel
Loosely couple a frequency
counter to the antenna con-
nector.
160.0000 MHz
OUTPUT
POWER
[Power (High)]
1 • Operating CH : A1
• Transmitting
Top
panel
Connect an RF power meter
to the antenna connector.
0.75 W
[Power (Mid] 2 • Operating CH : A1
• Transmitting
0.75 W
[Power (Low)] 3 • Operating CH : A1
• Transmitting
0.75 W
[Power (E-Low)] 4 • Operating CH : A1
• Transmitting
0.45 W
FM
DEVIATION
[MOD W]
1• Operating CH : A1
• Connect an audio generator to the multi
connector through the JIG cable and set
as;
: 1.0 kHz/200 mVrms
• Set an FM deviation meter as;
HPF : OFF
LPF : 20 kHz
De-emphasis : OFF
Detector : (P±P)/2
• Transmitting
Top
panel
Connect an FM deviation me-
ter to the antenna connector
through an attenuator.
±4.15–4.25 kHz
[MOD N] 2 • Operating CH : A2
• Transmitting
±2.00–2.10 kHz
[Balance (W)] 1 • Operating CH : A3
• No audio is applied to the multi connector.
• Set an FM deviation meter as;
HPF : OFF
LPF : 20 kHz
De-emphasis : OFF
Detector : (P±P)/2
• Transmitting.
Top
panel
Connect an FM deviation me-
ter with an oscilloscope to the
antenna connector through an
attenuator.
[Balance (N)] • Operating CH : A4
• Transmitting.
Set to square wave
form

5 - 5
PLL lock voltage
check point
LV
• MAIN UNIT TOP VIEW

5 - 6
SOFTWARE ADJUSTMENTS (Continue)
• Select the adjustment item with [↑] / [↓] keys, then set specified value or condition with [←] / [→] keys on the connected com-
puter keyboard.
ADJUSTMENT ADJUSTMENT CONDITION MEASUREMENT VALUE
UNIT LOCATION
NOTE: Adjust all the adjustment items as follows throughly in sequence.
RX
SENSITIVITY
[BPF T1]–
[BPF T4]
1• Operating CH : A5
• Connect an SSG to the antenna connector
and set as;
Frequency : 160.000 MHz
Level : 10 µV* (–87 dBm)
Modulation : 1 kHz
Deviation : ±3.0 kHz
• Receiving
Side
panel
Connect a SINAD meter
with an 8 Ω load to the multi
connector through the JIG
cable.
Minimum distortion
level
CONVENIENT:
The BPF T1– BPF T4 can be adjusted automatically.
q-1: Set the cursor to "BPF ALL" and then push [ENTER] key.
q-2: The BPF T1–BPF T4 are tuned automatically.
or
w-1: Set the cursor to one of BPF T1, T2, T3 or T4 as desired.
w-2: Push [ENTER] key to start tuning.
w-3: Repeat w-1 and w-2 to tune additional BPF.
SQUELCH
LEVEL
[SQL]
1 • Operating CH : A5
• Connect an SSG to the antenna connector
and set as;
Frequency : 160.000 MHz
Level : 0.5 µV* (–113 dBm)
Modulation : 1 kHz
Deviation : ±3.0 kHz
• Receiving
Side
panel
Connect a speaker to the
multi connector through the
JIG cable.
Close the squelch.
Then set SQL level
at the point where
the audio signals
just appears.
*The output level of the standard signal generator (SSG) is indicated as the SSG's open circuit.
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