4 - 1
SECTION 4 CIRCUIT DESCRIPTION
"NOISV" signal to CPU (LOGIC unit; IC661)
FI231
2nd IF filter 450 kHz
Noise
detector
Limiter
amp.
Quadrature
detector
Active
filter
AF signals
5V
X231
IC251
Mixer
1st IF from IF amplifier (Q211)
8
2
1
753
1614
12
11109
IC231
TA31136FN
Noise
amp.
FI232
RSSI
"RSSIV" signal to CPU (LOGIC unit; IC661)
PLL IC
IC1
X1
15.3 MHz
Q221
30.6 MHz
2
221
• 2ND IF AND DEMODULATOR CIRCUITS
4-1 RECEIVER CIRCUITS
4-1-1 ANTENNA SWITCHING CIRCUIT (MAIN UNIT)
The antenna switching circuit functions as a low-pass filter
while receiving and a resonator circuit while transmitting. This
circuit does not allow transmit signals to enter the receiver
circuits.
Received signals enter the antenna connector (CHASSIS;
J1) and pass through the low-pass filter (L131, L132, C132
–C136). The filtered signals are passed through the 1⁄4type
antenna switching circuit (D151, D152) and then applied to
the RF circuit.
While receiving, no voltage is applied to the D151, D152.
Thus, the receive line and the ground are disconnected and
L151, L152, C152, C153 function as low-pass filter which
leads received signals to the RF circuit.
4-1-2 RF CIRCUIT (MAIN UNIT)
The RF circuit amplifies signals within the range of frequency
coverage and filters out-of-band signals.
The signals from the antenna switching circuit pass through
the two-stage tunable bandpass filters (D154, D155, L154,
L155). The filtered signals are amplified at the RF amplifier
(Q165) and then passed through another two-stage tunable
bandpass filters (D181, D182, L181) to suppress unwanted
signals.
The filtered signals are applied to the 1st mixer circuit.
The tunable bandpass filters (D154, D155, D181, D182)
employ varactor diodes to tune the center frequency of the
RF passband for wide bandwidth receiving and good image
response rejection. These diodes are controlled by the CPU
(LOGIC unit; IC661) via the D/A converter (IC251, pins 14,
15, 22, 23).
4-1-3 1ST MIXER AND 1ST IF CIRCUITS (MAIN UNIT)
The 1st mixer circuit converts the received signal into the
fixed frequency of the 1st IF signal with the PLL output fre-
quencies. By changing the PLL frequency, only the desired
frequency passes through a monolithic filter at the next stage
of the 1st mixer.
The filtered signals from the bandpass filter are applied to
the 1st mixer circuit (Q199). The applied signals are mixed
with the 1st LO signals coming from the RX VCO circuit (Q41)
to produce a 31.05 MHz 1st IF signal. The 1st IF signal is
passed through the monolithic filter (FI211) to suppress out-
of-band signals.
The filtered signal is amplified at the 1st IF amplifier (Q211)
and is then applied to the 2nd IF circuit.
4-1-4 2ND IF AND DEMODULATOR CIRCUITS
(MAIN UNIT)
The 2nd mixer circuit converts the 1st IF signal into the 2nd
IF signal. The double-conversion superheterodyne system
(which convert receive signals twice) improves the image re-
jection ratio and obtains stable receiver gain.
The amplified 1st IF signal from the 1st IF amplifier (Q211) is
applied to the 2nd mixer section of the FM IF IC (IC231, pin
16), and is mixed with the 2nd LO signal to be converted into
a 450 kHz 2nd IF signal.
The FM IF IC (IC231) contains the 2nd mixer, limiter ampli-
fier, quadrature detector, active filter and noise amplifier, etc.
The 2nd LO signal (30.6 MHz) is produced at the PLL circuit
by doubling it’s reference frequency (X1: 15.3 MHz) at dou-
bler circuit (Q221).
