Kenwood TM-631A User manual

144/220MHz FM DUAL BANDER KENWOOD
M631A Bryan WICR
SERVICE MANUAL BRron@bryan Fretds.net
©1989-8 PRINTED IN JAPAN
B51-8016-00(T)633
Knob
(K29-3111-04)x3
Microphone
(T91-0380-25)
Panel ass'y
(A20-7014-02)
Knob (SQ)
(K29-31 16-04)
Knob (AF)
Metallic cabinet (Top) (K29-3115-04]
(A01-1048-02)
Panel
(A20-7021-02}
Knob (MAIN)
(K29-3060-04)
Knob (SCAN, MUTE)
(K29-3112-04) x5 a
Knob (Up/Down)
(K29-3114-04)x2
(ey
Knob (Sub-Encoder) Knob (DUAL)
(K29-3145-04) (K29-3143-04) (K29-3113-04) x3
Knob (Button)
(K27-3026-04) x2 Knob (Low)
Knob (Button) (K29-3144-04)
(K27-3028-04) Metallic cabinet (Bottom)
(A01-1076-02)
CONTENTS
CIRCUIT DESCRIPTION 2CONTROL UNIT (X53-3250-12) 61
DESCRIPTION OF ELEMENTS 17 144 MHz TX-RX UNIT (X57-3400-1 2) 63
PARTS LIST 25 220 MHz TX-RX UNIT (X57-3410-10) 65
EXPLODED VIEW 46 FINAL UNIT (220 MHz) (X45-3350-10) 67
PACKING 48 FINAL UNIT (144 MHz) (X45-3350-10) 68
ADJUSTMENT 49 SCHEMATIC DIAGRAM 69
TERMINAL FUNCTIONS 56 LEVEL DIAGRAM 73
PC BOARD VIEW/SCHEMATIC DIAGRAM BLOCK DIAGRAM 75
144 MHz PLL UNIT (X58-3670-10) 59 TSU-6 (CTCSS UNIT) 76
220 MHz PLL UNIT (X58-3690-10) 60 SPECIFICATIONS Back cover
144/220MHz FM DUAL BANDER KENWOOD
M631A Bryan WICR
SERVICE MANUAL BRron@bryan Fretds.net
©1989-8 PRINTED IN JAPAN
B51-8016-00(T)633
Knob
(K29-3111-04)x3
Microphone
(T91-0380-25)
Panel ass'y
(A20-7014-02)
Knob (SQ)
(K29-31 16-04)
Knob (AF)
Metallic cabinet (Top) (K29-3115-04]
(A01-1048-02)
Panel
(A20-7021-02}
Knob (MAIN)
(K29-3060-04)
Knob (SCAN, MUTE)
(K29-3112-04) x5 a
Knob (Up/Down)
(K29-3114-04)x2
(ey
Knob (Sub-Encoder) Knob (DUAL)
(K29-3145-04) (K29-3143-04) (K29-3113-04) x3
Knob (Button)
(K27-3026-04) x2 Knob (Low)
Knob (Button) (K29-3144-04)
(K27-3028-04) Metallic cabinet (Bottom)
(A01-1076-02)
CONTENTS
CIRCUIT DESCRIPTION 2CONTROL UNIT (X53-3250-12) 61
DESCRIPTION OF ELEMENTS 17 144 MHz TX-RX UNIT (X57-3400-1 2) 63
PARTS LIST 25 220 MHz TX-RX UNIT (X57-3410-10) 65
EXPLODED VIEW 46 FINAL UNIT (220 MHz) (X45-3350-10) 67
PACKING 48 FINAL UNIT (144 MHz) (X45-3350-10) 68
ADJUSTMENT 49 SCHEMATIC DIAGRAM 69
TERMINAL FUNCTIONS 56 LEVEL DIAGRAM 73
PC BOARD VIEW/SCHEMATIC DIAGRAM BLOCK DIAGRAM 75
144 MHz PLL UNIT (X58-3670-10) 59 TSU-6 (CTCSS UNIT) 76
220 MHz PLL UNIT (X58-3690-10) 60 SPECIFICATIONS Back cover

Manual&Scan&
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and image quality, image quality will win. It’s 2021 and
storage and bandwidth is cheap.
This was captured on a Canon DR-G2140 scanner which is a
~7500 USD unit circa 2021. You may note some artifacts and
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about 250 USD if you’re feeling generous :-)
If you have a hard to find/out of print manual and would
like to make it available please reach out, I may be able
to scan and return it to you.
Thank you,
Bryan Fields, W9CR
[email protected]

TM-631A
CIRCUIT DESCRIPTION
Frequency Configuration The transmitted signal for both bands is generated direct os-
cillation and direct frequency division in the phaselocked oop.
The TM-631A uses asynthesized PLL and includes avariable
The signal is amplified by alinear amplifier before being ap-
frequency oscillator that enables selection of 5kHz, 10 kHz,
12.5 kHz, 20 kHz, or 25 kHz channel steps. (See Fig. 1.) plied for the antenna.
Signals received in the 144 MHz band are down-converted to
afirst intermediate frequency of 16.9 MHz by mixing with the
first local oscillator frequency (127.1 MHz to 131.095 MHz),
and then to the second intermediate frequency of 455 kHz by
mixing with the second local oscillator frequency of
17.355 MHz.
Signals received in the 220 MHz band are down-converted to
the first intermediate frequency of 30.825 MHz by mixing with
the first local oscillator frequency (189.175 MHz to
194.170 MHz), and then to the second intermediate frequen-
cy of 455 kHz by mixing with the second local oscillator fre-
quency of 30.37 MHz. Double conversion is thus used for both
the 144 MHz and 220 MHz bands.
Model T-631A
Unit
Final Unit X45-3350-10
Control Unit X$3-3250-12
220 MHz TX-RX Unit X57-3410-10
144 MHz TX-RX Unit X67-3400-12
Table 1Comparison of TM-631A
CFW455F
144~ 147.995 MHz
MCE
455kHz
Ist MIX 16.9 MHz
ANT SW RF AMP MIX,IF,DET
me
17.355 MHz
127.1~131.095 MHz sp
144 MHz STEREO
BAND PLL AF AMP 4]
PA TX AMP SYSTEM
ANALOGUE SW SPA JACK
144~147.995 MHz
MAIN
220~224.995 MHz ota MAIN/SUB
PA TX AMP 220 MHz
BAND PLL MIC AMP
SYSTEM
189.175 -194.170 MHz mic
220 ~224,995 MHz
MCF CFW455F
30.825 MHz 455kHz
ANT SW RF AMP +MIX, 1F,DET
Ist MIX
30.370 MHz
Fig. 11 Frequency Configuration
2
TM-631A
CIRCUIT DESCRIPTION
Frequency Configuration The transmitted signal for both bands is generated direct os-
cillation and direct frequency division in the phaselocked oop.
The TM-631A uses asynthesized PLL and includes avariable
The signal is amplified by alinear amplifier before being ap-
frequency oscillator that enables selection of 5kHz, 10 kHz,
12.5 kHz, 20 kHz, or 25 kHz channel steps. (See Fig. 1.) plied for the antenna.
Signals received in the 144 MHz band are down-converted to
afirst intermediate frequency of 16.9 MHz by mixing with the
first local oscillator frequency (127.1 MHz to 131.095 MHz),
and then to the second intermediate frequency of 455 kHz by
mixing with the second local oscillator frequency of
17.355 MHz.
Signals received in the 220 MHz band are down-converted to
the first intermediate frequency of 30.825 MHz by mixing with
the first local oscillator frequency (189.175 MHz to
194.170 MHz), and then to the second intermediate frequen-
cy of 455 kHz by mixing with the second local oscillator fre-
quency of 30.37 MHz. Double conversion is thus used for both
the 144 MHz and 220 MHz bands.
Model T-631A
Unit
Final Unit X45-3350-10
Control Unit X$3-3250-12
220 MHz TX-RX Unit X57-3410-10
144 MHz TX-RX Unit X67-3400-12
Table 1Comparison of TM-631A
CFW455F
144~ 147.995 MHz
MCE
455kHz
Ist MIX 16.9 MHz
ANT SW RF AMP MIX,IF,DET
me
17.355 MHz
127.1~131.095 MHz sp
144 MHz STEREO
BAND PLL AF AMP 4]
PA TX AMP SYSTEM
ANALOGUE SW SPA JACK
144~147.995 MHz
MAIN
220~224.995 MHz ota MAIN/SUB
PA TX AMP 220 MHz
BAND PLL MIC AMP
SYSTEM
189.175 -194.170 MHz mic
220 ~224,995 MHz
MCF CFW455F
30.825 MHz 455kHz
ANT SW RF AMP +MIX, 1F,DET
Ist MIX
30.370 MHz
Fig. 11 Frequency Configuration
2

TM-631A
CIRCUIT DESCRIPTION
Receiver Circuits
¢General
This set uses seperate receiver circuits for the 144 MHz and
220 MHz bands. These circuits extend from the antenna in-
put section to the IF detector.
©144 MHz
The incoming two meter band signal passes thru the trans-
mit/receive switching diode in the final unit. And then through
the antenna matching coil in the front unit. It is then amplified
by aGaAs FET radio-frequency amplifier, Filtered by athree-
stage bandpass filter that uses varicap tuning to reject unwant-
ed signal components, and is fed to the first mixer. There it
is mixed with the first local oscillator signal from the PLL to
generate the first IF signal (16.9 MHz). Spurious adjacent-
channel signals are removed in atwo-stage MCF (Monolithic
Crystal Filter).
The first IF signal is amplified and fed to the FM IF IC:MC3361D.
This IF signal is mixed with the second ocal oscillator frequency
of 17.355 MHz which results in asecond IF signal of 455 kHz.
Spurious adjacent-channel signals are removed from the se-
cond IF signal by ceramic filter. Then the signal is amplified
and detected to generate the audio signal.
Q!
RA2
16
02 G2
08
6
PLL OUT
Fig. 2144 MHz Front End (Varicap Tuning)
¢220 MHz band
The incoming 220 MHz signal passes thru the transmit/receive
antenna switching diodes in the final unit and then passes
through the antenna matching coil. It is then amplified by a
GaAs FET radio-frequency amplifier. Filtered by athree stage
bandpass filter that uses varicap tuning to reject unwanted sig-
nal components, and enters the first mixer, where it is mixed
with the first local oscillator signal from the PLL to generate
the first IF signal (30.825 MHz). Spurious adjacent-channel sig-
nals are removed by atwo-stage MCF.
The first IF signal is amplified and fed to the FM IF IC
(MC3361D). This IF signal is mixed with asecond ocal oscil-
lator frequency of 30.37 MHz which converts it to asecond
IF signal of 455 kHz.
Spurious adjacent-channel signals are removed from the se-
cond IF signal by an ceramic filter. The signal is then amplified
and detected to generate the audio signal.
Item Specification
Nominal center frequency 30.825 MHz
Pass bandwidth Max. +7.5 kHz at 3dB
Attenuation band width Max. +28 kHz at 40 dB
Ripple Max. 1.5 dB
Insertion loss Max. 3dB
Guaranteed attenuation 60 dB or greater at +1MHz;
40 dB or greater for spurious signal
Terminating impedance 1.4 kQ/1 pF
Table 2MCF (L71-0270-05) Characteristics
(220 MHz TX-RX Unit XF1)
Item Specification
Nominal center frequency 455 kHz+ 1kHz
6dB bandwidth Min. +6 kHz (above 455 kHz)
50 dB bandwidth Min. +12.5 kHz (above 455 kHz)
Ripple (455 +4 kHz) Max. 3dB
Insertion loss Max. 6dB
Guaranteed attenuation
Max. 35 dB
(455 +100 kHz)
Input-output matching 2.0 kQ
impedance
02
Table 3Ceramic Filter CFW455F (L72-0315-05)
Characteristics (220 MHz TX-RX Unit CF1,
144MHz TX-RX Unit CF1)
Item Rating
Nominal center frequen- 16.900 kHz
cy (fo)
3dB bandwidth +7.5 kHz or more
Attenuation bandwidth +25 kHz or less at 40 dB
+45 kHz or less at 60 dB
Guaranteed attenuation 70 dB or more within +1MHz
(Sprious response 40 dB or more)
80 dB or more within fo
-
(900~ 920 kHz)
Ripple 1.0 dB or less
Loss 1.5 dB or less
Input and output im-
1.8 kQ/O pF
pedance
Table 4MCF (L71-0279-05) Characteristics
(14 MHz TX-RX Unit XF1)
3
TM-631A
CIRCUIT DESCRIPTION
Receiver Circuits
¢General
This set uses seperate receiver circuits for the 144 MHz and
220 MHz bands. These circuits extend from the antenna in-
put section to the IF detector.
©144 MHz
The incoming two meter band signal passes thru the trans-
mit/receive switching diode in the final unit. And then through
the antenna matching coil in the front unit. It is then amplified
by aGaAs FET radio-frequency amplifier, Filtered by athree-
stage bandpass filter that uses varicap tuning to reject unwant-
ed signal components, and is fed to the first mixer. There it
is mixed with the first local oscillator signal from the PLL to
generate the first IF signal (16.9 MHz). Spurious adjacent-
channel signals are removed in atwo-stage MCF (Monolithic
Crystal Filter).
The first IF signal is amplified and fed to the FM IF IC:MC3361D.
This IF signal is mixed with the second ocal oscillator frequency
of 17.355 MHz which results in asecond IF signal of 455 kHz.
Spurious adjacent-channel signals are removed from the se-
cond IF signal by ceramic filter. Then the signal is amplified
and detected to generate the audio signal.
Q!
RA2
16
02 G2
08
6
PLL OUT
Fig. 2144 MHz Front End (Varicap Tuning)
¢220 MHz band
The incoming 220 MHz signal passes thru the transmit/receive
antenna switching diodes in the final unit and then passes
through the antenna matching coil. It is then amplified by a
GaAs FET radio-frequency amplifier. Filtered by athree stage
bandpass filter that uses varicap tuning to reject unwanted sig-
nal components, and enters the first mixer, where it is mixed
with the first local oscillator signal from the PLL to generate
the first IF signal (30.825 MHz). Spurious adjacent-channel sig-
nals are removed by atwo-stage MCF.
The first IF signal is amplified and fed to the FM IF IC
(MC3361D). This IF signal is mixed with asecond ocal oscil-
lator frequency of 30.37 MHz which converts it to asecond
IF signal of 455 kHz.
Spurious adjacent-channel signals are removed from the se-
cond IF signal by an ceramic filter. The signal is then amplified
and detected to generate the audio signal.
Item Specification
Nominal center frequency 30.825 MHz
Pass bandwidth Max. +7.5 kHz at 3dB
Attenuation band width Max. +28 kHz at 40 dB
Ripple Max. 1.5 dB
Insertion loss Max. 3dB
Guaranteed attenuation 60 dB or greater at +1MHz;
40 dB or greater for spurious signal
Terminating impedance 1.4 kQ/1 pF
Table 2MCF (L71-0270-05) Characteristics
(220 MHz TX-RX Unit XF1)
Item Specification
Nominal center frequency 455 kHz+ 1kHz
6dB bandwidth Min. +6 kHz (above 455 kHz)
50 dB bandwidth Min. +12.5 kHz (above 455 kHz)
Ripple (455 +4 kHz) Max. 3dB
Insertion loss Max. 6dB
Guaranteed attenuation
Max. 35 dB
(455 +100 kHz)
Input-output matching 2.0 kQ
impedance
02
Table 3Ceramic Filter CFW455F (L72-0315-05)
Characteristics (220 MHz TX-RX Unit CF1,
144MHz TX-RX Unit CF1)
Item Rating
Nominal center frequen- 16.900 kHz
cy (fo)
3dB bandwidth +7.5 kHz or more
Attenuation bandwidth +25 kHz or less at 40 dB
+45 kHz or less at 60 dB
Guaranteed attenuation 70 dB or more within +1MHz
(Sprious response 40 dB or more)
80 dB or more within fo
-
(900~ 920 kHz)
Ripple 1.0 dB or less
Loss 1.5 dB or less
Input and output im-
1.8 kQ/O pF
pedance
Table 4MCF (L71-0279-05) Characteristics
(14 MHz TX-RX Unit XF1)
3

TM-631A
CIRCUIT DESCRIPTION
Table 6MCF (L71-0228-05) Characteristics
(144 MHz TX-RX Unit XF1)
©AF Unit
The path from the detector output to the AF power amplifier
input consists of two separate identical circuits for the main
band and the subband. The audio signal is first switched by
an analog switch into the AF preamplifier for its corresponding
band. After amplification, the signal level is adjusted by atwo-
channel electronic volume control [C:M51523 which is con-
trolled by the MAIN VOLUME and BALANCE controls on the
front panel. An AF low-pass filter then removes unwanted high-
frequency components. Next the separate audio signals are
selected to speaker mixed or separate mode by analogue switch
circuit which is amplified by the STEREO audio power amplifi-
er before being applied the speaker. (See Fig. 3.)
@Preamplifier For main
IF detect @Squelch amplifier band
IF detect ©Preamplifier
@Squelch amplifier
Fig. 3AF Section
®Squelch Circuits
Independent squelch circuits are provided for the main band
and subband. These circuits receive the output from the de-
tector, remove the 50 kHz noise component, amplify the sig-
nal with two transistor stages, and rectify it by means of adiode
to generate the squelch control signal. After DC amplification,
the control signal is used to switch the main and sub pream-
plifiers on and off.
°SMeter Circuits
Independent Smeter circuits for the 144 MHz and 220 MHz
bands receive signals from the 455 kHz ceramic filter, amplify
if in two-stage meter amplifier, and rectify the resulting signal
to generate aDC voltage. The microprocessor converts the ana-
log DC voltage to adigital output that is used to drive an LCD
bar meter.
CFI 8c
DIO R39
IOK
Item Specification
Nominal center frequency
(fo)
10.7 MHz
Pass bandwidth Max. fo +7.5 kHz at 3dB
Attenuation bandwidth 1) Max. +25 kHz at 40 dB
2) Max. +45 kHz at 60 dB
Guaranteed attenuation 70 dB or more within +1 MHz
40 dB or more spurious
80 dB or more within -900 kHz to -920 kHz
Ripple Max. 1dB
Insertion loss Max. 1.5 dB
Terminating impedance 3kQ/0 pF
!
J
CPU
33pin
PTH01
t
ASS Y
©THI M2
c37 NOY C38:
ol
Q5 Le
P33.P30
Fig. 4144 MHz S-meter circuit
¢Switching of Balance Range
To disable the BALANCE control in the single mode, the con-
trol voltage range of the BALANCE control is switched. This
switching is done by aLow signal from the INH (Inhibit) pin
of the microprocessor that turns on transistor Q7 in the single
mode. Since the center voltage of the balance control resistor
is held to approximately 4V, the voltage at the BAL pin can-
not exceed 4V, so even if the balance VR is moved to the SUB
position, the main band remains unattenuated. (See Fig. 5and
6.)
In dual band mode In single band mode
Attenuation (dB)
144M LPF
For main band AF
PA
For sub band qn
220M
MN4066BS' M51523AL TC4053BF
AF
MAIN
SUB
MAIN
suB
os
AF
LPF
For sub
band
084
Voltage at BAL pin (V) Voltage at BAL pin (V)
Fig. 5Fig. 6
During normal operation, the two electronic volume controllers
in the set operate using the M51523AL, but when the remote
control unit (RC-10) is connected and used to adjust the out-
put level, they are controlled by the LC7532M.
When the remote control unit is connected, aHigh switch con-
trol signal is sent from the CE pin of shift register IC4 to force
the attenuation of the M51523AL to zero. (Normally the CE
output is Low.) The UP and DOWN signals from the shift
register then vary the attenuation of the LC7532M. (See Fig. 7.)
4
TM-631A
CIRCUIT DESCRIPTION
Table 6MCF (L71-0228-05) Characteristics
(144 MHz TX-RX Unit XF1)
©AF Unit
The path from the detector output to the AF power amplifier
input consists of two separate identical circuits for the main
band and the subband. The audio signal is first switched by
an analog switch into the AF preamplifier for its corresponding
band. After amplification, the signal level is adjusted by atwo-
channel electronic volume control [C:M51523 which is con-
trolled by the MAIN VOLUME and BALANCE controls on the
front panel. An AF low-pass filter then removes unwanted high-
frequency components. Next the separate audio signals are
selected to speaker mixed or separate mode by analogue switch
circuit which is amplified by the STEREO audio power amplifi-
er before being applied the speaker. (See Fig. 3.)
@Preamplifier For main
IF detect @Squelch amplifier band
IF detect ©Preamplifier
@Squelch amplifier
Fig. 3AF Section
®Squelch Circuits
Independent squelch circuits are provided for the main band
and subband. These circuits receive the output from the de-
tector, remove the 50 kHz noise component, amplify the sig-
nal with two transistor stages, and rectify it by means of adiode
to generate the squelch control signal. After DC amplification,
the control signal is used to switch the main and sub pream-
plifiers on and off.
°SMeter Circuits
Independent Smeter circuits for the 144 MHz and 220 MHz
bands receive signals from the 455 kHz ceramic filter, amplify
if in two-stage meter amplifier, and rectify the resulting signal
to generate aDC voltage. The microprocessor converts the ana-
log DC voltage to adigital output that is used to drive an LCD
bar meter.
CFI 8c
DIO R39
IOK
Item Specification
Nominal center frequency
(fo)
10.7 MHz
Pass bandwidth Max. fo +7.5 kHz at 3dB
Attenuation bandwidth 1) Max. +25 kHz at 40 dB
2) Max. +45 kHz at 60 dB
Guaranteed attenuation 70 dB or more within +1 MHz
40 dB or more spurious
80 dB or more within -900 kHz to -920 kHz
Ripple Max. 1dB
Insertion loss Max. 1.5 dB
Terminating impedance 3kQ/0 pF
!
J
CPU
33pin
PTH01
t
ASS Y
©THI M2
c37 NOY C38:
ol
Q5 Le
P33.P30
Fig. 4144 MHz S-meter circuit
¢Switching of Balance Range
To disable the BALANCE control in the single mode, the con-
trol voltage range of the BALANCE control is switched. This
switching is done by aLow signal from the INH (Inhibit) pin
of the microprocessor that turns on transistor Q7 in the single
mode. Since the center voltage of the balance control resistor
is held to approximately 4V, the voltage at the BAL pin can-
not exceed 4V, so even if the balance VR is moved to the SUB
position, the main band remains unattenuated. (See Fig. 5and
6.)
In dual band mode In single band mode
Attenuation (dB)
144M LPF
For main band AF
PA
For sub band qn
220M
MN4066BS' M51523AL TC4053BF
AF
MAIN
SUB
MAIN
suB
os
AF
LPF
For sub
band
084
Voltage at BAL pin (V) Voltage at BAL pin (V)
Fig. 5Fig. 6
During normal operation, the two electronic volume controllers
in the set operate using the M51523AL, but when the remote
control unit (RC-10) is connected and used to adjust the out-
put level, they are controlled by the LC7532M.
When the remote control unit is connected, aHigh switch con-
trol signal is sent from the CE pin of shift register IC4 to force
the attenuation of the M51523AL to zero. (Normally the CE
output is Low.) The UP and DOWN signals from the shift
register then vary the attenuation of the LC7532M. (See Fig. 7.)
4

TM-631A
CIRCUIT DESCRIPTION
Control Unit
|
TX-RX (220 MHz)
X53-3250-12 A/3 Unit X57-3410-10
|14 13 MAIN
AF ouT2
AV SE
4ow
Balance VR variable AF INI
range switching
13 C/3
(With RC-10 connected)
|! |High when remote control unit VR is ON
||Q5 Low when remote control unit VR is OFF
INH THY
|
|
=
|
up z£
a! ce Scs cs
High for dual band tos os
Low for single band 2
ES ES
6
1
Ic
a
o
PEF
_ - _
Remote controt elect VOL
I10
az TTT TTT TT
16
AMP AIS
IC2
TX-RX (144 MHz) unit 4
X57-3400-12
i8
AIM
Electronic VR switching IC1,2: TC4053BF
o=>
BAL 10 >
suB
2
8c
No
07 R22
560
Q4
ww
22
16 9
20
I82&4 1€5:LC7534mM
AF
POWER
Fig. 7AF Volume Switching Diagram
5
TM-631A
CIRCUIT DESCRIPTION
Control Unit TX-RX (220 MHz)
X53-3250-12 A/3 Unit X57-3410-10
14 13 MAIN
o=>
BAL 10 >
AV
Ou suB
Balance VR variable aAF INI
range switching
B/3 C/3
8c
(With RC-10 connected)
No
High when remote control unit VR is ON
Q5 Low when remote control unit VR is OFF
Q8 07 R22
560
Q4
ow
UP
High for dual band os
Low for single band
os
ES
16
1c
16
20
7
Remote controt elect VOL
10
8Z
AF
POWER
AMP AIS
TX-RX (144 MHz) unit 1c 2
X57-3400-12
AIM
Electronic VR switching IC1,2: TC4053BF
7AF Volume Switching Diagram
5

TM-631A
CIRCUIT DESCRIPTION
©Muting Circuit MAIN AF
There are three types of audio muting: 182 Mutes audio output dur-
MU1 :Mutes the main band momentarily during memory scan ing momentary memory
etc And durin on scan during transmission
gtransmission.
MU2 :Mutes the subband when the CTCSS key is pressed. sue
ar
AOM
MU3 :Operates when the MUTE key is pressed on the front 3pin 2as 2
AOS
panel. 9°
>
«iSHIFT
REGISTER
R45) [MAIN BAND
820 MUTE Ic3
iZpin
suB
as
R51 13 MU2
MUS
SUB BAND MUT
SUB BAND Active
20d8 MUTE High
Mutes subband
©Speaker selection wher CTCSS Microprocessor
Operates when MUTE is ON data
In the TM-631A, aselection between the separate and mix control is pressed
modes is made depending upon the connection between the on front panel
speaker output and the external speaker. (Refer to Table 5.) Fig. 8Mute Circuit
When the separate mode is engaged, an attenuator is insert-
ed for level adjustment. (Refer to Figure 8-1.)
Main AF signal +buzzer
R53t
Sub AF signal
=
TC40538F MAIN output to pin 1of IC4
only in separate mode
MSs MAIN/SUB output to pin 14 of IC4 in mix mode
3
MSS
SUB output in separate mode
Figure 8-1 Speaker separate circuit
When the speaker jacks are connected into the MAIN termi-
nal, the MSS terminal becomes open and the pins 10 and 11
of IC3 become ''H'' so that AF signals are each input to the
audio amplifier (IC4) at they stand separate. While when the
speaker jacks are not connected into the MAIN terminal, the
MSS terminal is grounded, the pins 10 and 11 of IC3 become
""L'' and R53 is shorted for level adjustment so that AF sig-
nals are mixed together into only the pin 13 of C4.
Connected to both
Without external Connected only
Connected only to
MAIN and
MAIN/SUB
AF speaker to MAIN terminal MAIN/SUB
terminal
terminals
signal
External speaker
Main Internal speaker External speaker External speaker connected to MAIN
terminal
External speaker
Sub Internal speaker Internal speaker External speaker connected to
MAIN/SUB terminal
Mix Separate Mix Separate
Table 6-1 Correspondence in connection between
speaker output and external speaker
6
TM-631A
CIRCUIT DESCRIPTION
©Muting Circuit MAIN AF
There are three types of audio muting: 182 Mutes audio output dur-
MU1 :Mutes the main band momentarily during memory scan ing momentary memory
etc And durin on scan during transmission
gtransmission.
MU2 :Mutes the subband when the CTCSS key is pressed. sue
ar
AOM
MU3 :Operates when the MUTE key is pressed on the front 3pin 2as 2
AOS
panel. 9°
>
«iSHIFT
REGISTER
R45) [MAIN BAND
820 MUTE Ic3
iZpin
suB
as
R51 13 MU2
MUS
SUB BAND MUT
SUB BAND Active
20d8 MUTE High
Mutes subband
©Speaker selection wher CTCSS Microprocessor
Operates when MUTE is ON data
In the TM-631A, aselection between the separate and mix control is pressed
modes is made depending upon the connection between the on front panel
speaker output and the external speaker. (Refer to Table 5.) Fig. 8Mute Circuit
When the separate mode is engaged, an attenuator is insert-
ed for level adjustment. (Refer to Figure 8-1.)
Main AF signal +buzzer
R53t
Sub AF signal
=
TC40538F MAIN output to pin 1of IC4
only in separate mode
MSs MAIN/SUB output to pin 14 of IC4 in mix mode
3
MSS
SUB output in separate mode
Figure 8-1 Speaker separate circuit
When the speaker jacks are connected into the MAIN termi-
nal, the MSS terminal becomes open and the pins 10 and 11
of IC3 become ''H'' so that AF signals are each input to the
audio amplifier (IC4) at they stand separate. While when the
speaker jacks are not connected into the MAIN terminal, the
MSS terminal is grounded, the pins 10 and 11 of IC3 become
""L'' and R53 is shorted for level adjustment so that AF sig-
nals are mixed together into only the pin 13 of C4.
Connected to both
Without external Connected only
Connected only to
MAIN and
MAIN/SUB
AF speaker to MAIN terminal MAIN/SUB
terminal
terminals
signal
External speaker
Main Internal speaker External speaker External speaker connected to MAIN
terminal
External speaker
Sub Internal speaker Internal speaker External speaker connected to
MAIN/SUB terminal
Mix Separate Mix Separate
Table 6-1 Correspondence in connection between
speaker output and external speaker
6

TM-631A
CIRCUIT DESCRIPTION
Transmitter Circuits
¢General
Except for the microphone amplifier and APC (Automatic Power
Control) circuits, the transmitting circuits are independent.
MIC AMP (X59-3610- 00)
_
_
*Modulation Circuit
The audio signal from the microphone is fed to three opera-
tional amplifiers which perform preemphasis, amplification, and
limiting, and form asplatter filter that removes unwanted high-
frequency components.
The modulation circuit directly modulates the VCO (Voltage
control oscillator) for the 144 MHz and 220 MHz bands by us-
ing avaricap. (See Fig. 9.)
RI6 0
W
C4. 27P
xR7 390K 0033 4
C3 R6 (272)
033 33K .033 82K 82K 82K a
+
|
x>x
+
;°
|
oeTo
Qi: 28c4ii6(y) ICl NuM45saM
144PLL
1
R5
ICs 2)
IN NC 8c
R85
MIC ClI7
220MD1 144 MHz TX-RX unit
Fig. 9Modulation Circuit
©Preamplifier Stage Circuit
Athree-stage linear amplifier is used in both the 144 MHz and
220 MHz bands. Due to its wideband design, this linear am-
plifier provides stable drive output without adjustment.
¢Power Amplifier Circuit
The drive signal is fed to the power modules and amplified to
the required levels. It then passes through the TX/RX switching
diode and afilter and is transmitted via the antenna.
Rating
Item Symbol Tc (°C) Unit Conditions
S-AV17 M57774
Operating voltage Vec 25 16 17
Current consumption lec 25 14 14
Input power Pin 25 Zo=ZL=500 0.6 0.6 (Vcci213.8 V)
Output power Po 25 Zo =ZL=500 65 55
Operating case tem- Tc (op) °c -30~+110 -30~+110
perature
°c -40~+110 -40~+110
Storage temperature Tstg
Table 5Maximum Ratings of Power Modules
¢APC and SWR (Standing Wave Retio) Protection Circuits
The APC (automatic transmit output control) circuit and pro-
tection circuit have independent detectors in both bands. The
control circuit is acommon hybrid IC.
The APC detects the output from the power module and feeds
the result to the hybrid IC. The SWR protection circuit extracts
aportion of the reflected wave generated by antenna mismat-
ching at the CM (Capacitance Matching) coupler, detects it,
and feeds the result to the hybrid IC.
The hybrid IC controls the power transistor 05 :2SD1406 (Y)
in the drive stage, controls the drive transistor and the second
pin of the power module, and thus varies the transmitter output.
7
TM-631A
CIRCUIT DESCRIPTION
Transmitter Circuits
¢General
Except for the microphone amplifier and APC (Automatic Power
Control) circuits, the transmitting circuits are independent.
MIC AMP (X59-3610- 00)
_
_
*Modulation Circuit
The audio signal from the microphone is fed to three opera-
tional amplifiers which perform preemphasis, amplification, and
limiting, and form asplatter filter that removes unwanted high-
frequency components.
The modulation circuit directly modulates the VCO (Voltage
control oscillator) for the 144 MHz and 220 MHz bands by us-
ing avaricap. (See Fig. 9.)
RI6 0
W
C4. 27P
xR7 390K 0033 4
C3 R6 (272)
033 33K .033 82K 82K 82K a
+
|
x>x
+
;°
|
oeTo
Qi: 28c4ii6(y) ICl NuM45saM
144PLL
1
R5
ICs 2)
IN NC 8c
R85
MIC ClI7
220MD1 144 MHz TX-RX unit
Fig. 9Modulation Circuit
©Preamplifier Stage Circuit
Athree-stage linear amplifier is used in both the 144 MHz and
220 MHz bands. Due to its wideband design, this linear am-
plifier provides stable drive output without adjustment.
¢Power Amplifier Circuit
The drive signal is fed to the power modules and amplified to
the required levels. It then passes through the TX/RX switching
diode and afilter and is transmitted via the antenna.
Rating
Item Symbol Tc (°C) Unit Conditions
S-AV17 M57774
Operating voltage Vec 25 16 17
Current consumption lec 25 14 14
Input power Pin 25 Zo=ZL=500 0.6 0.6 (Vcci213.8 V)
Output power Po 25 Zo =ZL=500 65 55
Operating case tem- Tc (op) °c -30~+110 -30~+110
perature
°c -40~+110 -40~+110
Storage temperature Tstg
Table 5Maximum Ratings of Power Modules
¢APC and SWR (Standing Wave Retio) Protection Circuits
The APC (automatic transmit output control) circuit and pro-
tection circuit have independent detectors in both bands. The
control circuit is acommon hybrid IC.
The APC detects the output from the power module and feeds
the result to the hybrid IC. The SWR protection circuit extracts
aportion of the reflected wave generated by antenna mismat-
ching at the CM (Capacitance Matching) coupler, detects it,
and feeds the result to the hybrid IC.
The hybrid IC controls the power transistor 05 :2SD1406 (Y)
in the drive stage, controls the drive transistor and the second
pin of the power module, and thus varies the transmitter output.
7

TM-631A
CIRCUIT DESCRIPTION
Power amplifier
144 MHz Final Unit
D2 c20 Ls Lio Ll ANT2
I44MHz
|
ANT
bo
FB
av eT
9
RF METER
PRO
CURR
POWER
LOW POWER
NN
Fts
220 MHz Final Unit
220 MHz TX-RX Unit
(X57-3410-10)
Ic
KCCOI fecal
Fig. 10 APC and SWR Protection Circuits
PLL Synthesizer
Fig. 11 is ablock diagram of the PLL and VCO sections of the
144 MHz and 220 MHz circuits. Afeature of the PLL system
in the TM-621 Ais that there are independent subunits for the
144 MHz and 220 MHz bands, each consisting of an upper
VCO section and alower PLL section. Both sections are en-
closed in asturdy case that shields them from external signals.
To provide 5kHz, 10 kHz, 12.5 kHz, 20 kHz, and 25 kHz
steps, the 12.8 MHz frequency of the reference oscillator in
both the 144 MHz and 220 MHz bands is divided by 2048 and
2056 according to the step count to yield frequencies of
6.25 kHz and 5kHz. Each VCO oscillates directly at the tar-
get frequency. After single-stage amplification, the frequency
is applied to apulse-swallow PLL IC which divides it, performs
phase comparison, and locks the frequency.
The PLL system for 144 MHz band has aconfiguration of two
independent VCO units for transmission and reception,
separately. For shorter lockup time of PLL, use of the output
of pin 10 (when transmitting: ''H'') in the PLL IC (M54969FP)
is made. Only the moment that transmission is entered, the
LPF stops function due to the switching operation of Q15
(Figure 13) to approach the transmission lock voltage to make
the lockup time of PLL shorter.
The PLL system for 220 MHz band performs locking without
TX/RX selection. Making use of the output of pin 10 (with TX:
"L') in the PLL IC (M54959FP), only the moment that TX is
engaged, the LPF stops function to approach the TX lock vol-
tage to make the lockup time of PLL shorter.
In the 144 MHz band, the relation ship between Fvco1 and the
division ratios is:
Fvcor =(144--16.9) ={(n1x128) +Al} xFosc +R
Fvco1 Output frequency of 144 MHz-band VCO
ni :Value to which binary 10-bit programmable counter
is set
Al :Value to which binary 7-bit programmable counter is
set
;
Fosc :Reference oscillator frequency, 12.8 MHz
R:Value to which binary 14-bit programmable counter
is set
R=2560 for 5kHz, 10 kHz, 20 kHz and 25 kHz
steps
R=2048 for 12.5 kHz steps
lf n1=198, A1=76, then with 5kHz, 10 kHz, 20 kHz and
25 kHz steps:
Fvco1 ={{198x128)+76}x12800 +2560
x5
=127100=127.1 MHz
76)
In the 220 MHz band the relation between Fvcoz (RX) and the
division ratios is:
Fyco2 =(220
-
30.825) ={(n2x 128)+A2} xFosc+R
Fvco2:Output frequency of 220 MHz-band VCO
Rand Fosc: Same step frequencies as in the 144 MHz band
In this case n2=295 and A2=75, so:
Fvco2 ={(295x128)+75}x12800 +2560
=(37760+75) x5
=189175=189.175 MHz
8

TM-631A
CIRCUIT DESCRIPTION
MDI
x87-3410-10,
iee LPF IF.CONT MODY VCO BUFF
|
AMP
{
21,02, DIO1,D102 DIO4 1
{
I
1ly LR/LT SW l
a
220 224.995 MHz
1
lee -7
PLL LPF F.CONT VCO BUFF yf) AMP
|osc
|
|Ms4osore 2SC3324(B) iT33c tt
QI02 I1
aw sw swrtt OTCII4EK
1|AMP (Y) Q105 (K52) os
MOD OTCII4EK
Txveo Buff tt ISV268
{
MHz X58-3670-10
127.1~131.095 MHz
X57-3400-12
MO(X59-3610-00)
Fig. 12 PLL and VCO Block Diagram
P/N Lock
X= IN
X-OUT 22 Test
Fin
VREF
PD
0swi
Swe
S| 24 Vec
l2 GND
CPS
M54959FP 28C3324(B) IT33C Isvi64 NJN a\tu23)
SW
a5 \ f Q3
DTC144 bed D8
EK J\EK
AMP
1SS268
2SC2714
(Y)
2SK582
esce7l4y 1DIO3,D1I04 LR/LT SW
2SK508 T2SC3I2O
2SC2714
x2
12.8
144~147.995 MHz
5
1
23
Ref. freq. divider Lock
osc 1/8 Div. det
Veco
2. Modulus V/A divider +4 Ref. freq. fR PD
prescalor {binary 7bitt select det
{1/128, 1/129)
VN Programmable divider fIN/N
(Binary 10 bit)
*2
"7
21 bit data latch
far
21 bit shift register
Latch signal
21pluse counter
i
IN
2
10
2
3
RST
Fig. 13 M54959 Pulse Swallow Control Circuit
9
TM-631A
CIRCUIT DESCRIPTION
MDI
x87-3410-10,
iee LPF IF.CONT MODY VCO BUFF
|
AMP
{
21,02, DIO1,D102 DIO4 1
{
I
1ly LR/LT SW l
a
220 224.995 MHz
1
lee -7
PLL LPF F.CONT VCO BUFF yf) AMP
|osc
|
|Ms4osore 2SC3324(B) iT33c tt
QI02 I1
aw sw swrtt OTCII4EK
1|AMP (Y) Q105 (K52) os
MOD OTCII4EK
Txveo Buff tt ISV268
{
MHz X58-3670-10
127.1~131.095 MHz
X57-3400-12
MO(X59-3610-00)
Fig. 12 PLL and VCO Block Diagram
P/N Lock
X= IN
X-OUT 22 Test
Fin
VREF
PD
0swi
Swe
S| 24 Vec
l2 GND
CPS
M54959FP 28C3324(B) IT33C Isvi64 NJN a\tu23)
SW
a5 \ f Q3
DTC144 bed D8
EK J\EK
AMP
1SS268
2SC2714
(Y)
2SK582
esce7l4y 1DIO3,D1I04 LR/LT SW
2SK508 T2SC3I2O
2SC2714
x2
12.8
144~147.995 MHz
5
1
23
Ref. freq. divider Lock
osc 1/8 Div. det
Veco
2. Modulus V/A divider +4 Ref. freq. fR PD
prescalor {binary 7bitt select det
{1/128, 1/129)
VN Programmable divider fIN/N
(Binary 10 bit)
*2
"7
21 bit data latch
far
21 bit shift register
Latch signal
21pluse counter
i
IN
2
10
2
3
RST
Fig. 13 M54959 Pulse Swallow Control Circuit
9

TM-631A
CIRCUIT DESCRIPTION
The unlock circuit operates only in the transmitter circuit. A
description of the 430 MHz unlock circuit follows. Q10 is the
PLL unlock switching transistor. Normally the base of Q10 is
Low (0 V) and the collector of Q10 is High (8 V).
When the PLL unlocks 0.7 Vdc is applied to the base of Q10,
Turning Q10 on forcing the collector to 0V(Low). This swit-
ches Q8 off. When the PLL unlocks (during transmission), the
collector of Q8 goes to 8 V(instead of the normal 0V} and
Q11 turns off. Therefore the 8T switching transistor Q11 turns
off and the transmit bias voltage goes dead. This prevents trans-
mitter output when the PLL is unlocked.
e8R (Receive 8V) Stop Circuit
In receiving, the base of Q13 receives an 5Vdcsignal that turns
Q13 on (so the collector of 013 goes to 0V). Q12 then turns
on and provides 8Xat its collector. (In receiving, 8Vis sup-
plied from 8C (Common +8 V) to 8R.)
-During transmit, serial data from the microprocessor is pass-
10
ed thru shift register IC4. The output from IC4 at pin 11 goes
Low. 01 3therefore turns off (its collector voltage going to 8 V)},
Q12 turns off, and no 8R output is provided from the collector
of O12.
The PLL IC (M54959FP) can be controlled for its two refer-
ence division ratios and single comparison division ratio.
The pulse-swallow PLL circuit is contained on asingle chip and
consists of abuilt-in dual-modulus (1/128 and 1/129) prescaler.
The switch function (pin 10) of the PLL IC controls the 8T1
(TX +8 V(430 MHz)) and 8T2 (TX +8 V(144 MHz)) lines.
Bc
012
Shift register,
IC4 pin 11
ec
c95 .Ool
C96 I6V
Fig. 13 8R Stop Circuit
®8T2 (Transmit 8V) and Unlock Circuit
Dueing receive, 0.7 Vdesional is applied to the base of Q9
which turns Q9 on, Q8 off, and Q11 off, so no voltage is out-
put at the collector (8T2) (TX +8 V) of Q11.
When the PTT (Push-to Talk) switch is depressed, serial data
is sent from the microprocessor to IC1 (the phase-locked oop)
causing pin 10 of IC1 to go Low. This switches Q9 off, Q8
on, and Q11 on, so that 8Vis applied to 8T2. (In transmis-
sion, 8Vis applied to 8T2 from 8C.)
Ov
(8.0V)
(OV)
Git :2SBIII9S
8T2
Subunit,
IC1 pin 10 (TR2)
8.0V
(ov)
%(8.0V)
ec
ox ac
«2 0.7V
wx (Ov)
22K 013
8+
os /a9g On
R68
Ov 22K 014
8.0V)
%(OV) NX
on
Subunit,
ov IC1 pin 14 (TR2)
(Ov)
¥(0.7V) *When unlocked
Fig. 14 8T2 (Transmit 8V) and Transmit Unlock Circuits
5V (Ov)
(OV) #7 ERG
ST2
R70 (8V)
47K
+
(1/128 and

TM-631A
CIRCUIT DESCRIPTION
Digital Control Section
©General
The digital control section contains asingle microprocessor rotary encoder input circuits, display circuit, reset and backup
(CPU) that controls all transceiver functions. As shown in the circuits, and tone output circuit.
block diagram in Fig. 15, it also includes the key, switch, and Table 8lists the pin functions of IC101.
MAIN suB a
ENCODER ENCODER OPTION
ER
ER
430MHz 8R2 STOP
LOW POWER SW
144MHz 8R1 STOP
Electronic Vol. Up
Electronic Vol. Down
Electronic Vol. Switch
DIMMER Sw
MIC 77MAIN SUB SELECT
PTT
UP SOL OFF SW
DOWN MUTE 3
VFO
CALL 14
MUTE 2
MR MUTE
PF cTcss
MAIN SUB SELECT
l
TSU-6
K, Monly |
-H
SIGNALING DATA OUT
SHIFT
wea
REGISTER
3vo it
SHIFT REGISTER 1c 4
33 E8 Py DATA 3
PTHOI 2aProp? (EN
5§2DATA 2
PTHOO
P73 43CLOCK
37 14
P23 MN4094BS
40 P60 3
P20
§PLL DATA
Pl22 ic 0P63 IO
0120
IZ) xi
.494304 MHz
INTS x2 VEN
41 P03 RESET 3CLOCK
P02
P40
43 PO!
49 Pt30 P43 RESET l2
QI02
5
P50 IC104
poe 3.
P53 [64
s28C2712(Y) SHIFT
REGISTER
KEY Ic 3
MN4094BS
MATORIX BuCK UP 5c AvR
QI01 iC 02 5c
2502712 (Y) LASOO6M
Lco
ASSY
FeLOCK 6
w
7
34
47
48
42
TONE
6
Fig. 15 Control Section Block Diagram
11
TM-631A
CIRCUIT DESCRIPTION
Digital Control Section
©General
The digital control section contains asingle microprocessor rotary encoder input circuits, display circuit, reset and backup
(CPU) that controls all transceiver functions. As shown in the circuits, and tone output circuit.
block diagram in Fig. 15, it also includes the key, switch, and Table 8lists the pin functions of IC101.
MAIN suB a
ENCODER ENCODER OPTION
ER
ER
430MHz 8R2 STOP
LOW POWER SW
144MHz 8R1 STOP
Electronic Vol. Up
Electronic Vol. Down
Electronic Vol. Switch
DIMMER Sw
MIC 77MAIN SUB SELECT
PTT
UP SOL OFF SW
DOWN MUTE 3
VFO
CALL 14
MUTE 2
MR MUTE
PF cTcss
MAIN SUB SELECT
l
TSU-6
K, Monly |
-H
SIGNALING DATA OUT
SHIFT
wea
REGISTER
3vo it
SHIFT REGISTER 1c 4
33 E8 Py DATA 3
PTHOI 2aProp? (EN
5§2DATA 2
PTHOO
P73 43CLOCK
37 14
P23 MN4094BS
40 P60 3
P20
§PLL DATA
Pl22 ic 0P63 IO
0120
IZ) xi
.494304 MHz
INTS x2 VEN
41 P03 RESET 3CLOCK
P02
P40
43 PO!
49 Pt30 P43 RESET l2
QI02
5
P50 IC104
poe 3.
P53 [64
s28C2712(Y) SHIFT
REGISTER
KEY Ic 3
MN4094BS
MATORIX BuCK UP 5c AvR
QI01 iC 02 5c
2502712 (Y) LASOO6M
Lco
ASSY
FeLOCK 6
w
7
34
47
48
42
TONE
6
Fig. 15 Control Section Block Diagram
11

TM-631A
CIRCUIT DESCRIPTION
Pin
Name 170 Logic Function Name vo Logic Function
No Noa
P41 33 PTH01 144 MHz S/RF meter analog input
P40 34 PTHOO 430 MHz S/RF meter analog input
P53 35 T11
DA converter digital output Not connected
P52 36 T10
P51 37 P23 Output during single operation
P50 38 P22 Not connected
RESET Reset input 39 P21 Not connected
x2 40 P20 Beep tone generator
4.194304 MHz crystal oscillator
x1 41 P03/S1 Ui Microphone DOWN switch input/serial data input
10 P63 42 P02/SO vo Li- PLL IC (14 MHz) enable output Microphone PTT switch input/serial data output
11 P62 PLL IC (430 MHz) enable output 43 P01/SCK Li- hUP switch input/serial clock input/ output
12 P61 PLL IC data output 44 INT4 IHBackup detector input
Remote control unit connection-detect input
13 P60 PLL IC clock output 45 P123 JH
(Onty when connected)
14 P73 CTCSS enable output 46 P122 ILMain band BUSY input
15 P72 Shift register enable output 47 P121 CTCSS tone count input
16 P71 Shift register and CTCSS (Continuous Tone Coded 48 P120
Squeich System) lock output
Subband BUSY input
17 P70 Shift register and CTCSS data output 49 P133
18 P83 Not connected 50 P132
Key input
19 P82 $1 P131
20 P81 LOCK switch input 52 P130
d
21 P80 Not connected 53 P143
22 Ps3 54 P142
Key output
23 P92 input 55 P141
24 P91 56 P140
25 P90 Not connected 57 NC
26 Vss Ground (0 V) 58 Vop Power pin (5 V)
27 INT3 Sub encoder data input 59 P33 LCD driver data output
28 INT2 60 P32
Main encoder data input LCD driver clock output
29 INT1 Sub encoder clock input 61 P31 Sub LCD driver enable output
30 INTO Main encoder clock input 62 P30 Main LCD driver enable output
31 PTH03 MIC DOWN switch input 63 P43 D-A converter digital output
32 PTH02 MIC UP switch input 64 P42
10
20
3
4
5
6
7
L/
9
OL
oH
Table 6»PD75112GF-530-3BE Pin Functions (Control Unit IC)
®Key and Rotary Encoder Input Circuit
Fig. 16 shows the key and rotary encoder input circuit. The
keys on the front panel form amatrix which the microproces-
sor reads by scanning. Signals from the two rotary encoders
(MAIN and SUB), the microswitches (PTT, UP, DOWN) and
the F.LOCK switch are applied to the CPU directly.
FLOCK
z5c
Fede
PO!
p03
43 Kx3
ICIOI P02 42
PTH02 32
22K
100K
22k
100K
™™
PTT UP DWN CALL VFO MR PF
Fig. 16-1 Microphone key input circuit
Fig. 16 Key, Switch, and Rotary
Encoder Input Circuit
12
TM-631A
CIRCUIT DESCRIPTION
Pin
Name 170 Logic Function Name vo Logic Function
No Noa
P41 33 PTH01 144 MHz S/RF meter analog input
P40 34 PTHOO 430 MHz S/RF meter analog input
P53 35 T11
DA converter digital output Not connected
P52 36 T10
P51 37 P23 Output during single operation
P50 38 P22 Not connected
RESET Reset input 39 P21 Not connected
x2 40 P20 Beep tone generator
4.194304 MHz crystal oscillator
x1 41 P03/S1 Ui Microphone DOWN switch input/serial data input
10 P63 42 P02/SO vo Li- PLL IC (14 MHz) enable output Microphone PTT switch input/serial data output
11 P62 PLL IC (430 MHz) enable output 43 P01/SCK Li- hUP switch input/serial clock input/ output
12 P61 PLL IC data output 44 INT4 IHBackup detector input
Remote control unit connection-detect input
13 P60 PLL IC clock output 45 P123 JH
(Onty when connected)
14 P73 CTCSS enable output 46 P122 ILMain band BUSY input
15 P72 Shift register enable output 47 P121 CTCSS tone count input
16 P71 Shift register and CTCSS (Continuous Tone Coded 48 P120
Squeich System) lock output
Subband BUSY input
17 P70 Shift register and CTCSS data output 49 P133
18 P83 Not connected 50 P132
Key input
19 P82 $1 P131
20 P81 LOCK switch input 52 P130
d
21 P80 Not connected 53 P143
22 Ps3 54 P142
Key output
23 P92 input 55 P141
24 P91 56 P140
25 P90 Not connected 57 NC
26 Vss Ground (0 V) 58 Vop Power pin (5 V)
27 INT3 Sub encoder data input 59 P33 LCD driver data output
28 INT2 60 P32
Main encoder data input LCD driver clock output
29 INT1 Sub encoder clock input 61 P31 Sub LCD driver enable output
30 INTO Main encoder clock input 62 P30 Main LCD driver enable output
31 PTH03 MIC DOWN switch input 63 P43 D-A converter digital output
32 PTH02 MIC UP switch input 64 P42
10
20
3
4
5
6
7
L/
9
OL
oH
Table 6»PD75112GF-530-3BE Pin Functions (Control Unit IC)
®Key and Rotary Encoder Input Circuit
Fig. 16 shows the key and rotary encoder input circuit. The
keys on the front panel form amatrix which the microproces-
sor reads by scanning. Signals from the two rotary encoders
(MAIN and SUB), the microswitches (PTT, UP, DOWN) and
the F.LOCK switch are applied to the CPU directly.
FLOCK
z5c
Fede
PO!
p03
43 Kx3
ICIOI P02 42
PTH02 32
22K
100K
22k
100K
™™
PTT UP DWN CALL VFO MR PF
Fig. 16-1 Microphone key input circuit
Fig. 16 Key, Switch, and Rotary
Encoder Input Circuit
12

TM-631A
CIRCUIT DESCRIPTION
*Reset and Backup Circuits
Fig. 17 shows the reset and backup circuits.
When power is switched on, the reset circuit applies aLow
pulse with aduration of approximately 3mS to the RESET in-
put of the microprocessor. This causes apower-on reset.
When power is switched off, the backup circuit detects the
voltage drop on the 8Vline and applies aHigh signal to the
;
INT4 input of the microprocessor. This places the microproces- ec IN OUT
sor in the backup state.
Reset circuit Approx. 3mS
-7
aio2
i
t
Reset output
(at power-on)
J
cl23
C107
Backup circuit
Fig. 17 Reset and Backup Circuits
*Display Circuit
Located on the LCD assembly, the display circuit consists of a50% duty cycle. The data to be displayed is sent as serial
two LCD drivers, one for the main band and one for the sub- data to the LCD from pins P30 to P33 of the microprocessor.
band, together with their supporting circuits and the liquid crys- In single operation, the microprocessor sends the subband LCD
tal display. (See Fig. 18.) The LCD is driven dynamically with driver an inhibit signal to suppress the subband display.
LCDI mos
oo oo
OO eae)
©
ing a
Paty
al a
LC 7582 LC7582
aaa
iDATA
CE2
CE)
aR2 oO
=> =2
'Voo
JINH
Ra
Lh
Fig. 18 LCD Assembly (B38-0317-05)
13
2
58
voo
6V AVR
5c «
u-4 RESET INT4
0102
vss
==
26
zs ==
>lz
wre wn xr
>>
LB
8
ne Lw
7
5
6
4
oojGND
zs

TM-631A
14
CIRCUIT DESCRIPTION
¢PLL Data Output
Pins P60 (CP (PLL Clock)), P61 (DP (PLL Data)), P62 (EP1
(220 MHz PLL Enable)), and P63 (EP2 (144 MHz PLL Enable})
of the microprocessor supply the PLL data.
Fig. 19 indicates the bit structure of the data.
Fig. 20 indicates the timing of the data transfer.
Shift register
Swallow !
counter division
ratio A
it
division ratio N
Output port and u
frequency
selection
Fig. 19 PLL Data Structure
144 MHz Band
The 21 data bits are obtained as follows:
1. Division data Aand N(17 bits)
F(displayed value 16.9 MHz in RX)
={(Nx128)+A}x12.8MHz-+ ref
N: 10-bit binary value; division ratio of main counter
A: 7-bit binary value; division ratio of swallow counter
2. Reference frequency (ref) selection (2 bits)
2bit 21 bit
mn
ih
OP
LSB MSB MSB LSB MSB LSB
EP |
Main counter
EP2
Fig. 20 PLL Data Transfer Timing
220 MHz Band
The 21 data bits are derived as follows:
1. Division data Aand N(17 bits)
F(displayed value
-
30.825 MHz in RX)
N: 10-bit binary value; division ratio of main counter
A: 7-bit binary value; division ratio of swallow counter
((Nx128) +A} x12.8 MHz ref
2. Reference frequency (ref) selection (2 bits)
Data
Phase reference
frequency
D1 D2
LL5kHz With 5kHz, 10 kHz, 20 kHz,
or 25 kHz steps
HL6.25 kHz With 12.5 kHz steps
Data
Phase reference
q
01 D2
L L 5kHz With 5kHz, 10 kHz, 20 kHz,
or 25 kHz steps
HL6.25 kHz With 12.5 kHz steps
3. Switch selection (2 bits) 3. Switch selection (2 bits)
Data Output port
03 D4 swi SW2
H H At RX With ACC OFF
LHAt TX With ACC OFF
HLAt RX With ACC ON
At TX With ACC ON
Data Output port
D3 04 swi SW2
HHH H At RX
LHLHAt TX
TM-631A
14
CIRCUIT DESCRIPTION
¢PLL Data Output
Pins P60 (CP (PLL Clock)), P61 (DP (PLL Data)), P62 (EP1
(220 MHz PLL Enable)), and P63 (EP2 (144 MHz PLL Enable})
of the microprocessor supply the PLL data.
Fig. 19 indicates the bit structure of the data.
Fig. 20 indicates the timing of the data transfer.
Shift register
Swallow !
counter division
ratio A
it
division ratio N
Output port and u
frequency
selection
Fig. 19 PLL Data Structure
144 MHz Band
The 21 data bits are obtained as follows:
1. Division data Aand N(17 bits)
F(displayed value 16.9 MHz in RX)
={(Nx128)+A}x12.8MHz-+ ref
N: 10-bit binary value; division ratio of main counter
A: 7-bit binary value; division ratio of swallow counter
2. Reference frequency (ref) selection (2 bits)
2bit 21 bit
mn
ih
OP
LSB MSB MSB LSB MSB LSB
EP |
Main counter
EP2
Fig. 20 PLL Data Transfer Timing
220 MHz Band
The 21 data bits are derived as follows:
1. Division data Aand N(17 bits)
F(displayed value
-
30.825 MHz in RX)
N: 10-bit binary value; division ratio of main counter
A: 7-bit binary value; division ratio of swallow counter
((Nx128) +A} x12.8 MHz ref
2. Reference frequency (ref) selection (2 bits)
Data
Phase reference
frequency
D1 D2
LL5kHz With 5kHz, 10 kHz, 20 kHz,
or 25 kHz steps
HL6.25 kHz With 12.5 kHz steps
Data
Phase reference
q
01 D2
L L 5kHz With 5kHz, 10 kHz, 20 kHz,
or 25 kHz steps
HL6.25 kHz With 12.5 kHz steps
3. Switch selection (2 bits) 3. Switch selection (2 bits)
Data Output port
03 D4 swi SW2
H H At RX With ACC OFF
LHAt TX With ACC OFF
HLAt RX With ACC ON
At TX With ACC ON
Data Output port
D3 04 swi SW2
HHH H At RX
LHLHAt TX

TM-631A
CIRCUIT DESCRIPTION
©Shift Register Circuit
By shifting serial data from the microprocessors, the two shift
registers (IC3 and IC4) perform the following control functions:
@Main and sub standby control
¢Muting control
Low power control
Electronic volume control, UP/DOWN switching
¢Dimmer control
®Main/sub select
®Squelch off control
®CTCSS MAIN, SUB select
©Dimmer Control Circuit
Fig. 21 shows the AVR circuit in the LB. The LB (Lamp +B)
voltage is lowered by switching the reference voltage zener
diodes.
Normally the base voltage of Q2 is held to approximately 11 V
by the 11 Vzener diode D1:02CZ11Y, and the pilot lamp vol-
tage LB is approximately 10.5 V. When the DIM switch is set
to the ON position, 5Vdc is obtained from pin 4of shift register
IC3, causing 03 DCT 114EKto go from High to Low, thereby
connecting zener diode D2:02CZ8-2Y in parallel to D1.
Therefore, the base voltage of Q2 is held to the zener voltage
(8.2 V) of D2, resulting in adrop to approximately 8.5 V. The
pilot lamp voltage LB then drops to approximately 7.8 Vand
the pilot lamp dims.
10.5 V
(7.8 Vwith
R2 RI
OK 470 dimmer ON)
WW
02
(8.5 Vwith 3Ol
dimmer ON) 2
R4 IK
AA
PLi PL2
PL3 PL4
11.2V 02 02CZ8.2Y
(8.5 Vwith Q3
dimmer ON) >
N
SHIFT
REGISTER
IC3(4pm)
D2 parallels D1 Ov
when dimmer is ON {5.0 Vwith
dimmer ON)
Fig. 21 LB (Lamp +B) AVR Circuit
©Squelch-Off Circuit (When RC-10 is Connected)
Fig. 22 shows the squelch-off circuit. This circuit opens the
squelch gate for the main band from the remote controller when
the remote control unit is used.
When the RC-10 is connected, it communicates with the
microprocessor in the set via pins 2, 3, and 4of the micro-
phone connector. When the RC-10 is connected, the exchange
of data with the microprocessor causes pin 11 of shift register
IC3 to provide aHigh switch control signal, so transistor Q9
goes Low and the SQL pin is dropped to ground level.
The result is that the squelch VR for the main band is left open.
Part of the main noise amplifier output is fed from the RD (Re-
mote Data) pin to pin 6of the microphone connector, and from
there to the RC-10.
(MAIN)
NOISE AMP AF AMP
ICS IC 6
KCAO! KCA02
98 298 2
From
IC4 pin 5
r?\a9
so L
RI4
RDM
ve
Microphone
connector
cio
R7 o
From shift register
IC3 (pin 11)
RC-10 connector Al
Fig. 22 Squelch Off Circuit
LB
*Beep Tone
The microprocessor generates abeep tone of approximately
1.2 kHz at pin P20. This signal is reshaped into arectangular
wave by an C, Rwave-shaping circuit.
CSB
11.2V a
144 TX-RX unit
To IC3 14 pin
Ic!O}
P20
Ko2c2
from
MAIN
AF-LPF output
Fig. 23
15
pin
11

T
16
M-631A
CIRCUIT DESCRIPTION
*Tone Output
Signals from pins P40 to P43 and P50 to P53 of the
microprocessor are fed to aladder resistor network (IC104)
which performs D-A conversion and provides 38 signals rang-
ing from 67.0 to 250.3.
Fig. 24 shows the internal structure of IC104.
P43
P42
P4\
P40
Tone output Ps3
P52
PSI
P50
Fig. 24 Ladder Network: Internal Structure of KRR-C001
(Control Unit 1C104)
©Smeter and RF meter input
The Smeter and RF meter voltages are coupled separately for
the main band and subband and are provided as the M1 and
M2 inputs to the PTHOO and PTH01 pins of the microprocessor.
The input voltage is converted internally to a4-bit digital value
(16 levels) and sent to the display.
¢Busy Input
BUSY signals are supplied separately to the microprocessor
for the main band and subband. If squelch is on, the
microprocessor receives aLow input when the received sig-
nal is present, and lights the BUSY indicator.
*Input and Output for CTCSS Unit (Option)
The microprocessor provides data for the CTCSS unit from pins
P70, P71, and P73. This data specifies the CTCSS tone fre-
quency and CTCSS unit on/off information.
When atone is detected from the CTCSS unit, the microproces-
sor receives aHigh input at P121 and opens the squelch gate.
from IC3 6pin
CTCSS MAIN/SUB select
when "'L'' level: MAIN
2OK
os
=< 20K
0
=e
20K 20K
os
20K 2OK
12 AAA AAA
3AAA
2OK 4
2OK
4
20K 20K
5
620K 20K
from SUB RD
(RDS)
to AIM
15 0
a
from MAIN RD
(RDM)
6
5
3
2
¢Input and Output for Remote Control Unit (RC-10, Option}
When the remote control unit is connected, the microproces-
sor receives aHigh input at P123 and switches the following
pin functions:
P03 >SI :Serial data input pin
P02 »SO :Serial data output pin
P01 »SCK :Serial clock input/output pin
Data transfer between the microprocessor in the set and the
microprocessor in the remote control unit takes place over these
lines.
T
16
M-631A
CIRCUIT DESCRIPTION
*Tone Output
Signals from pins P40 to P43 and P50 to P53 of the
microprocessor are fed to aladder resistor network (IC104)
which performs D-A conversion and provides 38 signals rang-
ing from 67.0 to 250.3.
Fig. 24 shows the internal structure of IC104.
P43
P42
P4\
P40
Tone output Ps3
P52
PSI
P50
Fig. 24 Ladder Network: Internal Structure of KRR-C001
(Control Unit 1C104)
©Smeter and RF meter input
The Smeter and RF meter voltages are coupled separately for
the main band and subband and are provided as the M1 and
M2 inputs to the PTHOO and PTH01 pins of the microprocessor.
The input voltage is converted internally to a4-bit digital value
(16 levels) and sent to the display.
¢Busy Input
BUSY signals are supplied separately to the microprocessor
for the main band and subband. If squelch is on, the
microprocessor receives aLow input when the received sig-
nal is present, and lights the BUSY indicator.
*Input and Output for CTCSS Unit (Option)
The microprocessor provides data for the CTCSS unit from pins
P70, P71, and P73. This data specifies the CTCSS tone fre-
quency and CTCSS unit on/off information.
When atone is detected from the CTCSS unit, the microproces-
sor receives aHigh input at P121 and opens the squelch gate.
from IC3 6pin
CTCSS MAIN/SUB select
when "'L'' level: MAIN
2OK
os
=< 20K
0
=e
20K 20K
os
20K 2OK
12 AAA AAA
3AAA
2OK 4
2OK
4
20K 20K
5
620K 20K
from SUB RD
(RDS)
to AIM
15 0
a
from MAIN RD
(RDM)
6
5
3
2
¢Input and Output for Remote Control Unit (RC-10, Option}
When the remote control unit is connected, the microproces-
sor receives aHigh input at P123 and switches the following
pin functions:
P03 >SI :Serial data input pin
P02 »SO :Serial data output pin
P01 »SCK :Serial clock input/output pin
Data transfer between the microprocessor in the set and the
microprocessor in the remote control unit takes place over these
lines.

TM-631A
DESCRIPTION OF ELEMENTS
Final Unit (X45-3350-10)
Components Use/Function Operation/Condition/Compatibility
Q1 Power amplifier 144 MHz S-AV17:52 Wor more (with APC set OFF)
Q2 Transmitter driver 144 MHz D02 pin:0.12 W, Q2's collector:0.40 W(with APC OFF for M57726)
Q3 144 MHz protection, APC control Power control with VR2, Protection adjustment with VR3
06 Low Power switch Turns OFF when operating with 144 MHz Low Power
Q50 Power amplifier 220 MHz M57774:42 Wor more (with APC OFF)
Q51 Drive stage +Bcontrol
D1 Q2 idling Anode voltage:0.6 V(in transmission)
D2, 3Transmission/Reception select D2: UM9401, D3: MI308 for 144 MHz
D4 144 MHz APC, RF meter detection RF meter adjustment with VR1, APC adjustment with VR2, 144 MHz
144 MHz reflected wave detectionD5 Adjust with VR3, 15 W:ANT is open
D50 Power supply reverse connection protection
220 MHz APC, RF meter detection D51: MI407, D54: MI308
D51, 54
D52 220 MHz APC, RF meter detection Adjust with VR -7 on 220 MHz TX-RX unit, Adjust with VR 5on 220 MHz TX-RX unit
D53 220 MHz reflected wave detection Adjust VR4 on 220 MHz TX-RX unit
Control Unit (X53-3250-10)
Components Use/Function Operation/Condition/Compatibility
IC1 Electronic volume (IC5) select In normal operation
®goes ''L'' evel
Between @) and @turns OFF
Remote operated condition with RC-10
@goes ''H"' level.
AS Between @) and @turns ON
yy
TT,
CTCSS MAIN/SUB select CTCSS MAIN/SUB select
MAIN: @goes ''L'' level. Between @and (5 turns ON.
SUB :10 goes ''H'' level. Between 1and @turns ON.
IC2 Electronic volume (IC5) select In normal operation
9@, 1goes ''L'' level.
6Between @) and @turns ON. between @) and @) turns OFF
1Between @and @turns ON. between @and 15 turns OFF
Between @and @turns OFF.
AS Remote operated condition with RC-10
>8 @, @, @goes ''H'' level.
Between and @turns ON. between @and (8) turns OFF
Between @) and @turns ON. between @and @turns ON.
Between 12 and 14 turns OFF.
17
TM-631A
DESCRIPTION OF ELEMENTS
Final Unit (X45-3350-10)
Components Use/Function Operation/Condition/Compatibility
Q1 Power amplifier 144 MHz S-AV17:52 Wor more (with APC set OFF)
Q2 Transmitter driver 144 MHz D02 pin:0.12 W, Q2's collector:0.40 W(with APC OFF for M57726)
Q3 144 MHz protection, APC control Power control with VR2, Protection adjustment with VR3
06 Low Power switch Turns OFF when operating with 144 MHz Low Power
Q50 Power amplifier 220 MHz M57774:42 Wor more (with APC OFF)
Q51 Drive stage +Bcontrol
D1 Q2 idling Anode voltage:0.6 V(in transmission)
D2, 3Transmission/Reception select D2: UM9401, D3: MI308 for 144 MHz
D4 144 MHz APC, RF meter detection RF meter adjustment with VR1, APC adjustment with VR2, 144 MHz
144 MHz reflected wave detectionD5 Adjust with VR3, 15 W:ANT is open
D50 Power supply reverse connection protection
220 MHz APC, RF meter detection D51: MI407, D54: MI308
D51, 54
D52 220 MHz APC, RF meter detection Adjust with VR -7 on 220 MHz TX-RX unit, Adjust with VR 5on 220 MHz TX-RX unit
D53 220 MHz reflected wave detection Adjust VR4 on 220 MHz TX-RX unit
Control Unit (X53-3250-10)
Components Use/Function Operation/Condition/Compatibility
IC1 Electronic volume (IC5) select In normal operation
®goes ''L'' evel
Between @) and @turns OFF
Remote operated condition with RC-10
@goes ''H"' level.
AS Between @) and @turns ON
yy
TT,
CTCSS MAIN/SUB select CTCSS MAIN/SUB select
MAIN: @goes ''L'' level. Between @and (5 turns ON.
SUB :10 goes ''H'' level. Between 1and @turns ON.
IC2 Electronic volume (IC5) select In normal operation
9@, 1goes ''L'' level.
6Between @) and @turns ON. between @) and @) turns OFF
1Between @and @turns ON. between @and 15 turns OFF
Between @and @turns OFF.
AS Remote operated condition with RC-10
>8 @, @, @goes ''H'' level.
Between and @turns ON. between @and (8) turns OFF
Between @) and @turns ON. between @and @turns ON.
Between 12 and 14 turns OFF.
17

TM-631A
DESCRIPTION OF ELEMENTS
Components Use/Function Operation/Condition/Compatibility
@Enable input
@Data input
@) Clock nput
@At high level in DIM mode @CTCSS MAIN/SUB select MAIN: ''L"' evel
@) Band select output
IC3 Shift register
Goes low when main 430 MHz band
@Squeich switch
Goes high when squelch is turned OFF with RC-10
@Goes high when 14 mute output is activated
@Goes high in memory scan, momentarily on transmission
@3) Goes high when sub band CTCSS is ON
14 Goes high when MUTE key on the front panel is engaged
@) Enable input
@Data input
3Clock input
@) Stops 430 MHz band 8R. Goes ''H'' on reception mode.
@LOW power switch output. Goes ''L'' when LOW power is ON.
Data output to IC3
IC4 Shift register di) Stops 144 MHz band 8R. Goes high on reception mode.
12 Electronic volume DOWN output
Goes low in DOWN operation.
13 Electronic volume UP output
Goes low in UP operation.
14 Electronic volume select output
Goes high when electronic volume (IC2) is engaged
@5 ©Sub nput 8Sub output
IC5 Electronic volume @Main output 14 Main input 15 Initial terminal
"L" level: volume step 6@''L"' level: volume down
19 "L' level: volume up
Input: 13.8 V
IC6 8VAVR
Output: 8V
IC101 Microcomputer refer to ''Circuit Description"
IC102 6VAVR @Input 8V@Output 6V
IC103 DA conversion for tone @-® Input
13 Output
When AVR output is short-circuited
Q1 IR AVR protection Ro
470 66
"02
LB
Q!
Q2 LB AVR
03 Dimmer switch Turns ON when dimmer is engaged
Turns ON when operated with RC-10 remote control.
04
04,5 Electronic volume select switch 1
05
1c4
I4pin
Q3
Le
18
TM-631A
DESCRIPTION OF ELEMENTS
Components Use/Function Operation/Condition/Compatibility
@Enable input
@Data input
@) Clock nput
@At high level in DIM mode @CTCSS MAIN/SUB select MAIN: ''L"' evel
@) Band select output
IC3 Shift register
Goes low when main 430 MHz band
@Squeich switch
Goes high when squelch is turned OFF with RC-10
@Goes high when 14 mute output is activated
@Goes high in memory scan, momentarily on transmission
@3) Goes high when sub band CTCSS is ON
14 Goes high when MUTE key on the front panel is engaged
@) Enable input
@Data input
3Clock input
@) Stops 430 MHz band 8R. Goes ''H'' on reception mode.
@LOW power switch output. Goes ''L'' when LOW power is ON.
Data output to IC3
IC4 Shift register di) Stops 144 MHz band 8R. Goes high on reception mode.
12 Electronic volume DOWN output
Goes low in DOWN operation.
13 Electronic volume UP output
Goes low in UP operation.
14 Electronic volume select output
Goes high when electronic volume (IC2) is engaged
@5 ©Sub nput 8Sub output
IC5 Electronic volume @Main output 14 Main input 15 Initial terminal
"L" level: volume step 6@''L"' level: volume down
19 "L' level: volume up
Input: 13.8 V
IC6 8VAVR
Output: 8V
IC101 Microcomputer refer to ''Circuit Description"
IC102 6VAVR @Input 8V@Output 6V
IC103 DA conversion for tone @-® Input
13 Output
When AVR output is short-circuited
Q1 IR AVR protection Ro
470 66
"02
LB
Q!
Q2 LB AVR
03 Dimmer switch Turns ON when dimmer is engaged
Turns ON when operated with RC-10 remote control.
04
04,5 Electronic volume select switch 1
05
1c4
I4pin
Q3
Le
18

TM-631A
DESCRIPTION OF ELEMENTS
Components Use/Function Operation/Condition/Compatibility
Turns ON when squelch function is turned OFF with RC-10
o9
06 1c3
Squelch OFF switch
SOL
vR
Q7 Balance volume switch Turns ON in single operation
Turns OFF in single operation 8c 8c
Q7 o8
Q8 Balance volume switch BAL R22
INH
Turns OFF when the 8Vline shows below the
rated value when the power is turned ON/OFF.
INTO
Q101 Backup switch
8V
Turns ON during 3ms when the power
is turned ON. Normally OFF. RESET
Q102 Reset switch gvC123 QIOZ
D1 LB AVR reference 11 VZener diode
D2 LB AVR reference in dimmer mode 8.2 VZener diode
D101
Reverse current protection lithium battery Lithium battery turns ON when the power is turned OFF.
select
Reverse current protection, microcomputer
D102
protection
D103 Reverse current protection
D104 Microcomputer protection
D105 Voltage drop 7VZener diode for back up switch circuit.
(pin
19
TM-631A
DESCRIPTION OF ELEMENTS
Components Use/Function Operation/Condition/Compatibility
Turns ON when squelch function is turned OFF with RC-10
o9
06 1c3
Squelch OFF switch
SOL
vR
Q7 Balance volume switch Turns ON in single operation
Turns OFF in single operation 8c 8c
Q7 o8
Q8 Balance volume switch BAL R22
INH
Turns OFF when the 8Vline shows below the
rated value when the power is turned ON/OFF.
INTO
Q101 Backup switch
8V
Turns ON during 3ms when the power
is turned ON. Normally OFF. RESET
Q102 Reset switch gvC123 QIOZ
D1 LB AVR reference 11 VZener diode
D2 LB AVR reference in dimmer mode 8.2 VZener diode
D101
Reverse current protection lithium battery Lithium battery turns ON when the power is turned OFF.
select
Reverse current protection, microcomputer
D102
protection
D103 Reverse current protection
D104 Microcomputer protection
D105 Voltage drop 7VZener diode for back up switch circuit.
(pin
19