Lattice Semiconductor MachXO LCMXO2280C-4FT256C User manual

MachXO Control Development Kit
Evaluation Board User Guide
FPGA-EB-02047-1.5
November 2021

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
2 FPGA-EB-02047-1.5
Disclaimers
Lattice makes no warranty, representation, or guarantee regarding the accuracy of information contained in this document or the suitability of its
products for any particular purpose. All information herein is provided AS IS, with all faults and associated risk the responsibility entirely of the Buyer.
Buyer shall not rely on any data and performance specifications or parameters provided herein. Products sold by Lattice have been subject to limited
testing and it is the Buyer's responsibility to independently determine the suitability of any products and to test and verify the same. No Lattice
products should be used in conjunction with mission- or safety-critical or any other application in which the failure of Lattice’s product could create a
situation where personal injury, death, severe property or environmental damage may occur. The information provided in this document is
proprietary to Lattice Semiconductor, and Lattice reserves the right to make any changes to the information in this document or to any products at
any time without notice.

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02047-1.5 3
Contents
Acronyms in This Document.................................................................................................................................................7
1. Introduction...................................................................................................................................................................8
2. Features.........................................................................................................................................................................9
3. Lattice Semiconductor Devices....................................................................................................................................11
3.1. MachXO Device ....................................................................................................................................................11
3.2. Power Manager II Device .....................................................................................................................................11
4. Software Requirements...............................................................................................................................................11
5. Demonstration Designs ...............................................................................................................................................11
5.1. Control SoC Demo ................................................................................................................................................12
5.1.1. Board Monitoring and Fan Control...............................................................................................................14
5.1.2. Power Supply Sequencing and Reset Distribution........................................................................................14
5.1.3. Download Windows Hardware Drivers.........................................................................................................15
5.1.4. Download and Program the Demo Designs..................................................................................................15
5.1.5. Connect to the MachXO Control Evaluation Board ......................................................................................16
5.1.6. Set Up Windows HyperTerminal...................................................................................................................18
5.1.7. Set Up Linux Minicom...................................................................................................................................22
5.1.8. Power Supply Sequencing.............................................................................................................................23
5.1.9. Read Current Board Status ...........................................................................................................................23
5.1.10. Normalize PCB Temperature Output............................................................................................................25
5.1.11. Adjust Fan Temperature Threshold..............................................................................................................25
5.1.12. Change Fan Speed.........................................................................................................................................25
5.1.13. Adjust LCD Backlight Intensity ......................................................................................................................26
5.1.14. Adjust LCD Contrast......................................................................................................................................26
5.1.15. Read the SPI Flash Memory IDCode .............................................................................................................26
5.1.16. Read the I2C Temperature Sensor ................................................................................................................26
5.1.17. Read MachXO2280 DIP Switch Inputs ..........................................................................................................26
5.1.18. Read POWR1014A UES .................................................................................................................................27
5.1.19. Read Board Uptime.......................................................................................................................................27
5.1.20. Re-Display the Main Menu ...........................................................................................................................27
5.2. Voltage Monitoring Demo....................................................................................................................................28
5.3. Alternate ‘No-Rework’ Voltage Monitoring Demo...............................................................................................29
5.4. Memory-Audio Demo...........................................................................................................................................29
5.4.1. PC Host..........................................................................................................................................................29
5.4.2. LatticeMico8 Microcontroller.......................................................................................................................30
5.4.3. UART .............................................................................................................................................................30
5.4.4. CompactFlash Memory Controller................................................................................................................30
5.5. Memory-Audio Demo...........................................................................................................................................31
5.6. Power Supply Fault Logging Demo.......................................................................................................................34
5.6.1. Demo Environment Setup ............................................................................................................................35
5.6.2. Trigger Fault Conditions................................................................................................................................36
6. Download Demo Designs ............................................................................................................................................37
7. Programming Demo Designs with Diamond Programmer ..........................................................................................38
8. Rebuilding a MachXO Demo Project with Diamond....................................................................................................39
9. Reassembling the Demo LatticeMico8 Firmware........................................................................................................40
10. Recompiling a Power Manager II Demo Project with PAC-Designer...........................................................................41
11. MachXO Control Evaluation Board..............................................................................................................................42
11.1. Overview ..............................................................................................................................................................42
11.2. Subsystems...........................................................................................................................................................44
11.2.1. CompactFlash Card Socket ...........................................................................................................................44
11.2.2. Current Sensor Circuits.................................................................................................................................44
11.2.3. Digital Potentiometer Circuit........................................................................................................................44
11.2.4. Fan Circuit.....................................................................................................................................................44

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
4 FPGA-EB-02047-1.5
11.2.5. GPIO Expansion Header Land Patterns.........................................................................................................44
11.2.6. JTAG Jumpers................................................................................................................................................48
11.2.7. LCD Panel Support Circuit.............................................................................................................................48
11.2.8. MachXO PLD (MachXO2280) ........................................................................................................................49
11.2.9. Oscillator Circuit............................................................................................................................................50
11.2.10. Power Manager II Mixed Signal PLD (ispPAC-POWR1014A).........................................................................50
11.2.11. Power Supplies, Supply Control, and Fault Circuits ......................................................................................51
11.2.12. Prototyping Area...........................................................................................................................................51
11.2.13. PWM Analog Output Circuit .........................................................................................................................52
11.2.14. SD Flash Memory Card Socket ......................................................................................................................52
11.2.15. SPI Flash Memory..........................................................................................................................................52
11.2.16. SRAM.............................................................................................................................................................52
11.2.17. Status LEDs....................................................................................................................................................53
11.2.18. Temperature Sensor .....................................................................................................................................53
11.2.19. Test Points.....................................................................................................................................................53
11.2.20. USB Programming and RS-232 Interface ......................................................................................................53
11.2.21. Voltage Ramp Circuit ....................................................................................................................................53
11.3. Programming........................................................................................................................................................54
11.4. Mechanical Specifications ....................................................................................................................................54
11.5. Environmental Requirements...............................................................................................................................54
12. Modifying the MachXO Control Evaluation Board ......................................................................................................55
13. Troubleshooting ..........................................................................................................................................................56
14. Ordering Information...................................................................................................................................................57
Technical Support Assistance .............................................................................................................................................57
Appendix A. Board Schematics ...........................................................................................................................................58
Appendix B. Bill of Materials...............................................................................................................................................68
Appendix C. Control SoC Demo I/O Plan.............................................................................................................................71
RevisionHistory...................................................................................................................................................................71

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02047-1.5 5
Figures
Figure 2.1. MachXO Control Evaluation Board, Top Side ...................................................................................................10
Figure 5.1. PC Board Control and Power Management......................................................................................................12
Figure 5.2. Power Manager II POWR1014A Embedded Logic ............................................................................................15
Figure 5.3. SSD ADC Functional Block Diagram ..................................................................................................................28
Figure 5.4. Functional Block Diagram .................................................................................................................................29
Figure 5.5. Startup Screen ..................................................................................................................................................31
Figure 5.6. Uploading a Song/Wave File.............................................................................................................................31
Figure 5.7. Upload a File .....................................................................................................................................................32
Figure 5.8. Select File to Upload with Xmodem Protocol...................................................................................................32
Figure 5.9. File Upload Status.............................................................................................................................................33
Figure 5.10. Select a Song to Play.......................................................................................................................................33
Figure 5.11. Power Supply Fault Logging Demo Block Diagram .........................................................................................34
Figure 5.12. HyperTerminal Window..................................................................................................................................35
Figure 5.13. HyperTerminal Window after Over Volt.........................................................................................................36
Figure 7.1. Diamond Programmer Interface.......................................................................................................................38
Figure 11.1. MachXO Control Evaluation Board Block Diagram .........................................................................................42
Figure A.1. Configuration....................................................................................................................................................58
Figure A.2. MachXO Banks 0 and 1.....................................................................................................................................59
Figure A.3. MachXO Banks 2 and 3.....................................................................................................................................60
Figure A.4. MachXO Banks 4 and 5.....................................................................................................................................61
Figure A.5. MachXO Banks 6 and 7.....................................................................................................................................62
Figure A.6. MachXO Power.................................................................................................................................................63
Figure A.7. Board Power.....................................................................................................................................................64
Figure A.8. Power Manager II .............................................................................................................................................65
Figure A.9. Prototype Area .................................................................................................................................................66
Figure A.10. USB Program Data..........................................................................................................................................67

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
6 FPGA-EB-02047-1.5
Tables
Table 5.1. Main Menu.........................................................................................................................................................20
Table 6.1. Demo Design Directories....................................................................................................................................37
Table 11.1. MachXO Control Evaluation Board Components and Interfaces.....................................................................43
Table 11.2. CompactFlash Socket Reference......................................................................................................................44
Table 11.3. Header J4 Pin Information ...............................................................................................................................45
Table 11.4. Header J7 Pin Information ...............................................................................................................................46
Table 11.5. 38-Pin Landing Pattern Pin Information...........................................................................................................47
Table 11.6. 14-Hole Landing Pattern Pin Information ........................................................................................................47
Table 11.7. LCD Connector Pin Information .......................................................................................................................48
Table 11.8. MachXO2280 Reference ..................................................................................................................................49
Table 11.9. DIP Switch Pin Information ..............................................................................................................................49
Table 11.10. LED Bank Pin Information ..............................................................................................................................49
Table 11.11. POWR1014A Reference .................................................................................................................................50
Table 11.12. POWR1014A DIP Switch Pin Information.......................................................................................................50
Table 11.13. POWR1014A LED Bank Pin Information.........................................................................................................50
Table 11.14. Prototype Area Column Organization............................................................................................................51
Table 11.15. Column 7 Proto I/O Pin Information..............................................................................................................51
Table 11.16. SPI Flash Memory Reference .........................................................................................................................52
Table 11.17. SRAM Reference ............................................................................................................................................52
Table B.1. Bill of Materials ..................................................................................................................................................68

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02047-1.5 7
Acronyms in This Document
A list of acronyms used in this document.
Acronym
Definition
CPLD
Complex Programmable Logic Device
DIP
Dual in-line package
FPGA
Field Programmable Gate Array
GPIO
General Purpose Input/Output
I2C
Inter-Integrated Circuit
LUT
Look Up Table
LED
Light Emitting Diode
PCB
Printed Circuit Board
PLD
Programmable Logic Device
PWM
Pulse Width Modulation
RoHS
Restriction of Hazardous Substances Directive
SPI
Serial Peripheral Interface
SRAM
Static Random Access Memory.
UART
Universal Asynchronous Receiver/Transmitter
USB
Universal Serial Bus

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
8 FPGA-EB-02047-1.5
1. Introduction
Thank you for choosing the Lattice Semiconductor MachXO™ Control Development Kit!
This guide describes how to start using the MachXO Control Development Kit, an easy-to-use platform for rapidly
prototyping system control designs using MachXO PLDs. Along with the evaluation board and accessories, this kit
includes a pre-loaded control system-on-chip (Control SoC) design that demonstrates board diagnostic functions
including fan speed control based on temperature monitoring, LCD control, complete power supply monitoring and
reset distribution in conjunction with the Power Manager II ispPAC®-POWR1014A and 8-bit LatticeMico8™
microcontroller.
Note: Static electricity can severely shorten the lifespan of electronic components. See the MachXO Control
Development Kit QuickSTART Guide for handling and storage tips.

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02047-1.5 9
2. Features
The MachXO Control Development Kit includes:
•MachXO Control Evaluation Board –The MachXO Control Evaluation Board features the following on-board
components and circuits:
•MachXO LCMXO2280C-4FT256C PLD (www.latticesemi.com/products/cpldspld/machxo)
•Power Manager II ispPAC-POWR1014A mixed-signal PLD (www.latticesemi.com/products/powermanager)
•2 Mbit SPI Flash memory
•1 Mbit SRAM
•Interface to 16 × 2 LCD Panel*
•Secure Digital (SD) and CompactFlash memory card sockets*
•I2C temperature sensor
•Current and voltage sensor circuits
•Voltage ramp circuits
•Fan and controller circuitry
•USB connector (JTAG, RS-232)
•GPIO expansion header landings
•3” × 1”, 140-hole prototyping area
•Push-buttons for sleep mode and global set/reset
•8-bit DIP switch
•PWM analog output circuit
•8 status LEDs
•Pre-loaded Reference Designs and Demo –The kit includes a pre-loaded demo design (Control SoC) that integrates
several Lattice reference designs including: the LatticeMico8 microcontroller, PWM fan controller, LCD controller,
SRAM controller, I2C controller, SPI Flash memory controller, and a UART peripheral. Firmware supports a
temperature, current, and voltage monitoring demo and when connected to a host PC allows you to use a terminal
program to interact with the MachXO Control Evaluation Board.
•USB connector Cable –A mini B USB port provides a communication and debug port via a USB-to-RS-232 physical
channel and programming interface to the MachXO JTAG port.
•AC Adapter (international plugs)
•Quick Start Guide –Provides information on connecting the MachXO Control Evaluation Board, installing Windows
hardware drivers, and running the Control SoC demo.
•MachXO Control Development Kit Web Page –www.latticesemi.com/machxo-control-kit provides access to the
latest documentation, demo designs, and drivers for the kit.
*Note: LCD panel, SD and Compact Flash memory not included in the MachXO Control Development Kit.
The contents of this user’s guide include demo operation, top-level functional descriptions of the various portions of
the evaluation board, descriptions of the onboard connectors, switches and a complete set of schematics of the
MachXO Control Evaluation Board.

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
10 FPGA-EB-02047-1.5
POWR1014A
DIP Switch
Power
Socket
XO2280
Sleep Input
Pushbutton
LCD Pin
Header
XO2280
DIP Switch
Blank Input
XO2280
LED Bank
JTAG
Header
Temperature
Sensor
SD Memory
Socket
Audio
Jack
Fan
Header
CompactFlash
Card Socket
USB
XO2280 GSR
Input Pushbutton
POWR1014A
LEDs
Figure 2.1. MachXO Control Evaluation Board, Top Side

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02047-1.5 11
3. Lattice Semiconductor Devices
3.1. MachXO Device
This board features a MachXO PLD with a 3.3 V core supply. It can accommodate all pin-compatible MachXO devices in
the 256-ball ftBGA (17x17 mm) package. A complete description of this device can be found in the MachXO Family Data
Sheet.
Note: The connections referenced in this document refer to the LCMXO2280C-4F256C device. Available I/O and
associated sysI/O™ banks may differ for other densities within this device family. However, only the LCMXO2280C-
4F256C device offers full functional use of the entire evaluation board.
3.2. Power Manager II Device
This board features a Power Manager II mixed-signal PLD. It serves as general-purpose power-supply monitor, reset
generator, sequence controller, and high-voltage FET drivers. More information about Lattice Power Management
devices can be found on the Lattice website.
4. Software Requirements
You should install the following software before you begin developing designs for the evaluation board:
•Lattice Diamond®design software
•Diamond Programmer
5. Demonstration Designs
Lattice provides four demos to illustrate key applications of the MachXO (XO2280) and Power Manager II
(POWR1014A) devices in the context of control applications.
•Control SoC –The Control System-on-Chip (SoC) demo illustrates the use of the LatticeMico8 (LM8)
microcontroller, peripherals, and firmware integrated to provide system control features such as power supply
sequencing, temperature monitoring, and fan control. The Control SoC design is the default, pre-programmed
demo of the MachXO Control Evaluation Board.
•Voltage Monitoring Using Delta-Sigma ADC –Monitor sensors and power rails for free by replacing discrete ADCs
in your system. This demo implemements a Delta-Sigma Analog-to-Digital Conversion (ADC) technique to monitor
an analog voltage and convert it into a digital value with the XO2280.
•Memory-Audio –CompactFlash memory is commonly found in system control designs to provide simple plug
memory. This demo showcases the LatticeMico8 microcontroller, CompactFlash memory controller, and a PWM-
based digital-to-analog conversion to drive the audio jack of the MachXO Control Evaluation Board. A
Hyperterminal interface allows you to load a wave format file onto the board and play it back using the audio jack
output.
•Power Supply Fault Logging –Maximize system reliability by monitoring devices for marginal power supply failures.
This demo continuously monitors the supply rails of the MachXO Control Evaluation Board. If a power supply
failure occurs, the POWR1014A and XO2280 systems issue a diagnostic log to the onboard SPI memory that
includes supply identity and level.
Note: You may obtain your MachXO Control Evaluation Board after it has been reprogrammed. To restore the factory
default demo or program it with other Lattice-supplied examples see the Download Demo Designs and Programming
Demo Designs with Diamond Programmer sections of this document.

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
12 FPGA-EB-02047-1.5
5.1. Control SoC Demo
This demo illustrates how the MachXO and Power Manager II devices can be used to address a variety of system
control design issues including:
•Power supply sequencing
•Reset distribution
•Power supply monitoring
•Temperature monitoring and fan control
Power management is handled in two phases by the MachXO Control Evaluation Board system:
•Power On –After power is supplied to the board and the 3.3 V rail is stable, the Power Manager II POWR1014A
sequences four supply rails. Two circuits demonstrate the voltage ramp of 2N7002E power MOSFETs using the
high-voltage (HVOUT) outputs and two demonstrate power rail enable of Vcccore and Vccaux of the MachXO2280
using digital outputs. Next the POWR1014A asserts the MachXO reset. Finally the POWR1014A enters a supply
monitoring state.
•Post Power On –During the second phase of power management the board’s condition is monitored. Power supply
rail voltage, current, and board temperature is monitored by the MachXO2280 and POWR1014A. If any supply rail
fails, the POWR1014A asserts a reset for the LCMXO2280.
I2C
Temperature
Sensor
SPI Flash
Memory
(2 Mbit)
Current
Sensor
2-Bit
DIP Switch
POWR1014A
LED Bank
Optional
LCD Panel
Interface
XO2280
LED Bank
Fan
Circuit
SRAM
Memory
(1 Mbit)
LatticeMico8 Platform
SPI Memory
Controller
I2C Controller
LCD Controller
PWM Controller
SRAMMemory
Controller
Lattice MachXOPLD
JTAG/USB
RS-232/USB
PC Host
MachXOControl Evaluation Board
Supply
Sequencing
Reset
Distribution
Voltage
Sensor
Power
Manager II
Figure 5.1. PC Board Control and Power Management
The MachXO LCMXO2280C is a general purpose 2280-LUT PLD programmed with a small System-on-Chip design based
on the LatticeMico8 8-bit microcontroller. The LatticeMico8 platform provides board management functions for
temperature sensing, fan and LCD control, and monitoring of the Power Manager II POWR1014A I2C interface. The
system is designed to continuously monitor the condition of the board. You can interact with the platform through a
menu-driven terminal program running on a PC host. Switches and jumpers can be adjusted to emulate reset, Sleep,
and supply interruptions.

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02047-1.5 13
The LatticeMico8 platform integrates Lattice reference designs for SRAM and SPI Flash memory control, pulse-width
modulation (PWM) fan control, LCD control, and a Power Manager II POWR1014A communication interface. All
peripherals communicate across a WISHBONE-compatible bus. LatticeMico8 firmware written in Assembly language
manages communication between peripherals and provides a menu-driven user interface layer for a terminal program
running on a host PC.
The Power Manager II POWR1014A is a 10-input, 14-output, mixed-signal PLD with integrated analog voltage
comparators, timer/counter circuits, and a PLD core. The POWR1014A is programmed to cover supply sequencing,
reset distribution, and voltage supervision functions. The POWR1014A traps supply faults and assert MachXO2280
reset when appropriate. It disables MachXO2280 supplies input supplies are not stable. An I2C slave interface to the
POWR1014A allows the MachXO2280 to extract status and read/write control registers for the board status.

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
14 FPGA-EB-02047-1.5
5.1.1. Board Monitoring and Fan Control
The MachXO2280 design performs monitoring functions for the on-board temperature sensor and supply status issued
by the POWR1014A device. A rolling board status log is maintained in the on-board SRAM. The on-board DC fan motor
is activated whenever the programmed temperature threshold is exceeded.
The MachXO2280 design provides the following features:
•Menu-driven user interface for Windows or Linux PC-based terminal program via USB-to-Serial channel.
•Board uptime clock
•Programmable temperature threshold via the PC terminal program.
•Programmable LCD (not included) backlight and contrast via the PC terminal program.
•Programmable 0-5 V ADC input voltage via the PC terminal program.
•Issues a periodic log of time, temperature, voltage level, and fan speed readings to onboard SRAM memory.
•Enables onboard fan during over-temperature conditions.
5.1.2. Power Supply Sequencing and Reset Distribution
The POWR1014A design shows the Power Manager II in the PC board management role to sequence multiple power
supplies, distribute reset signals, and monitor power supply voltage/current levels. The POWR1014A’s embedded I2C
slave interface provides a variety of status registers for basic status polling while the board is operational.
The state diagram in Figure 5.2 illustrates the control logic embedded in the POWR1014A. The following states define
the control logic:
•RESET –After the MachXO Control Evaluation Board is powered and power-on reset occurs the POWR1014A waits
until its own supply rail is stable (Power OK).
•SEQUENCE SUPPLIES –After power is applied to the board and the 3.3 V and Vccio supply rails are stable, the
POWR1014A sequences the MachXO2280 supply rails: Vcccore and Vccaux using two transistor switches. In
addition two voltage ramp circuits are provided on-board to demonstrate safe operating area (SOA) operation of
two 2N7002E PNP-type power MOSFETs. LEDs D5-D6 of the POWER1014A LED bank are binary encoded to
represent the four supply sequence. The minimum value for each VMON input can be set independently by
modifying the PAC-Designer®software project.
•DISTRIBUTE RESETS –After all supplies are powered, the POWR1014A releases three reset signals. Reset control of
multiple microprocessor/DSP reset circuits is emulated by displaying the Reset state on the POWR1014A LED bank.
When lit, LEDs D7-D8 represent the reset release state.
•MONITOR SUPPLIES –After the power-on phase (supply sequencing and reset distribution) the MachXO Control
Evaluation Board is operational and a LatticeMico8 8-bit microcontroller based design runs its firmware the
MachXO2280. The POWR1014A then continuously monitors all input supplies. In this state the MachXO2280 polls
the POWR1014A I2C registers for the evaluation board’s status and makes voltage and current measurements
available to the PC terminal interface.

MachXO Control Development Kit
Evaluation Board User Guide
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All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02047-1.5 15
RESET
SEQUENCE
SUPPLIES
Power OK
Fault OR
Threshold
Violation
MONITOR
SUPPLIES
DISTRIBUTE
REQUESTS
Figure 5.2. Power Manager II POWR1014A Embedded Logic
5.1.3. Download Windows Hardware Drivers
Before you begin, obtain the necessary hardware drivers for Windows from the Lattice web site.
1. Browse to the www.latticesemi.com/machxo-control-kit and locate the hardware device drivers for the USB
interface.
2. Download the ZIP file to your system and unzip it to a location on your PC.
Linux Support:
The USB interface drivers for the evaluation board are included in Linux kernel 2.4.20 or greater including distributions
compatible with ispLEVER®7.2 (Red Hat Enterprise v3, v4 or Novell SUSE Enterprise V10).
5.1.4. Download and Program the Demo Designs
The Control SoC Demo is preprogrammed into the MachXO Control Evaluation Board, however over time it is likely that
your board may be modified.
To download the demo source files and reprogram the MachXO Control Evaluation Board:
1. See the Download Demo Designs and Programming Demo Designs with Diamond Programmer sections of this
document.
2. Use .\Demo_MachXO_Control_SoC\project\control_soc_demo.jed to restore the MachXO2280 Control SoC demo
design.
3. Use .\Demo_PM_Control_BM\project\bm_demo.jed to restore the POWR1014A Board Management demo design.

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
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16 FPGA-EB-02047-1.5
5.1.5. Connect to the MachXO Control Evaluation Board
In this step, power the board, and connect the evaluation board to your PC using the USB cable provided.
Notes:
1. Install exactly one device per row to include or exclude each device.
2. Shown with MachXO and POWR1014A enabled.
1. Adjust the following jumpers to include the MachXO2280 and POWR1014A devices in the JTAG programming chain
and exclude the Other JTAG option.
Install Jumpers
J14 – Excludes Other JTAG TDI-TDO
J15 – Includes MachXO2280 JTAG TMS
J18 – Includes POWR1014A JTAG TMS
Remove Jumpers
J19 – Excludes Other JTAG TMS
J5 – Includes MachXO2280 JTAG TDI-TDO
J9 – Includes POWR1014A JTAG TDI-TDO
See Schematic 1 of 10 for details on the MachXO Control Evaluation Board jumper settings.

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© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
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FPGA-EB-02047-1.5 17
2. Adjust the following jumpers to connect the onboard supply monitor circuits.
Install Jumper
J17 – Enable MachXO2280 Vccio monitor circuit
Remove Jumper
J22 – Enable MachXO2280 Vccaux monitor circuit
See Schematic 8 of 10 for details of the voltage monitor input circuits.
3. Ensure SW 4, position 2, of the POWR1014A DIP Switch is in the raised position. When in the lowered position, it
asserts manual reset to the system.
4. Plug in the power supply to an outlet and the Power Socket. After a connection is made, a red Power LED (D18)
lights up indicating the board is powered on.
5. Connect the USB cable provided from a USB port on your PC to the board’s USB interface socket (J8) on the side of
the board as shown in the layout diagram below.
6. If you are prompted, Windows may connect to Windows Update select No, not this time from available options
and click Next to proceed with the installation. Choose the Install from specific location (Advanced) option and
click Next.
7. Select Search for the best driver in these locations and click the Browse button to browse to the Windows driver
folder created earlier. Select the CDM 2.04.06 WHQL Certified folder and click OK.
8. Click Next. A screen is displayed as Windows copies the required driver files. Windows displays a message
indicating that the installation was successful.
9. Click Finish to install the USB driver.
10. Right-click the ispPAC-POWR1014A entry and choose Edit Device. The Device Information dialog box appears.
11. From the Operation list, select Bypass
.

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
18 FPGA-EB-02047-1.5
5.1.6. Set Up Windows HyperTerminal
Use a terminal program to communicate with the evaluation board. The following instructions describe the Windows
HyperTerminal program which is found on most Windows PCs. You may use another terminal program, although setup
is going to be different. For Linux, Minicom is a good alternative.
Note: This step uses the procedure for Windows XP users. Steps may vary slightly if using another Windows version.
1. From the Start menu, select Control Panel > System. The System Properties dialog box appears.
2. Select the Hardware tab and click Device Manager. The Device Manager dialog box appears.
3. Expand the Ports (COM & LPT) entry and note the COM port number for the USB Serial Port.
4. From the Start menu, select Programs > Accessories > Communications > HyperTerminal. The HyperTerminal
application and a Connection Description dialog box appear.

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02047-1.5 19
5. Specify the Name and Icon for the new connection. Click OK. The Connect To dialog box appears.
6. Select the COM port identified in Step 3 from the Connect using list. Click OK.
7. The COMn Properties dialog box appears where n is the COM port selected from the list.
8. Select the following Port Settings and click OK.
Bits per second: 115200
Data bits: 8
Parity: None
Stop bits: 1
Flow control: None

MachXO Control Development Kit
Evaluation Board User Guide
© 2009-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
20 FPGA-EB-02047-1.5
9. The HyperTerminal window appears.
10. From the MachXO Control Evaluation Board, press the MachXO2280 GSR Input push-button. The Control SoC demo
Main Menu appears.
The user interface provides the menu-driven interface shown in Table 5.1.
Table 5.1. Main Menu
===============================================================
Welcome to the MachXO Control Evaluation Board
Control SoC Demo Rev 1.0, June 2009
0: Re-display Main Menu
1: Read Board Uptime
2: Read Current Board Status
---------------------------------------------------------------
n : Normalize Temp Output
H/h: +/–Fan Temp Threshold (0.25C)
b : Backlight Intensity (H/L)
C/c: +/–LCD Contrast
f : Change Fan Speed
s : Read SPI Flash IDCode
t : Read I2C Temp Sensor
d : Read XO2280 DIP Switches
u : Read POWR1014A UES
===============================================================