LG C3400 User manual

Service Manual Model : C3400
Service Manual
C3400
P/N : MMBD0046201 Date : March, 2005 / Issue 1.0

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1. INTRODUCTION ................................ 2
1.1 Purpose ............................................... 2
1.2 Regulatory Information ........................ 2
1.3 Abbreviations ....................................... 4
2. PERFORMANCE ................................. 6
2.1 H/W Features ...................................... 6
2.2 Technical Specification ........................ 7
3. TECHNICAL BRIEF ......................... 11
3.1 Transceiver (SI4205-BM, U502) ....... 11
3.2 Power Amplifier Module
(SKY77325, U501) ............................ 16
3.3 26 MHz Clock (VCTCXO, X500) ....... 17
3.4 Power Supplies for RF Circuits
(RF LDO, U503) ................................. 17
3.5 Digital Main Processor
(AD6527B, U101)............................... 18
3.6 Analog Main & Power Management
Processor (AD6535, U102) ................ 24
3.7 Memory (RD38F3350LLZDQ0, U302)
.. 34
3.8 Display and Interface.......................... 35
3.9 Camera Interface................................ 37
3.10 Keypad Switches and Scanning....... 39
3.11 Microphone ...................................... 40
3.12 Main Speaker ................................... 40
3.13 Headset Interface............................. 41
3.14 MP3/AAC Decoder(uPD9993, U702) &
Amplifier(LM4923, U703) ................. 42
3.15 Key Back-light Illumination ............... 44
3.16 LCD Back-light Illumination .............. 45
3.17 VIBRATOR....................................... 46
4. TROUBLE SHOOTING ................... 47
4.1 RX Trouble ........................................ 47
4.2 TX Trouble.......................................... 55
4.3 Power On Trouble .............................. 63
4.4 Charging Trouble................................ 65
4.5 Vibrator Trouble.................................. 67
4.6 LCD Trouble....................................... 69
4.7 Camera Trouble ................................. 71
4.8 Speaker Trouble ................................ 73
4.9 SIM Card Interface Trouble................ 75
4.10 Earphone Trouble ............................ 77
4.11 KEY backlight Trouble...................... 79
4.12 Receiver Trouble ............................. 81
4.13 Microphone Trouble ......................... 83
4.14 RTC Trouble..................................... 85
4.15 Indication LED Trouble..................... 86
4.16 Folder on/off Trouble........................ 87
5. DISASSEMBLY INSTRUCTION ... 88
5.1 Disassembly ...................................... 88
5.2 Calibration .......................................... 95
6. BLOCK DIAGRAM
.......................... 98
7. CIRCUIT DIAGRAM ......................... 99
8. PCB LAYOUT ................................... 106
9. ENGINEERING MODE................... 109
9.1 BB Test [MENU 1] ........................... 110
9.2 RF Test [MENU 2]............................ 111
9.3 MF mode [MENU 3].......................... 111
9.4 Trace option [MENU 4]..................... 112
9.5 Call timer [MENU 5] ......................... 112
9.6 Fact. Reset [MENU 6] ...................... 112
9.7 S/W version [MENU 7] ..................... 112
10. STAND ALONE TEST.................. 113
10.1 Introduction .................................... 113
10.2 Setting Method .............................. 113
10.3 Means of Test ................................ 114
11. AUTO CALIBRATION .................. 116
11.1 Overview ....................................... 118
112 Requirements ................................. 116
11.3 Menu and Settings ......................... 116
11.4 AGC ............................................... 118
11.5 APC ............................................... 118
11.6 ADC ............................................... 118
11.7 Setting ........................................... 118
11.8 How to do calibration ..................... 118
12. EXPLODED VIEW &
REPLACEMENT PART LIST .... 119
12.1 Exploded View ............................... 119
12.2 Replacement Parts
< Mechanic component >............... 121
< Main component > ...................... 123
12.3 Accessory....................................... 130
Table Of Contents

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1. INTRODUCTION
1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download
the features of this model.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for
example, persons other than your company’s employees, agents, subcontractors, or person
working on your company’s behalf) can result in substantial additional charges for your
telecommunications services. System users are responsible for the security of own system.
There are may be risks of toll fraud associated with your telecommunications system. System
users are responsible for programming and configuring the equipment to prevent unauthorized
use. The manufacturer does not warrant that this product is immune from the above case but will
prevent unauthorized use of common-carrier telecommunication service of facilities accessed
through or connected to it.
The manufacturer will not be responsible for any charges that result from such unauthorized use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and
possibly causing harm or interruption in service to the telephone network, it should disconnect
telephone service until repair can be done. A telephone company may temporarily disconnect
service as long as repair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If
these changes could reasonably be expected to affect the use of the this phone or compatibility
with the network, the telephone company is required to give advanced written notice to the user,
allowing the user to take appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on this model must be performed only by the manufacturer or its
authorized agent. The user may not make any changes and/or repairs expect as specifically
noted in this manual. Therefore, note that unauthorized alternations or repair may affect the
regulatory status of the system and may void any remaining warranty.
E. Notice of Radiated Emissions
This model complies with rules regarding radiation and radio frequency emission as defined by
local regulatory agencies. In accordance with these agencies, you may be required to provide
information such as the following to the end user.
1. INTRODUCTION

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F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look
slightly different.
G. Interference and Attenuation
Phone may interfere with sensitive laboratory equipment, medical equipment, etc.Interference
from unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices
ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the
sign. Following information is ESD handling:
• Service personnel should ground themselves by using a wrist strap when exchange system
boards.
• When repairs are made to a system board, they should spread the floor with anti-static mat
which is also grounded.
• Use a suitable, grounded soldering iron.
• Keep sensitive parts in these protective packages until these are used.
• When returning system boards or parts like EEPROM to the factory, use the protective
package as described.
1. INTRODUCTION

1. INTRODUCTION
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1.3 Abbreviations
For the purposes of this manual, following abbreviations apply:
APC Automatic Power Control
BB Baseband
BER Bit Error Ratio
CC-CV Constant Current – Constant Voltage
DAC Digital to Analog Converter
DCS Digital Communication System
dBm dB relative to 1 milli watt
DSP Digital Signal Processing
EEPROM Electrical Erasable Programmable Read-Only Memory
ESD Electrostatic Discharge
FPCB Flexible Printed Circuit Board
GMSK Gaussian Minimum Shift Keying
GPIB General Purpose Interface Bus
GSM Global System for Mobile Communications
IPUI International Portable User Identity
IF Intermediate Frequency
LCD Liquid Crystal Display
LDO Low Drop Output
LED Light Emitting Diode
OPLL Offset Phase Locked Loop
PAM Power Amplifier Module
PCB Printed Circuit Board
PGA Programmable Gain Amplifier
PLL Phase Locked Loop
PSTN Public Switched Telephone Network
RF Radio Frequency
RLR Receiving Loudness Rating
RMS Root Mean Square
RTC Real Time Clock

1. INTRODUCTION
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SAW Surface Acoustic Wave
SIM Subscriber Identity Module
SLR Sending Loudness Rating
SRAM Static Random Access Memory
PSRAM Pseudo SRAM
STMR Side Tone Masking Rating
TA Travel Adapter
TDD Time Division Duplex
TDMA Time Division Multiple Access
UART Universal Asynchronous Receiver/Transmitter
VCO Voltage Controlled Oscillator
VCTCXO Voltage Control Temperature Compensated Crystal Oscillator
WAP Wireless Application Protocol

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2. PERFORMANCE
2.1 H/W Features
Item Feature Comment
Li-ion, 1000mAh
Standard Battery Battery Size : 34.15 (W) °ø53.55(H) °ø5.7(T) [mm]
Battery Weight : 25g
Under the minimum current consumption environment
Stand by Current (such as paging period 9), the level of standby current
is below 4mA.
Talk time Up to 3 hours (GSM TX Level 5)
Stand by time Up to 200 hours (Paging Period: 9, RSSI: -85 dBm)
Charging time Approx. Under 3.75 hours
RX Sensitivity GSM, EGSM: -107dBm, DCS: -107dBm
TX output power GSM, EGSM: 33dBm(Level 5),
DCS: 30dBm(Level 0)
GPRS compatibility Class 10
SIM card type 3V Only
Display Main LCD : CSTN 128 °ø 160 pixel 65K Color
Sub LCD : STN 96 °ø 64 pixel MONO Color
Hard icons. Key Pad
Status Indicator 0 ~ 9, #, *, Up/Down Navigation Key
Menu Key, Clear Key, Send Key, END/PWR Key
Soft Key(Left/Right)
ANT Internal
EAR Phone Jack Yes (stereo)
PC Synchronization Yes
Speech coding EFR/FR/HR
Data and Fax Yes
Vibrator Yes
Loud Speaker Yes
Voice Recording Yes
Microphone Yes
Speaker/Receiver One way dual speaker
Travel Adapter Yes
MIDI 40 Poly
MP3/AAC Yes
Options Data Kit , CD
2. PERFORMANCE

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2. PERFORMANCE
2.2 Technical Specification
Item Description Specification
GSM
TX: 890 + n x 0.2 MHz
RX: 935 + n x 0.2 MHz (n=1~124)
EGSM
1 Frequency Band TX: 890 + (n-1024) x 0.2 MHz
RX: 935 + (n-1024) x 0.2 MHz (n=975~1024)
DCS
TX: 1710 + (n-512) x 0.2 MHz
RX: 1805 + (n-512) x 0.2 MHz (n=512~885)
2 Phase Error RMS < 5 degrees
Peak < 20 degrees
3 Frequency Error < 0.1 ppm
GSM, EGSM
Level Power Toler. Level Power Toler.
5 33 dBm ±2dB 13 17 dBm ±3dB
6 31 dBm ±3dB 14 15 dBm ±3dB
7 29 dBm ±3dB 15 13 dBm ±3dB
8 27 dBm ±3dB 16 11 dBm ±5dB
9 25 dBm ±3dB 17 9 dBm ±5dB
10 23 dBm ±3dB 18 7 dBm ±5dB
11 21 dBm ±3dB 19 5 dBm ±5dB
12 19 dBm ±3dB
4 Power Level DCS
Level Power Toler. Level Power Toler.
0 30 dBm ±2dB 8 14 dBm ±3dB
1 28 dBm ±3dB 9 12 dBm ±4dB
2 26 dBm ±3dB 10 10 dBm ±4dB
3 24 dBm ±3dB 11 8 dBm ±4dB
4 22 dBm ±3dB 12 6 dBm ±4dB
5 20 dBm ±3dB 13 4 dBm ±4dB
6 18 dBm ±3dB 14 2 dBm ±5dB
7 16 dBm ±3dB 15 0 dBm ±5dB

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Item Description Specification
GSM, EGSM
Offset from Carrier (kHz). Max. dBc
100 +0.5
200 –30
250 –33
400 –60
600~ <1,200 –60
1,200~ <1,800 –60
1,800~ <3,000 –63
3,000~ <6,000 –65
5 Output RF Spectrum 6,000 –71
(due to modulation) DCS
Offset from Carrier (kHz). Max. dBc
100 +0.5
200 –30
250 –33
400 –60
600~ <1,200 –60
1,200~ <1,800 –60
1,800~ <3,000 –65
3,000~ <6,000 –65
6,000 –73
GSM, EGSM
Offset from Carrier (kHz). Max. dBm
400 –19
600 –21
1,200 –21
6 Output RF Spectrum 1,800 –24
(due to switching DCS
transient)
Offset from Carrier (kHz). Max. dBm
400 –22
600 –24
1,200 –24
1,800 –27
7 Spurious Emissions Conduction,Emission Status
2. PERFORMANCE

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2. PERFORMANCE
Item Description Specification
GSM, EGSM
8 Bit Error Rate BER (Class II) < 2.439% @–102 dBm
DCS
BER (Class II) < 2.439% @–100 dBm
9 RX Level Report Accuracy ±3 dB
10 SLR 8±3 dB
Frequency (Hz) Max.(dB) Min.(dB)
100 –12 –
200 0 –
300 0 –12
11 Sending Response 1,000 0 –6
2,000 4 –6
3,000 4 –6
3,400 4 –9
4,000 0 –
12 RLR 2±3 dB
Frequency (Hz) Max. (dB) Min. (dB)
100 –12 –
200 0 –
300 2 –7
500 ❈–5
13 Receiving Response 1,000 0 –5
3,000 2 –5
3,400 2 –10
4,000 2
* Mean that Adopt a straight line in between 300 Hz
and 1,000 Hz to be Max. level in the range.
14 STMR 13±5 dB
15 Stability Margin > 6 dB
dB to ARL (dB) Level Ratio (dB)
–35 17.5
–30 22.5
16 Distortion –20 30.7
–10 33.3
0 33.7
7 31.7
10 25.5
17 Side tone Distortion Three stage distortion < 10%
18 System frequency ≤2.5 ppm
(13 MHz) tolerance
19 32.768KHz tolerance ≤30 ppm

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Item Description Specification
At least 80 dB under below conditions:
20 Ringer Volume 1. Ringer set as ringer.
2. Test distance set as 50 cm.
21 Charge Current Fast Charge : < 430 mA
Slow Charge : < 160 mA
Antenna Bar Number Power
5 –85 dBm ~
4 –90 dBm ~ –86 dBm
22 Antenna Display 3 –95 dBm ~ –91 dBm
2 –100 dBm ~ –96 dBm
1 –105 dBm ~ –101 dBm
0 ~ –105 dBm
Battery Bar Number Voltage
0 3.51 ~ 3.61V
23 Battery Indicator 1 3.62 ~ 3.69V
2 3.70 ~ 3.77V
3 3.78 ~ 3.91V
4 3.92 V ~
24 Low Voltage Warning 3.62 ± 0.03V (Call)
3.50 ± 0.03V (Standby)
25 Forced shut down 3.35 ± 0.03V
Voltage
1 Li-ion Battery
26 Battery Type Standard Voltage = 3.7V
Battery full charge voltage = 4.2V
Capacity: 1000mAh
Switching-mode charger
27 Travel Charger Input : 100 ~ 240V, 50/60 Hz
Output: 5.2 V, 800 mA
2. PERFORMANCE

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3. TECHNICAL BRIEF
3.1 Transceiver (SI4205-BM, U502)
The RF parts consist of a transmitter part, a receiver part, a frequency synthesizer part, a
voltage supply part, and a VCTCXO part.
The Aero I transceiver is the integrated RF front end for multi-band GSM/GPRS digital cellular
handsets and wireless data modems. The integrated solution eliminates the IF SAW filter,
external low noise amplifier (LNAs) for three bands, transmit and RF voltage controlled oscillator
(VCO modules, and other discrete components found in conventional designs.
Figure. 3-1 RECEIVER FUNCTIONAL BLOCK DIAGRAM
ANTENNA SWITSH
TCXO
3. TECHNICAL BRIEF

(1) Receiver Part
The Aero I transceiver uses a low-IF receiver architecture which allows for the on chip
integration of the channel selection filters, eliminating the external RF image reject filters and the
IF SAW filter required in conventional super-heterodyne architectures.
A. RF front end
RF front end consists of Antenna Switch(FL500), two SAW Filters(FL401, FL402) and dual
band LNAs integrated in transceiver (U502).
The Received RF signals(GSM 925MHz ~ 960MHz, DCS 1805MHz ~ 1880MHz) are fed into
the antenna or Mobile switch.
The Antenna Switch(FL500) is used to control the Rx and Tx paths. And, the input signals
VC1 and VC2 of a FL500 are directly connected to baseband controller to switch either Tx or
Rx path on.
The logic and current is given below Table 3-1.
Table 3-1 THE LOGIC AND CURRENT
Three differential-input LNAs are integrated in SI4205. The GSM input supports the GSM 850
(824-849 MHz) or E-GSM 900 (925-960MHz) bands. The DCS input supports the DCS 1800
(1805-1880 MHz) band. The PCS input supports the PCS 1900 (1930-1990 MHz) band.
The LNA inputs are matched to the 150ߟ balanced output SAW filters through external LC
matching networks. The LNA gain is controlled with the LNAG[1:0] and LNAC[1:0] bits in
register 05h (Figure 3-2).
VC1 VC2 Current
DCS TX 0V 2.5 ~ 3.0V 10.0 mA max
GSM TX 2.5 ~ 3.0V 0V 10.0 mA max
GSM/DCS RX 0V 0V < 0.1 mA
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3. TECHNICAL BRIEF

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3. TECHNICAL BRIEF
Figure. 3-2 SI4205 RECEIVER PART
B. Intermediate frequency (IF) and Demodulation
A quadrature image-reject mixer downconverts the RF signal to a 100KHz intermediate
frequency (IF) with the RFLO from the frequency synthesizer. The RFLO frequency is
between 1737.8 to 1989.9 MHz, and is internally divided by 2 for GSM 850 and E-GSM 900
modes. The mixer output is amplified with an analog programmable gain amplifier (PGA),
which is controlled with the AGAIN[2:0] bits in register 05h (Figure3-2). The quadrature IF
signal is digitized with high resolution A/D converters (ADCs).
The ADC output is downconverted to baseband with a digital 100KHz quadrature LO signal.
Digital decimation and IIR filters perform channel selection to remove blocking and reference
interference signals. The selectivity setting (CSEL=0) or a low selectivity setting (CSEL=1).
The low selectivity filter has a flatter group channelization filter is in the baseband chip. After
channel selection, the digital output is scaled with a digital PGA, which is controlled with the
DGAIN [5:0] bits in register 05h.
The amplified digital output signal go through with DACs that drive a differential analog signal
onto the RXIP,RXIN,RXQP and RXQN pins to interface to standard analog ADC input
baseband ICs. No special processing is required in the baseband for offset compensation or
extended dynamic range.
Compared to a direct-conversion architecture, the low-IF architecture has a much greater
degree of immunity to dc offsets that can arise from RF local oscillator(RFLO) self-mixing,
2nd order distortion of blockers, and device 1/f noise.

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(2) Transmitter Part
The transmit (Tx) section consists of an I/Q baseband upconverter, and offset phase-locked
loop (OPLL) and two output buffers that can drive external power amplifiers (PA), one for the
GSM 850 (824-849 MHz) and E-GSM 900 (880-915 MHz) bands and one for the DCS 1800
(1710-1785 MHz) and PCS 1900 (1850-1910MHz) bands.
Figure. 3-3 SI4205 TRANSMITTER PART
A. IF Modulator
The baseband converter(BBC) within the GSM chipset generates I and Q baseband signals
for the Transmit vector modulator. The modulator provides more than 40dBc of carrier and
unwanted sideband rejection and produces a GMSK modulated signal. The baseband
software is able to cancel out differential DC offsets in the I/Q baseband signals caused by
imperfections in the D/A converters.
The Tx-Modulator implements a quadrature modulator. A quadrature mixer upconverts the
differential in-phase (TXIP, TXIN) and quadrature (TXQP, TXQN) signals with the IFLO to
generate a SSB IF signal that is filtered and used as the reference input to the OPLL.
The IFLO frequency is generated between 766 and 896 MHz and internally divided by 2 to
generate the quadrature LO signals for the quadrature modulator, resulting in an IF between
383 and 448 MHz. For the E-GSM 900 band, two different IFLO frequencies are required for
spur management. Therefore, the IF PLL must be programmed per channel in the E-GSM
900 band.
B. OPLL
The OPLL consists of a feedback mixer, a phase detector, a loop filter, and a fully integrated
TXVCO. The TXVCO is centered between the DCS 1800 and PCS 1900 bands, and its
output is divided by 2 for the GSM 850 and E-GSM 900 bands. The RFLO frequency is
generated between 1272 and 1483 MHz. To allow a single VCO to be used for the RFLO,
high-side injection is used for the GSM 850 and E-GSM 900 bands, and low-side injection is
used for the DCS 1800 and PCS 1900 bands. The I and Q signals are automatically swapped
when switching bands. Additionally, the SWAP bit in register 03h can be used to manually
exchange the I and Q signals.
Low-pass filters before the OPLL phase detector reduce the harmonic content of the
quadrature modulator and feedback mixer outputs. The cutoff frequency of the filters is
programmable with the FIF[3:0] bits in register 04h (Figure 3-3), and should be set to the
recommended settings detailed in the register description.
3. TECHNICAL BRIEF

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3. TECHNICAL BRIEF
(3) Frequency Synthesizer
Figure. 3-4 SI4205 FREQUENCY SYNTHESIZER PART
The Aero I transceiver integrates two complete PLLs including VCOs, varactors, resonators,
loop filters, reference and VCO dividers, and phase detectors. The RF PLL uses two
multiplexed VCOs. The RF1 VCO is used for receive mode, and the RF2 VCO is used for
transmit mode. The IF PLL is used only during transmit mode. All VCO tuning inductors are
also integrated. The IF and RF output frequencies are set by programming the N-Divider
registers, NRF1, NRF2 and NIF. Programming the N-Divider register for either RF1 or RF2
automatically selects the proper VCO. The output frequency of each PLL is as follows:
The DIV2 bit in register 31h controls a programmable divider at the XIN pin to allow either a
13 or 26 MHz reference frequency. For receive mode, the RF1 PLL phase detector update
rate ( ) should be programmed = 100 kHz for DCS 1800 or PCS 1900 bands, and = 200
kHz for GSM 850 and E-GSM 900 bands. For transmit mode, the RF2 and IF PLL phase
detector update rates are always =200 kHz.

3.2 Power Amplifier Module (SKY77325, U501)
The SKY77325 Power Amplifier Module (PAM) is designed in a low profile (1.2 mm), compact
form factor for quad-band cellular handsets comprising GSM850/900, DCS1800, and PCS1900
operation. The PAM also supports Class 12 General Packet Radio Service (GPRS) multi-slot
operation.
The module consists of separate GSM850/900 PA and DCS1800/PCS1900 PA blocks,
impedance-matching circuitry for 50Ωinput and output impedances, and a Power Amplifier
Control (PAC) block with an internal current-sense resistor. The custom BiCMOS integrated
circuit provides the internal PAC function and interface circuitry. Fabricated onto a single Gallium
Arsenide (GaAs) die, one Heterojunction Bipolar Transistor (HBT) PA block supports the
GSM850/900 bands and the other supports the DCS1800 and PCS1900 bands. Both PA blocks
share common power supply pins to distribute current. The GaAs die, the Silicon (Si) die, and
the passive components are mounted on a multi-layer laminate substrate. The assembly is
encapsulated with plastic overmold.
RF input and output ports of the SKY77325 are internally matched to a 50Ωload to reduce the
number of external components for a quad-band design. Extremely low leakage current (2.5 µA,
typical) of the dual PA module maximizes handset standby time. The SKY77325 also contains
band-select switching circuitry to select GSM (logic 0) or DCS/PCS (logic 1) as determined from
the Band Select (BS) signal. In Figure 3-5 below, the BS pin selects the PA output (DCS/PCS
OUT or GSM850/900 OUT) and the Analog Power Control (VAPC) controls the level of output
power.
VBATT and VSENSE pins connect to an internal current-sense resistor and interface to an
integrated power amplifier control (iPAC™) function, which is insensitive to variations in
temperature, power supply, process, and input power. The ENABLE input allows initial turnon of
PAM circuitry to minimize battery drain
Figure. 3-5 Functional Block Diagram
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3. TECHNICAL BRIEF

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3. TECHNICAL BRIEF
3.3 26 MHz Clock (VCTCXO, X500)
The 26 MHz clock(X500) consists of a TCXO(Temperature Compensated Crystal Oscillator)
which oscillates at a frequency of 26 MHz. It is used within the Si4205, chipset (U102, AD6535),
digital base band and MP3/AAC (U702) chipset.
Figure 3-6 VCTCXO CIRCUIT DIAGRAM
3.4 Power Supplies for RF Circuits (RF LDO, U503)
Two regulators are used for RF circuits. One is MIC5255 (U503), and the other is one port of
AD6535 (U102).
MIC5255 (U503) supplies power to transceiver (SI4205, U502). One port of AD6535 supplies
power to VCTCXO (X500). Main power (VBAT) from battery is used for PAM (SKY77325, U501)
because PAM requires high power.
Table 3-2 RF POWER SUPPLIERS
Figure 3-7 RF LDO CIRCUIT DIAGRAM
C539
2.2u
100p
X500
26MHz
GND 2
OUT
3
4VCC
VCONT 1
C528
2V75_VVCXO
R515
10K
0.1u
C540
R510
100
AFC
Supplier Voltage Powers Enabled signal
U303 (VRF) 2.85V U301, U302 CLKON
U102 (VVCX0) 2.75V X301
Battery (VBAT) 3.4~4.2V U302,U303
(1608)
(1608)
C529
4.7u
4.7u
C536
U503
MIC5255-2.85BM5
4BYP EN 3
GND 2
1
IN
5OUT
VBAT
C535
RF2.85V
22n
CLKON

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3.5 Digital Main Processor (AD6527B, U101)
3. TECHNICAL BRIEF
Universal
System
Connector
(USC)
Flash
JTAG
RADIO
AD6534
DISPLAY
Accessory
Devices
e.g
BATTERY
Serial display
(parallel)
PA Supply
Enable
DATA[15:0]
RAMCS[1:0]
SIM Serial
Interface
Enhanced Generic Serial Port A
Generic Serial Port B
Generic Serial Port D
Audio
Port
BASE
BAND
I/Q
Serial
Port
Dat
CLKIN
PWRON
RESET
OSCIN
OSCOUT
AGC
DRV - OUT Synthesizer
LNA IN
I
BSDO
BSOFS
BSDI
BSIFS
CSDO
CSDI
CSFS
ABB_INT
CLKOUT_GATE
ASDI
ASFS
BSDI
BSIFS
BSOFS
CSDI
CSDO
CSFS
MCLKEN
MCLK
RESET
VCXOEN
RAMP
RF Timing
VOICE i/f &
Buzzer
AFC
JTAG
BSDO
ASDO
ASFS
ASDI
ASDO
GPIO[ ] / IRQ
GPCS[1:0]
AUXCS[1:0]
WR
RD
HWR/UBS
LWR/LBS
DISPLAYCS[1:0]
Generic Serial
Port C
AD6527/AD6527B GSM-PROCESSOR
MicroSM“
RF Interface
Generic Serial Port D-A
Generic Serial Port D-B
ROMCS[1:0]
ADD[24:0]
Servicelight
CLKOUT
ABBRESET
VCO
32kHz
26MHz
13/
control
serial
port
Power
Management
AD6535 Audio & Baseband
Processor
VMEM
VEXT
VCC
VMMC
VINT
VDDUSB
VSIM
GND
VOSC
SPI
SIM
Application
Processor
USB Host
SRAM
8 or 16 bit
(optional)
Keypad
KEYPADCOL[7:0]
BACKLIGHT[3.0]
JTAGEN
TCK,TMS
TDI,TDO
JTAG,HSL,GPIO
USCTX/RX/CLK
KEYPADROW[7:0]
Matrix
Backlight/
Service Light
16-bit
U S C
Q In
VDDRTC
INT
USB Interface
*(AD6527B only)
Figure 3-8. SYSTEM INTERCONECTION OF AD6527B EXTERNAL INTERFACE

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3. TECHNICAL BRIEF
• AD6527B is an ADI designed processor.
• AD6527B consists of
1. Control Processor Subsystem
•32-bit ARM7TDMI Control Processor
•58.5 MHz operation at 1.7V
•On-board 16KB instruction/Data Cache
•1 Mbits of on-chip System SRAM
2. DSP Subsystem
•16-bit Fixed Point DSP Processor
•91 MIPS at 1.7V
•16K word Data and 16K word Program SRAM
•4K word Program Instruction Cache
•Architecture supports Full Rate, Enhanced Full Rate, Half Rate, and AMR Speech
Encoding/Decoding Algorithms
3. Peripheral Subsystem
•Shared on-chip peripheral and off-chip interface:
•Support for Burst and Page Mode Flash
•Support for Pseudo SRAM
•Ciphering module for GPRS supporting GAE1 and GAE2 encryption algorithms
•Parallel and Serial Display Interface
•8 x 8 Keypad Interface
•Four independent programmable backlight plus One Service Light
•1.8V and 3.0V, 64 kbps SIM interface
•Universal System Connector Interface
•Slow, Medium and Fast IrDA transceiver interface
•Enhanced Generic Serial Port
•Dedicated SPI interface
•Thumbwheel Interface
•JTAG Interface for Test and In-Circuit Emulation
4. Other
•Supports 13 MHz and 26 MHz Input Clocks
•1.8V Typical Core Operating Voltages
•204-Ball LFBGA(mini-BGA) Package
5. Applications
•GSM900/DCS1800/PCS1900/PCS850 Wireless Terminals
•GSM Phase 2+ Compliant
•GPRS Class 12 Compliant
•Multimedia Services(MMS)
•Extended Messaging System(EMS)