LG GS500 User manual

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Copyright © 2010 LG Electronics. Inc. All right reserved.
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Table Of Contents
1.INTRODUCTION.................................................5
1.1Purpose...............................................................................................5
1.2RegulatoryInformation...............................................................5
1.3Abbreviations...................................................................................7
1.4DifferencetableofGB500Model.............................................8
2.PERFORMANCE..................................................9
2.1SupportingStandard....................................................................9
2.2MainParts:Solution......................................................................9
2.3H/Wfeatures...................................................................................10
2.4HWSpec. .........................................................................................12
3.BBCIRCUITTECHNICALBRIEF........................15
3.1FunctionalBlockDiagram.........................................................15
3.2BasebandProcessorIntroduction.........................................16
3.3PowermanagementIC..............................................................31
3.4PowerON/OFF...............................................................................39
3.5SIMInterface...................................................................................40
3.6T- Flashconnector.......................................................................41
3.7Memory............................................................................................42
3.8LCDDisplay.....................................................................................43
3.9LCDback-lightillumination......................................................44
3.10Batteryvoltagemonitor..........................................................45
3.11Audio...............................................................................................45
3.12Bluetooth/FM(BC7820)...........................................................48
3.135PINInterfaceconnector........................................................50
4.RFCIRCUITTECHNICALBRIEF........................51
4.1GeneralDescription.....................................................................51
4.2GSMPart...........................................................................................54
4.3GSMPowerAmplifierModule.................................................59
5.TROUBLESHOOTING ......................................60
5.1Troubleshootingtestsetup.....................................................60
5.2Powerontrouble..........................................................................61
5.3ChargingTrouble..........................................................................64
5.4SIMDetectTrouble.......................................................................66
5.5MicroSDTrouble..........................................................................69
5.6AudioTrouble.................................................................................71
5.7MicrophoneTrouble....................................................................75
5.8CameraTrouble.............................................................................79
5.9MainLCDTrouble.........................................................................82
5.10BluetoothTrouble......................................................................84
5.11TouchSensor................................................................................89
5.12RFComponent............................................................................92
5.13RFSIGNALPATH..........................................................................93
5.14TroubleshootingofGSMPart...............................................95
5.15TroubleShootingof WCDMAPart...................................105
6.DOWNLOAD...................................................111
6.1S/Wdownloadsetup...............................................................111
6.2Downloadprogramuserguide...........................................112
7.BLOCKDIAGRAM...........................................124
8.CIRCUITDIAGRAM ........................................125
9.BGAPinMap..................................................135
10.PCBLAYOUT.................................................135
11.RF CALIBRATION .........................................149
11.1TestEquipmentSetup...........................................................149
11.2CalibrationStep.......................................................................150
12.EXPLODEDVIEW&REPLACEMENT
PARTLIST ....................................................155
12.1EXPLODEDVIEW......................................................................155
12.2ReplacementParts..................................................................157
12.3Accessory...................................................................................181

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Copyright © 2010 LG Electronics. Inc. All right reserved.
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1. INTRODUCTION
1. INTRODUCTION
Gl
G
INTRODUCTION
1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download the features
of the GS500.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,
persons other than your company’s employees, agents, subcontractors, or person working on your
company’s behalf) can result in substantial additional charges for your telecommunications services. System
users are responsible for the security of own system.
There might be risks of toll fraud associated with your telecommunications system. System users are
responsible for programming and configuring the equipment to prevent unauthorized use. LGE does not
warrant that this product is immune from the above case but will prevent unauthorized use of common
carrier telecommunication service of facilities accessed through or connected to it. LGE will not be
responsible for any charges that result from such unauthorized use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and possibly causing
harm or interruption in service to the telephone network, it should disconnect telephone service until repair
can be done. A telephone company may temporarily disconnect service as long as repair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If these
changes could reasonably be expected to affect the use of the GS500 or compatibility with the net work, the
telephone company is required to give advanced written notice to the user, allowing the user to take
appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on the GS500 must be performed only by the LGE or its authorized agent. The user
may not make any changes and/or repairs expect as specifically noted in this manual. Therefore, note that
unauthorized alternations or repair may affect the regulatory status of the system and may void any
remaining warranty.

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E. Notice of Radiated Emissions
This model complies with rules regarding radiation and radio frequency emission as defined by local
regulatory agencies. In accordance with these agencies, you may be required to provide information such as
the following to the end user.
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly different.
G. Interference and Attenuation
GS500 may interfere with sensitive laboratory equipment, medical equipment, etc. Interference from
unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices
ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the sign. Following
information is ESD handling:
• Service personnel should ground themselves by using a wrist strap when exchange system boards.
• When repairs are made to a system board, they should spread the floor with anti-static mat which is also
grounded.
• Use a suitable, grounded soldering iron.
• Keep sensitive parts in these protective packages until these are used.
• When returning system boards or parts like EEPROM to the factory, use the protective package as described.

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1. INTRODUCTION
GS500 service manual
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1.3 ABBREVIATION
For the purposes of this manual, following abbreviations apply:
APC Automatic Power Control
BB Baseband
BER Bit Error Ratio
CC-CV Constant Current – Constant Voltage
CLA Cigar Lighter Adapter
DAC Digital to Analog Converter
DCS Digital Communication System
dBm dB relative to 1 milli-watt
DSP Digital Signal Processing
EEPROM Electrical Erasable Programmable Read-Only Memory
EGPRS Enhanced General Packet Radio Service
EL Electroluminescence
ESD Electrostatic Discharge
FPCB Flexible Printed Circuit Board
GMSK Gaussian Minimum Shift Keying
GPIB General Purpose Interface Bus
GPRS General Packet Radio Service
GSM Global System for Mobile Communications
IPUI International Portable User Identity
IF Intermediate Frequency
LCD Liquid Crystal Display
LDO Low Drop Output
LED Light Emitting Diode
LGE LG Electronics
OPLL Offset Phase Locked Loop
PAM Power Amplifier Module
PCB Printed Circuit Board
PGA Programmable Gain Amplifier
PLL Phase Locked Loop
PSTN Public Switched Telephone Network
RF Radio Frequency
RLR Receiving Loudness Rating
RMS Root Mean Square

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RTC Real Time Clock
SAW Surface Acoustic Wave
SIM Subscriber Identity Module
SLR Sending Loudness Rating
SRAM Static Random Access Memory
STMR Side Tone Masking Rating
TA Travel Adapter
TDD Time Division Duplex
TDMA Time Division Multiple Access
UART Universal Asynchronous Receiver/Transmitter
VCO Voltage Controlled Oscillator
VCTCXO Voltage Control Temperature Compensated Crystal Oscillator
WAP Wireless Application Protocol
8PSK 8 Phase Shift Keying
1.4 Difference table of GB500 Model
Model Name VT RF BAND
GS500 X GSM850/EGSM/DCS/PCS , W900/W2100
GS500f X GSM850/EGSM/DCS/PCS , W850/W2100
GS500g X GSM850/EGSM/DCS/PCS , W850/W1900
GS500v O GSM850/EGSM/DCS/PCS , W900/W2100
GS500K O GSM850/EGSM/DCS/PCS , W850/W2100
GS500 service manual
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1.3 ABBREVIATION
For the purposes of this manual, following abbreviations apply:
APC Automatic Power Control
BB Baseband
BER Bit Error Ratio
CC-CV Constant Current – Constant Voltage
CLA Cigar Lighter Adapter
DAC Digital to Analog Converter
DCS Digital Communication System
dBm dB relative to 1 milli-watt
DSP Digital Signal Processing
EEPROM Electrical Erasable Programmable Read-Only Memory
EGPRS Enhanced General Packet Radio Service
EL Electroluminescence
ESD Electrostatic Discharge
FPCB Flexible Printed Circuit Board
GMSK Gaussian Minimum Shift Keying
GPIB General Purpose Interface Bus
GPRS General Packet Radio Service
GSM Global System for Mobile Communications
IPUI International Portable User Identity
IF Intermediate Frequency
LCD Liquid Crystal Display
LDO Low Drop Output
LED Light Emitting Diode
LGE LG Electronics
OPLL Offset Phase Locked Loop
PAM Power Amplifier Module
PCB Printed Circuit Board
PGA Programmable Gain Amplifier
PLL Phase Locked Loop
PSTN Public Switched Telephone Network
RF Radio Frequency
RLR Receiving Loudness Rating
RMS Root Mean Square

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2. PERFORMANCE
2.PERFORMANCE
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2. PERFORMANCE
2.1 Supporting Standard
Item Feature Comment
Supporting Standard W900/W2100
* (W850/W2100, W850/W1900)
GSM850/EGSM/DCS/PCS with seamless
handover
Phase 2+(include AMR)
SIM Toolkit : Class 3
GS500
*(GS500f / GS500g)
Frequency Range GSM850 TX : 824 - 849MHz
GSM850 RX : 869 - 894MHz
EGSM TX : 880 - 915 MHz
EGSM RX : 925 - 960 MHz
DCS TX : 1710 - 1785 MHz
DCS RX : 1805 - 1880 MHz
PCS TX : 1850 - 1910 MHz
PCS RX : 1930 - 1990 MHz
Application Standard WAP 2.0, JAVA 2.1
2.2 Main Parts : Solution
Item Part name Comment
Digital Baseband PMB8878 (Infineon)
Analog Baseband PMB8878 (Infineon)
RF chip PMB6952 (Infineon)
G
G
G

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2.3 H/W features
Item Feature Comment
Form Factor Color LCD – Bar Type
1)Capacity
Standard : Li-Ion, 900mAh
Battery
2) Packaging Type : Soft Pack
Size 107 × 52.5 × 11.5mm
Weight 92.5g With Battery
Stand-by time 227 hours @paging period 5
Talk time 170min @ Power Level 5
Charging time 2hours 20min @power OFF/900mAh
Rx sensitivity GSM850 : -105 dBm
EGSM900 : -105 dBm
DCS1800 : -105 dBm
PCS1900 : -105 dBm
GSM/
GPRS
GSM850 : 32.5 dBm
EGSM900 : 32.5 dBm
DCS1800 : 29.5 dBm
PCS1900 : 29.5 dBm
Class4 (GSM850)
Class4 (EGSM900)
Class1(DCS)
Class1(PCS)
TX output
power
EDGE GSM850 : 27 dBm
EGSM900 : 27 dBm
DCS1800 : 26 dBm
PCS1900 : 26 dBm
E2 (GSM850)
E2 (EGSM900)
E2 (DCS)
E2 (PCS)
GPRS compatibility GPRS Class 12
EDGE compatibility EDGE Class 12
Display Main LCD(3”, 240x400 WQVGA) /TFT
Built-in Camera 3 Mega pixel
ANT Main : Internal Fixed Type
System connector 5 Pin
Ear Phone Jack Φ3.5 4 Pole, Stereo
PC synchronization Yes
Speech coding FR, EFR, HR, AMR
Vibrator Built in Vibrator
Bluetooth V2.1 with A2DP
Voice Recording Yes

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Item Feature Comment
Speaker Phone mode
Support
Yes
Travel Adapter Yes
CDROM No
Stereo Headset Yes
Data Cable No
T-Flash Yes Not Equipped
G
G
G
G
G
G
G
G

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2.4 HW Spec.
2.4.1 GSM Transmitter / Receiver spec.
Item Specification
Frequency
GSM 850 TX : 824 - 849 MHz RX : 869 - 894 MHz
EGSM TX : 880 - 915 MHz RX : 925 - 960 MHz
DCS TX : 1710 - 1785 MHz RX : 1805 - 1880 MHz
PCS TX : 1850 - 1910 MHz RX : 1930 - 1990 MHz
Phase Error Rms : 5°
Peak : 20 °
Frequency Error GSM : 0.1 ppm
DCS/PCS : 0.1 ppm
EMC(Radiated Spurious Emission
Disturbance) GSM/DCS : < -28dBm
Transmitter Output power and Burst
Timing
GSM : 5dBm – 33dBm ± 3dB
DCS/PCS : 0dBm – 30dBm ± 3dB
Burst Timing <3.69us
Spectrum due to modulation out to
less than 1800kHz offset
200kHz : -36dBm
600kHz : -51dBm/-56dBm
Spectrum due to modulation out to
larger than 1800kHz offset to the
edge of the transmit band
GSM : 1800-3000kHz :< -63dBc(-46dBm)
3000kHz-6000kHz : <-65dBc(-46dBm)
6000kHz < : < -71dBc(-46dBm)
DCS : 1800-3000kHz :< -65dBc(-51dBm)
6000kHz < : < -73dBc(-51dBm)
Spectrum due to switching transient 400kHz : -19dBm/-22dBm(5/0), -23dBm
600kHz : -21dBm/-24dBm(5/0), -26dBm
Reference Sensitivity – TCH/FS Class II(RBER) : -105dBm(2.439%)
Usable receiver input level range 0.012(-15 - -40dBm)
Intermodulation rejection – Speech
channels ± 800kHz, ± 1600kHz : -98dBm/-96dBm (2.439%)
AM Suppression
TGSM : -31dBm
TDCS : -29dBm
-98dBm/-96dBm (2.439%)
Timing Advance ± 0.5T

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2.4.2 WCDMA Transmitter spec.
Item Specification
Transmit Frequency WCDMA900 : 880 MHz ~915 MHz
WCDMA2100 : 1920 ~1980 MHz
Maximum Output Power +24 dBm / 3.84 MHz, +1 / -3 dB
Frequency Error within ±0.1 PPM
Open Loop Power Control Normal Conditions : within ±9 dB,
Extreme Conditions : within ±12 dB
Minimum Transmit Power < -50 dBm /3.84 MHz
Occupied Bandwidth < 5 MHz at 3.84 Mcps (99% of power)
Adjacent Channel Leakage
Power Ratio (ACLR)
> 33 dB @ ±5 MHz,
> 43 dB @ ±10 MHz
Spurious Emissions
|f-fc| > 12.5 MHz
< -36 dBm / 1 kHz RW @ 9 kHz ≤ f < 150 kHz
< -36 dBm / 10 kHz RW @ 150 KHz ≤ f < 30 MHz
< -36 dBm / 100 kHz RW @ 30 MHz ≤ f < 1 GHz
< -30 dBm / 1 MHz RW @ 1 GHz ≤ f < 12.75 GHz
< -41 dBm / 300 kHz RW @ 1893.5 MHz < f < 1919.6 MHz
< -67 dBm / 100 kHz RW @ 925 MHz ≤ f ≤ 935 MHz
< -79 dBm / 100 kHz RW @ 935 MHz < f ≤ 960 GHz
< -71 dBm / 100 kHz RW @ 1805 MHz ≤ f ≤ 1880 MHz
Transmit Intermodulation < -31 dBc @ 5 MHz & < -41 dBc @ 10 MHz
when Interference CW Signal Level = -40 dBc
Error Vector Magnitude < 17.5 %, when Pout ≥ -20 dBm
Peak Code Domain Error < -15 dB at Pout t-20 dBm

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2.4.3 WCDMA Receiver spec.
Item Specification
Receive Frequency WCDMA900 : 925 MHz ~ 960 MHz
WCDMA2100 : 2110 ~2170 MHz
Reference Sensitivity
Level
BER < 0.001 when Îor = -106.7 dBm / 3.84 MHz
Maximum Input Level BER < 0.001 when Îor = -25 dBm / 3.84 MHz
Adjacent Channel
Selectivity
(ACS)
ACS > 33 dB where BER < 0.001 when Îor = -92.7 dBm / 3.84 MHz
& Ioac = –52 dBm / 3.84 MHz @ ±5 MHz
Blocking Characteristic BER < 0.001 when Îor = -103.7 dBm / 3.84 MHz
& Iblocking = -56 dBm / 3.84 MHz @ Fuw(offset) = ±10 MHz
or Iblocking = -44 dBm / 3.84 MHz @ Fuw(offset) = ±15 MHz
Spurious Response BER < 0.001 when Îor = -103.7 dBm / 3.84 MHz & Iblocking = -44 dBm
Intermodulation BER < 0.001 when Îor= -103.7 dBm / 3.84 MHz
& Iouw1 = -46 dBm @ Fuw1(offset) = ±10 MHz
& Iouw2 = -46 dBm / 3.84 MHz @ Fuw2(offset) = ±20 MHz
Spurious Emissions < -57 dBm / 100 kHz BW @ 9 kHz ≤ f < 1 GHz
< -47 dBm / 1 MHz BW @ 1 GHz ≤ f ≤ 12.75 GHz

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3. BB CIRCUITTECHNICAL BRIEF
3. BB CIRCUITTECHNICAL BRIEF
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3. BB Circuit Technical brief
3.1 Functional Block Diagram
[Figure 3.1] Functional Block Diagram

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3.2 Baseband Processor Introduction
[Figure 3.2] Top level block diagram of S-GOLD®3H(PMB8878)

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3.2.1 General description
S-GOLD®3H is a HSDPA/WCDMA/EDGE/GPRS/GSM system in package solution consisting of a mixed signal
baseband IC combined with a 3G coprocessor IC, providing all analog and digital functionality for a dual
mode mobile phone in a single chip.
Both ICs building up the S-GOLD®3H SiP are manufactured in infineon Technologies` 1.35V 90nm CMOS
technology to meet the ever increasing demands of the market for feature rich and high performance
terminals at low costs.
The chip will support the FR, EFR, HR and AMR-NB vocoding.
S-GOLD®3H support multi-slot operation modes HSCSD (up to class 10), GPRS for high speed data
application (up to class 12), EGPRS (up to class 12) and DTM(class11) without additional external hardware.
3.2.2 Block Description
zProcessing core
- ARM926EJ-S 32 bit processor core for controller functions. The ARM926EJ-S includes an MMU, and the
Jazelle Java extension for Java acceleration and a MOVE co-processor to accelerate Motion Estimation
algorithms with based video encoding schemes..
- TEAKLite DSP core
zARM9-Memory
- 32k Byte Boot ROM on the AHB
- 128k Byte SRAM on the AHB, flexibly usable as program or data RAM
- 32k Byte Instruction Cache
- 32k Byte Data Cache
- 8k Byte Instruction Tightly coupled Memory (I-TCM)
- 8k Byte Data tightly coupled memory (D-TCM)
zTEAKLite®-Memory
- 120k x 16bit Program ROM
- 8k x 16bit Program RAM
- 72k x 16bit Data ROM
- 48k x 16bit Data XRAM
- 5k x 16bit Data YRAM
- Incremental Redundancy(IR) Memory of 35904 words of 16bit

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zShared Memory Block
1.5K x 32bit Shared RAM(dual ported) between controller system and TEAKLite®.
zController Bus system
The processor cores and their peripherals are connected by powerful buses.
- Multi-layer AHB for connecting the ARM and the other master capable building blocks with the internal and
external memories and with the peripheral buses.
- An FPI-Bus for connecting GSM peripherals, called hereafter FPI3 bus.
- A controller FPI bus for connecting the low performance controller peripherals such as keypad
etc. called hereafter fPI2 bus.
- FPI2 and FPI3 are connected asynchronously to the AHB buses. 1 DMA controller with 8channels offloads
the controller from data transfers.
- 2 AHB Lite buses for connecting multi-media and high performance peripherals, called AHB_PER1 and
AHB_PER2 hereafter. These peripheral buses are connected to the multi-layer AHB ‘backbone’ by
asynchronous, burst capable AHB2AHB bridges which are shared between accessing masters.
- The DMA controller is enabled to access AHB_PER1 by use of its first master interface and AHB_PER2 by its
second master interface.
zTEAKLite® Bus System
- 1 TEAKLite® data bus for connecting the TEAKLite® data memory and the TEAKLite® peripherals. Also the
data bus is connected into the controller system via shared RAMs to the FPI3 bus.
- 1 TEAKLite® program bus for connecting the TEAKLite® program memory to the TEAKLite®.
zClock system
The clock system allows widely independent selection of frequencies for the essential parts of the S-
GOLD®3H. Thus power consumption and performance can be optimized for each application.
zFunctional Hardware block
- CPU and DSP Timers
- MOVE coprocessor performing motion estimation for video encoding algorithms
(H.263, MPEG-4)
- Programmable PLL with four additional phase shifters for system clock generation
- GSM Timer Module that off-loads the CPU from radio channel timing
- GMSK / 8-PSK Modulator according to GSM-standard 05.04 (5/2000)
· GMSK Modulator: gauss-filter with B*T=0.3
· EDGE Modulator: 8PSK-modulation with linearized GMSK-Pulse-Filter
- Hardware accelerators for equalizer and channel decoding.

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zShared Memory Block
1.5K x 32bit Shared RAM(dual ported) between controller system and TEAKLite®.
zController Bus system
The processor cores and their peripherals are connected by powerful buses.
- Multi-layer AHB for connecting the ARM and the other master capable building blocks with the internal and
external memories and with the peripheral buses.
- An FPI-Bus for connecting GSM peripherals, called hereafter FPI3 bus.
- A controller FPI bus for connecting the low performance controller peripherals such as keypad
etc. called hereafter fPI2 bus.
- FPI2 and FPI3 are connected asynchronously to the AHB buses. 1 DMA controller with 8channels offloads
the controller from data transfers.
- 2 AHB Lite buses for connecting multi-media and high performance peripherals, called AHB_PER1 and
AHB_PER2 hereafter. These peripheral buses are connected to the multi-layer AHB ‘backbone’ by
asynchronous, burst capable AHB2AHB bridges which are shared between accessing masters.
- The DMA controller is enabled to access AHB_PER1 by use of its first master interface and AHB_PER2 by its
second master interface.
zTEAKLite® Bus System
- 1 TEAKLite® data bus for connecting the TEAKLite® data memory and the TEAKLite® peripherals. Also the
data bus is connected into the controller system via shared RAMs to the FPI3 bus.
- 1 TEAKLite® program bus for connecting the TEAKLite® program memory to the TEAKLite®.
zClock system
The clock system allows widely independent selection of frequencies for the essential parts of the S-
GOLD®3H. Thus power consumption and performance can be optimized for each application.
zFunctional Hardware block
- CPU and DSP Timers
- MOVE coprocessor performing motion estimation for video encoding algorithms
(H.263, MPEG-4)
- Programmable PLL with four additional phase shifters for system clock generation
- GSM Timer Module that off-loads the CPU from radio channel timing
- GMSK / 8-PSK Modulator according to GSM-standard 05.04 (5/2000)
· GMSK Modulator: gauss-filter with B*T=0.3
· EDGE Modulator: 8PSK-modulation with linearized GMSK-Pulse-Filter
- Hardware accelerators for equalizer and channel decoding.
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- Incremental Redundancy memory for EDGE class 12 support
- A5/1, A5/2, A5/3 Cipher unit
- GEA1, GEA2, GEA3 Cipher Unit to support GPRS data transmission
- f8 and f9 Cipher unit
- Advanced static and dynamic power management features including TDMA-Frame
synchronous low-power mode and enhanced CPU modes(idle and sleep modes)
- 2D engine for support of image processing and 2D graphics applications. The 2D engine is tightly coupled
to the display interface. The resulting building block consisting of 2D engine and Display interface is called
Display Content Controller (DCC)
- Security crypto box supporting
· AES, DES, 3 DES
· Hash function
· RSA acceleration
· Secret Root Key (e-fuse) and Key Management
· True Random Number Generator
- Sample Rate Converter (SRC) for audio up-sampling
- Comprehensive static and dynamic Power Management
· Various frequency options during operation mode
· 32 kHz clock in standby mode
· Sleep control in standby mode
· RAMs and ROMs in power save mode during standby mode
· Additional leakage current reduction in standby mode possible by switching off for the TEAKLitre®
subsystem.
- Extensive debug support for the controller and the DSP system
· OCDS level 2+ (run control, non-intrusive program flow trace and limited data flow trace) for ARM
· OCDS level 1+ (run control, limited program flow trace) for the TEAKLite®
· Multi-core debug support
· 4 Monitor pins for important internal signals and most pad signals
· Cerberus debugging unit
- 2 General Purpose Timers with 3 32-bit timers
- Serial number
- A real time clock with alarm functions
- 2 capture/compare units with 16 channels. One channel active during sleep mode.

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- Incremental Redundancy memory for EDGE class 12 support
- A5/1, A5/2, A5/3 Cipher unit
- GEA1, GEA2, GEA3 Cipher Unit to support GPRS data transmission
- f8 and f9 Cipher unit
- Advanced static and dynamic power management features including TDMA-Frame
synchronous low-power mode and enhanced CPU modes(idle and sleep modes)
- 2D engine for support of image processing and 2D graphics applications. The 2D engine is tightly coupled
to the display interface. The resulting building block consisting of 2D engine and Display interface is called
Display Content Controller (DCC)
- Security crypto box supporting
· AES, DES, 3 DES
· Hash function
· RSA acceleration
· Secret Root Key (e-fuse) and Key Management
· True Random Number Generator
- Sample Rate Converter (SRC) for audio up-sampling
- Comprehensive static and dynamic Power Management
· Various frequency options during operation mode
· 32 kHz clock in standby mode
· Sleep control in standby mode
· RAMs and ROMs in power save mode during standby mode
· Additional leakage current reduction in standby mode possible by switching off for the TEAKLitre®
subsystem.
- Extensive debug support for the controller and the DSP system
· OCDS level 2+ (run control, non-intrusive program flow trace and limited data flow trace) for ARM
· OCDS level 1+ (run control, limited program flow trace) for the TEAKLite®
· Multi-core debug support
· 4 Monitor pins for important internal signals and most pad signals
· Cerberus debugging unit
- 2 General Purpose Timers with 3 32-bit timers
- Serial number
- A real time clock with alarm functions
- 2 capture/compare units with 16 channels. One channel active during sleep mode.
GS500 service manual
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z3G Coprocessor Subsystem
- ARM7 TRMI-S
· 240 kByte Instruction RAM
· 64 kByte Data RAM
· 8 kByte Boot ROM
- 20kByte Communication RAM
- HW accelerators for
· Transmit Path
· Inner and Outer Receiver for Release5 incl. HSDPA
3.2.3 RF Interface(T_OUT)
S-Gold® 3H uses this interface to control RF IC and Peripherals.
[Table 3.2.3-1] RF Interface Spec.
T_OUT
Resource Interconnection Description
T_OUT0 TXON_PA PAM Power on
T_OUT1 NA -
T_OUT2 ANT_SEL1 Antenna select logic
T_OUT3 HOOK_DETECT
T_OUT4 _CHG_EOC Battery end of charge control
T_OUT5 JACK_DETECT
T_OUT6 PA_MODE PAM Mode select
T_OUT7 ANT_SEL2
T_OUT8 ANT_SEL3
T_OUT9 KEY_BACK_EN
T_OUT10 DSR
T_IN0 LCD_BL_CTRL LCD backlight control
T_IN1 CHG_EN Battery charge enable

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GS500 service manual
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Only for training and service purposes snlGpG|GvG
z3G Coprocessor Subsystem
- ARM7 TRMI-S
· 240 kByte Instruction RAM
· 64 kByte Data RAM
· 8 kByte Boot ROM
- 20kByte Communication RAM
- HW accelerators for
· Transmit Path
· Inner and Outer Receiver for Release5 incl. HSDPA
3.2.3 RF Interface(T_OUT)
S-Gold® 3H uses this interface to control RF IC and Peripherals.
[Table 3.2.3-1] RF Interface Spec.
T_OUT
Resource Interconnection Description
T_OUT0 TXON_PA PAM Power on
T_OUT1 NA -
T_OUT2 ANT_SEL1 Antenna select logic
T_OUT3 HOOK_DETECT
T_OUT4 _CHG_EOC Battery end of charge control
T_OUT5 JACK_DETECT
T_OUT6 PA_MODE PAM Mode select
T_OUT7 ANT_SEL2
T_OUT8 ANT_SEL3
T_OUT9 KEY_BACK_EN
T_OUT10 DSR
T_IN0 LCD_BL_CTRL LCD backlight control
T_IN1 CHG_EN Battery charge enable

- 22 -
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GS500 service manual
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3.2.4 ADC channel
ADC block is composed of 11 external ADC channel. This block operates charging process and other related
process by reading battery voltage and other analog values.
[Table 3.2.4-1] S-Gold3 ADC channel usage
ADC channel
Resource Interconnection Description
M0 BAT_ID Battery temperature measure
M1 RF_TEMP RF block temperature measure
M2 NC
M3 NC
M4 NC
M5 N.C
M6 N.C
M7 HW revision reserved pin
M8 VBAT (divide resistor) Battery supply voltage measure
M9 N.C
M10 N.C
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