LG 50PX950 User manual

PLASMA TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : PB01B
MODEL : 50PX950 50PX950-SA
North/Latin A erica http://aic.lgservice.co
Europe/Africa http://eic.lgservice.co
Asia/Oceania http://biz.lgservice.co
Internal Use Only
Printed in Korea
P/NO : MFL66279702(1008-REV00)

- 2 - LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only or training and service purposes
CONTENTS
CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION..................................................................................................6
BLOCK DIAGRAM ...................................................................................................................14
EXPLODED VIEW ...................................................................................................................15
SVC. S EET ................................................................................................................................

- 3 - LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only or training and service purposes
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special sa ety-related characteristics. These parts are identi ied by in
the Schematic Diagram and Exploded View.
It is essential that these special sa ety parts should be replaced with the same components as recommended in this manual to
prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modi y the original design without permission o manu acturer.
General Guidance
An isolation Transformer should always be used during the
servicing o a receiver whose chassis is not isolated rom the AC
power line. Use a trans ormer o adequate power rating as this
protects the technician rom accidents resulting in personal injury
rom electrical shocks.
It will also protect the receiver and it's components rom being
damaged by accidental shorts o the circuitry that may be
inadvertently introduced during the service operation.
I any use (or Fusible Resistor) in this monitor is blown, replace it
with the speci ied.
When replacing a high wattage resistor (Oxide Metal Film
Resistor, over 1W), keep the resistor 10mm away rom PCB.
Keep wires away rom high voltage or high temperature parts.
Due to high vacuum and large sur ace area o picture tube,
extreme care should be used in handling the Picture Tube.
Do not li t the Picture tube by it's Neck.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed rom AC source, connect
an electrical jumper across the two AC plug prongs. Place the
AC switch in the on position, connect one lead o ohm-meter to
the AC plug prongs tied together and touch other ohm-meter
lead in turn to each exposed metallic parts such as antenna
terminals, phone jacks, etc.
I the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be in inite.
An other abnormality exists that must be corrected be ore the
receiver is returned to the customer.
Leakage Current ot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC
voltage measurements or each exposed metallic part. Any
voltage measured must not exceed 0.75 volt RMS which is
corresponds to 0.5mA.
In case any measurement is out o the limits speci ied, there is
possibility o shock hazard and the set must be checked and
repaired be ore it is returned to the customer.
Leakage Current ot Check circuit
1.5 Kohm/10W
To Instrument's
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
IMPORTANT SAFETY NOTICE
0.15uF

- 4 - LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserve .
Only for training an service purposes
SPECIFICATION
NOTE : Specifications an others are subject to change without notice for improvement .
1. Application Range
(1) This spec sheet is applie all of PDP TV with PB01B chassis.
2. Specification
Each part is teste as below without special appointment.
(1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 °C ± 5 °C
(2) Relative Humi ity : 65 % ± 10 %
(3) Power Voltage : Stan ar input voltage (100 V - 240 V ~ 50 / 60 Hz)
* Stan ar Voltage of each pro uct is marke by mo els
(4) Specification an performance of each parts are followe each rawing an specification by part number in accor ance with
BOM.
(5) The receiver must be operate for about 5 minutes prior to the a justment.
3. Test Method
(1) Performance : LGE TV test metho followe .
(2) Deman e other specification
Safety: UL, CSA, IEC specification, CE
EMC : FCC, ICES, IEC specification, CE
Mo el Name Market Bran
50PX950-SA Brazil LG
Mo el Name Market Appliance
50PX950-SA Brazil Safety : IEC/EN60065

- 5 - LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only or training and service purposes
4. General Specification
No Item Speci ication Model Remark
1. Receiving System 1) SBTVD / NTSC / PAL-M / PAL-N PX950
2) NTSC / PAL-M / PAL-N Analog model
2. Available Channel 1) VHF : 02~13 PX950
2) UHF : 14~69
3) DTV : 07-69 (VHF high/UHF)
4) CATV : 02~135
1) VHF : 02~13 Analog model
2) UHF : 14~69
3) CATV : 02~135
3. Input Voltage 1)AC 100 V ~ 240 V 50 / 60 Hz
4. Market BRAZIL PX950
Latin America
5. Screen Size 127 cm (50 inch) Wide(1920 X1080) 50PX950-SA
152 cm (60 inch) Wide(1920 X 1080) 60PX950-SA
6. Aspect Ratio 16:9
7. Tuning System FS
8. Module PDP50R103## (1920 X 1080) 50PX950-SA
PDP60R103## (1920 X 1080) 60PX950-SA
9. Operating Environment 1) Temp : 0 deg ~ 40 deg
2) Humidity : ~ 80 %
10. Storage Environment 1) Temp : -20 deg ~ 60 deg
2) Humidity : 0 % ~ 90 %

- 6 - LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserve .
Only for training an service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet applies to PB01B Chassis applie PDP TV
all mo els manufacture in TV factory.
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) A justment must be one in the correct or er. But it is
flexible when its factory local problem occurs.
(3) The a justment must be performe in the circumstance of
25 cC ± 5 cC of temperature an 65 % ± 10 % of relative
humi ity if there is no specific esignation.
(4) The input voltage of the receiver must keep 100 V - 240 V,
50 / 60 Hz.
(5) Before a justment, execute Heat-Run for 5 minutes.
VAfter Receive 100% Full white pattern (06CH) then
process Heat-run
(or “8. Test pattern” con ition of Ez-A just status)
VHow to make set white pattern
1) Press Power ON button of Service Remocon
2) Press ADJ button of Service remocon. Select “10.
Test pattern” an , after select “White” using
navigation button, an then you can see 100% Full
White pattern.
* In this status you can maintain Heat-Run useless any
pattern generator
* Notice: if you maintain one picture over 20 minutes
(Especially sharp istinction black with white pattern –
13Ch, or Cross hatch pattern – 09Ch) then it can
appear image stick near black level.
3. Adj stment items
3-1. PCB Assembly adj stment
(1) A just 480i Comp1
(2) A just 1080p Comp1/RGB
- If it is necessary, it can a justment at Manufacture Line
- You can see set a justment status at “9. ADJUST
CHECK” of the “In-start menu”
3-2. Set Assembly Adj stment
(1) EDID (The Exten e Display I entification Data )
(2) Color Temperature (White Balance) A justment
(3) Make sure RS-232C control
(4) Selection Factory output option
4. PCB Assembly Adj stment
4-1. Using RS-232C
- A just 3 items at 3-1 PCB assembly a justments
“ (3) A justment sequence” one after the or er.
(1) A justment protocol
(2) Necessary items before A justment items
OPattern Generator : (MSPG-925FA)
OA just 480i Comp1
(MSPG-925FA:mo el :209, pattern :65) – Comp1 Mo e
OA just 1080p Comp1
(MSPG-925FA:mo el :225 , pattern :65) – Comp1 Mo e
OA just RGB (MSPG-925FA:mo el :225 , pattern :65)
– RGB-PC Mo e
* If you want more information then see the below A justment
metho (Factory A justment)
(3) A justment sequence
Oaa 00 00: Enter the ADC A justment mo e.
Oxb 00 40: Change the mo e to Component1 (No actions)
Oa 00 10: A just 480i Comp
Oa 00 10: A just 1080p comp
Oxb 00 60: Change to RGB-PC mo e(No action)
Oa 00 10: A just 1080p RGB
Oxb 00 90: En o of A justmennt
< See ADC A justment RS232C Protocol_Ver1.0 >
Or er Comman Set response
1. Inter the aa 00 00 a 00 OK00x
A justment
mo e
2. Change the XB 00 40 b 00 OK40x (A just 480i Comp1 )
Source XB 00 60 (A just 1080p Comp1)
b 00 OK60x (A just 1080p RGB)
3. Start a 00 10
A justment
4. Return the OKx ( Success con ition )
Response NGx ( Faile con ition )
5. Rea ata ( main ) (main : component1 480i, RGB 1080p)
A justment a 00 20 00000000000000000000000007c007b006 x
ata ( main ) (main : component1 480i, RGB 1080p)
a 00 30 000000070000000000000000007c00830077x
6. Confirm a 00 99 NG 03 00x (Faile con ition)
A justment NG 03 01x (Faile con ition)
NG 03 02x (Faile con ition)
OK 03 03x (Success con ition)
7. En of a 00 90 00 OK90x
A justment

5. Factory Adjustment
PB01A : USE EXTERNAL ADC(BCM) : using instrument.
PB02A : USE NTERNAL ADC(S7) : using internal pattern.
5-1. Auto Adjust Component
480i/1080p RGB 1080p
(1) Summary : Adjustment component 480i/1080i and RGB
1080p is Gain and Black level setting at Analog
to Digital converter, and compensate the RGB
deviation
(2) Using instrument
1) Adjustment remocon, 801GF(802B, 802F, 802R) or
MSPG925FA pattern generator
( t can output 480i/1080i horizontal 100 % color bar
pattern signal, and its output level must setting
0.7 V ± 0.1 V p-p correctly)
* You must make it sure its resolution and pattern cause every
instrument can have different setting
2) Adjustment method 480i Comp1, Adjust 1080p
Comp1/RGB (Factory adjustment)
O ADC 480i Component1 adjustment -
- Check connection of Component1
- MSPG-925FA Ë Model: 209, Pattern 65
OSet Component 480i mode and 100% Horizontal
Color Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”
OADC 1080p Component1 / RGB adjustment
- Check connection both of Component1 and RGB
- MSPG-925FA Ë Model: 225, Pattern 65
OSet Component 1080p mode and 100% Horizontal
Color Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”
OAfter get each the signal, wait more a second and
enter the “ N-START” with press N-START key of
Service remocon. After then select “7. External ADC”
with navigator button and press “Enter”.
OAfter Then Press key of Service remocon “Right
Arrow(VOL+)”
OYou can see “ADC Component1 Success”
OComponent1 1080p, RGB 1080p Adjust is same
method.
OComponent 1080p Adjustment in Component1 input
mode
ORGB 1080p adjustment in RGB input mode
Of you success RGB 1080p Adjust. You can see “ADC
RGB-DTV Success”
Caution : Set Volume 0 after adjustment
5-2. se Internal ADC(S7)
- ADJ(EZ ADJUST) -> 6.ADC Calibration -> ADC
Calibration(START)
5-3. EDID(The Extended Display
Identification Data) / DDC(Display Data
Channel) download
(1) Summary
1) t is established in VESA, for communication between
PC and Monitor without order from user for building user
condition. t helps to make easily use realize “Plug and
Play” function.
2) For ED D data write, we use DDC2B protocol.
5-4. Auto Download
(1) After enter Service Mode by pushing “ADJ” key,
(2) Enter ED D D/L mode.
(3) Enter “START” by pushing “OK” key.
Caution
- Never connect HDM & D-sub Cable when the user
downloading .
- Use the proper cables below for ED D Writing.
- 7 - LGE nternal Use OnlyCopyright ©2010 LG Electronics nc. All rights reserved.
Only for training and service purposes
< Adjustment pattern : 480i / 1080p 60Hz Pattern >

* Edid data and Model option download(RS232)
5-5. Manual Download
(1) Write HDM ED D data
1) Using instruments
- Jig. (PC Serial to D-Sub connection) for PC, DDC
adjustment.
- S/W for DDC recording (ED D data write and read)
- D-sub jack
- Additional HDM cable connection Jig.
2) Preparing and setting.
- Set instruments and Jig. Like pic.5), then turn on PC
and Jig.
- Operate DDC write S/W (ED D write & read)
- t will operate in the DOS mode.
- ED D data (Model name = LG TV)
- 2010 ED D DATA CHECK SUM.
- 8 - LGE nternal Use OnlyCopyright ©2010 LG Electronics nc. All rights reserved.
Only for training and service purposes
BLOCK(0) BLOCK(1)
HD HDM 1 3B 2C
HDM 2 3B 1C
HDM 3 3B 0C
RGB A3
FHD HDM 1 3B 2C
HDM 2 3B 1C
HDM 3 3B 0C
HDM 4 3B FC
RGB A3
< For write ED D data, setting Jig and another instruments >

* See Working Guide if you want more information about ED D
communication.
5-6. Adjustment Color Temperature
(White balance)
(1) Using nstruments
1) Color Analyzer: CA-210 (CH 9)
- Using LCD color temperature, Color Analyzer (CA-
210) must use CH 9, which Matrix compensated
(White, Red, Green, Blue compensation) with CS-
2100. See the Coordination bellowed one.
2) Auto-adjustment Equipment ( t needs when Auto-
adjustment – t is availed communicate with RS-232C :
Baud rate: 115200)
3) Video Signal Generator MSPG-925F 720p, 216Gray
(Model: 217, Pattern 78)
(2) Connection Diagram (Auto Adjustment)
1) Using nner Pattern
2) Using HDM input
(3) White Balance Adjustment
- f you can’t adjust with inner pattern, then you can adjust
it using HDM pattern. You can select option at “Ez-Adjust
Menu – 7. White Balance” there items “NONE, NNER,
HDM ”. t is normally setting at inner basically. f you can’t
adjust using inner pattern you can select HDM item, and
you can adjust.
- n manual Adjust case, if you press ADJ button of service
remocon, and enter “Ez-Adjust Menu – 7. White Balance”,
then automatically inner pattern operates. ( n case of
“ nner” originally “Test-Pattern. On” will be selected in The
“Test-Pattern. On/Off”.
OConnect all cables and equipments like Pic.5)
OSet Baud Rate of RS-232C to 115200. t may set
115200 orignally.
OConnect RS-232C cable to set
OConnect HDM cable to set
V RS-232C COMMAND(Commonly apply)
- 9 - LGE nternal Use OnlyCopyright ©2010 LG Electronics nc. All rights reserved.
Only for training and service purposes
RS-232C COMMAND
[CMD D DATA] Meaning
wb 00 00 White Balance adjustment start.
wb 00 10 Start of adjust gain
( nner white pattern)
wb 00 1f End of gain adjust
wb 00 20 Start of offset adjust
( nner white pattern)
wb 00 2f End of offset adjust
wb 00 ff End of White Balance adjust
( nner pattern disappeared)
< Connection Diagram for Adjustment White balance >

O wb 00 00”: Start Auto-adjustment o white balance.
O“wb 00 10”: Start Gain Adjustment (Inner pattern)
O“jb 00 c0” :
O…
O“wb 00 1 ”: End o Adjustment
* I it needs, o set adjustment (wb 00 20-start, wb 00 2 -
end)
O“wb 00 ”: End o white balance adjustment (inner
pattern disappear)
V Adjustment Mapping in ormation
OWhen Color temperature (White balance) Adjustment
(Automatically)
- Press “Power only key” o service remocon and
operate automatically adjustment.
- Set BaudRate to 115200.
OYou must start “wb 00 00” and inish it “wb 00 ”.
OI it needs, then adjustment “O set”.
(4) White Balance Adjustment (Manual adjustment)
1) Test Equipment: CA-210
- Using PDP color temperature, Color Analyzer (CA-
210) must use CH 10, which Matrix compensated
(White, Red, Green, Blue compensation) with CS-
2100. See the Coordination bellowed one.
2) Manual adjustment sequence is like bellowed one.
- Turn to “Ez-Adjust” mode with press ADJ button o
service remocon.
- Select “10.Test Pattern” with CH+/- button and press
enter. Then set will go on Heat-run mode. Over 30
minutes set let on Heat-run mode.
- Let CA-210 to zero calibration and must has gap more
10cm rom center o PDP module when adjustment.
- Press “ADJ” button o service remocon and select
“7.White-Balance” in “Ez-Adjust” then press “G” button
o navigation key. (When press “G” button then set will
go to ull white mode)
- Adjust at three mode (Cool, Medium, Warm)
- I “cool” mode
Let B-Gain to 192 and R, G, B-Cut to 64 and then
control R, G gain adjustment High Light adjustment.
- I “Medium” and “Warm” mode Let R-Gain to 192 and
R, G, B-Cut to 64 and then control G, B gain
adjustment High Light adjustment.
- All o the three mode
Let R-Gain to 192 and R, G, B-Cut to 64 and then
control G, B gain adjustment High Light adjustment.
- With volume button (+/-) you can adjust.
- A ter all adjustment inished, with Enter (_ key) turn to
Ez-Adjust mode. Then with ADJ button, exit rom
adjustment mode
* Attachment: White Balance adjustment coordination and color
temperature.
OUsing CS-1000 Equipment.
- COOL : T=11000K, _uv=0.000, x=0.276 y=0.283
- MEDIUM : T=9300K, _uv=0.000, x=0.285 y=0.293
- WARM : T=6500K, _uv=0.000, x=0.313 y=0.329
OUsing CA-210 Equipment. (10 CH)
- Contras value : 216 Gray
- Brighness spec.
6. Test of RS-232C control.
- Press In-Start button o Service Remocon then set the “4.Baud
Rate” to 115200. Then check RS-232C control and
7. Selection of Country option.
- Selection o country option is allowed only North American
model (Not allowed Korean model). It is selection o Country
about Rating and Time Zone.
(1) Models: All models which PB82C Chassis (See the irst
page.)
(2) Press “In-Start” button o Service Remocon, then enter the
“Option” Menu with “PIP CH-“ Button
(3) Select one o these three (USA, CANADA, MEXICO)
de ends on its market using “Vol. +/-“button.
Caution : Don’t push The INSTOP KEY a ter completing the
unction inspection
Caution : Inspection only PAL M
- 10 - LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only or training and service purposes
Color Test Color Coordination
temperature Equipment x y
COOL CA-210 0.276±0.002 0.283±0.002
MEDIUM CA-210 0.285±0.002 0.293±0.002
WARM CA-210 0.313±0.002 0.329±0.002
Item Min Typ Max Unit Remark
White 49 60 - cd/m - 100%Window White
average Pattern
brightness - 100IRE(255Gray)
- Picture: Vivid(Medium )
Brightness -20 +20 % - 85IRE(216Gray) 100%
uni ormity Window White Pattern
- Picture: Vivid(Medium)
RS-232C COMMAND CENTER
[CMD ID DATA] MIN (DEFAULT) MAX
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 184 192 192 192
G Gain jh Jb je 00 187 183 159 192
B Gain ji Jc j 00 192 161 95 192
R Cut 64 64 64 127
G Cut 64 64 64 127
B Cut 64 64 64 127

8. MAC Address and ESN Key Write
8-1. Equipment & Condition
- Play file: Serial.exe
- MAC Address edit
- Input Start / End MAC address
8-2. Down oad method
(1) Communi ation Prot onne tion
Conne t: PCBA Jig-> RS-232C Port== PC-> RS-232C Port
(2) MAC Address Download
- Com 1,2,3,4 and 115200(Baudrate)
- Port onne tion button li k(1)
- Load button li k(2) for MAC Address write.
- Start MAC Address write button(3)
- Che k the OK Or NG
8-3. Equipment & Condition
- Ea h other onne tion to LAN Port of IP Hub and Jig
8-4. MAC Address
- Push “IN-START” Key in servi e remote ontroller.
- Che k ESN KEY only north Ameri a model
8-5. LAN PORT INSPECTION(PING TEST)
- LAN Port onne tion with PCB
- Network setting at MENU Mode of TV
- setting automati IP
- Setting state onfirmation
-> If automati setting is finished, you onfirm IP and MAC
Address.
- remove LAN CABLE
9. GND and ESD Testing
9-1. Prepare GND and ESD Testing.
- Che k the onne tion between set and power ord
9-2. Operate GND and ESD auto-test.
(1) Fully onne ted (Between set and power ord) set enter
the Auto-test sequen e.
(2) Conne t D-Ja k AV ja k test equipment.
(3) Turn on Auto- ontroller(GWS103-4)
(4) Start Auto GND test.
(5) If its result is NG, then noti e with buzzer.
(6) If its result is OK, then automati ally it turns to ESD Test.
(7) Operate ESD test
(8) If its result is NG, then noti e with buzzer.
(9) If its result is OK, then pro ess next steps. Noti e it with
Good lamp and STOPER Down.
9-3. Check Items.
(1) Test Voltage
GND: 1.5KV/min at 100mA
Signal: 3KV/min at 100mA
(2) Test time: just 1 se ond.
(3) Test point
GND test: Test between Power ord GND and Signal able
metal GND.
ESD test: Test between Power ord GND and Live and
neutral.
(4) Leakage urrent: Set to 0.5mA(rms)
- 11 - LGE Internal Use OnlyCopyright ©2010 LG Ele troni s In . All rights reserved.
Only for training and servi e purposes

10. POWER PCB Ass’y Voltage
Adjustment
(Va/Vs Voltage Adjustment)
(1)Test equipment : D.M.M 1EA
(2) Connection Diagram for Measuring : refer to fig.1
10-1. Adjustment met od
(1) Vs adjustment (refer fig.1)
1) Connect terminal of D.M.M. to Vs pin of
P812(42”:P811), connect -terminal to GND pin of
P812(42”:P811)
2) After turning VR901, voltage of D.M.M adjustment as
same as Vs voltage which on label of panel left/top (
deviation ; ±0.5V)
(2) Va adjustment (refer fig.1)
1) After receiving 100% Full White Pattern, HEAT RUN.
2) Connect terminal of D.M.M. to Va pin of
P812(42”:P811), connect -terminal to GND pin of
P811(42”:P812).
3) After turning VR502,voltage of D.M.M adjustment as
same as Va voltage which on label of panel left/top
(deviation; ±0.5V)
11. Default Service option.
11-1. ADC-Set.
VR-Gain adjustment Value (default 128)
VG-Gain adjustment Value (default 128)
VB-Gain adjustment Value (default 128)
VR-Offset adjustment Value (default 128)
VG-Offset adjustment Value (default 128)
VB-Offset adjustment Value (default 128)
11-2. W ite balance. Value.
11-3. Temperature T res old
VThreshold Down Low 20
VThreshold Up Low 23
VThreshold Down High 70
VThreshold Up High 75
12. USB DOWNLOAD
(*.epk file download)
VPut the USB Stick to the USB socket
VPress Menu key, and move OPTION
VPress “FAV” Press 7 times.
- 12 - LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
< fig.1 : 50 FHD Power PCB Assy Voltage adjustment >
CENTER (DEFAULT)
Cool Mid Warm
R Gain 192 192 192
G Gain 192 192 192
B Gain 192 192 192
R Cut 64 64 64
G Cut 64 64 64
B Cut 64 64 64

VSele t download file (epk file)
VAfter download is finished, remove the USB sti k.
V Press “IN-START” key of ADJ remote ontrol, he k the
S/W version.
CAUTION
- DO NOT REMOVE USB MEMORY CARD FROM USB PORT
WHEN YOU FIND BELOW DESCRIPTION
- " Do not remove the memory ard from the port! "
- 13 - LGE Internal Use OnlyCopyright ©2010 LG Ele troni s In . All rights reserved.
Only for training and servi e purposes

- 14 - LGE Internal Use OnlyCopyright ©2010 LG Ele troni s In . All rights reserved.
Only for training and servi e purposes
BLOCK DIAGRAM

- 15 - LGE Internal Use Only
EXPLODED VIEW
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
305
207
203
202
303
602
501
400
208
580
300
120
200
209
601
520 604
204
201
206
205
240
301
302
304
590
560
521
900
910
310 570
Except LGEAZ
any electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
A10 A9
LV1
A12
A22 A7
A21
A2 A13
LV2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BCM GPIO/NEC MICOM/FLASH/SYS EEPROM
08/10/28
EAX63347201
NAND_DATA[0]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[4]
NAND_DATA[5]
NAND_DATA[7]
NAND_DATA[6]NAND_DATA[6]
NAND_DATA[1]NAND_DATA[1]
NAND_DATA[5]
NAND_DATA[2]
NAND_DATA[6]
NAND_DATA[3]
NAND_DATA[0]
NAND_DATA[7]
NAND_DATA[4]
NAND_DATA[1]
NAND_DATA[1]
NAND_DATA[5]
NAND_DATA[4]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[6]
NAND_DATA[0]
NAND_DATA[7]
WIRELESS_DL_RX
WIRELESS_DL_TX
D3.3V
D3.3V
NAND_DATA[0-7]
D3.3V
NAND_ALE
NAND_CLE R63
2.7K
R41 2.7K
R39 2.7K
READY
R57 2.7K
READY
R56 2.7K
READY
R40 2.7K
READY
R45 2.7K
READY
R42 2.7K
R44 2.7K
R43 2.7K
READY
C10 0.1uF
C13
0.1uF
NAND_CLE
NAND_RB
D3.3V
NAND_DATA[0-7]
NAND_ALE
NAND_CE
D3.3V
NAND_RE
C12
10uF 6.3V
D3.3V
NAND_WE
R14 4.7K
R23 0
SW10
SKHMPWE010
12
4 3
5
R22 10K
SYS_RESET
R19 0
READY
D3.3V D3.3V
IC103
KIA7029AF
2
G
3O 1
I
D3.3V
R17 10K
READY
SOC_RESET
SUB_SDA
R1170
R104 10K
+3.3V_NEC_ST
EDID_WP
NEC_ISP_RXD
NEC_RXD
C21
0.1uF
16V
R156
100K
RL_ON
IC701
UPD78F0513AGA-GAM-AX
1
P60/SCL0
2
P61/SDA0
3
P62/EXSCL0
4
P63
5
P33/TI51/TO51/INTP4
6
P75
7
P74
8
P73/KR3
9
P72/KR2
10
P71/KR1
11
P70/KR0
12
P32/INTP3/OCD1B
13
P31/INTP2/OCD1A
14
P30/INTP1
15
P17/TI50/TO50
16
P16/TOH1/INTP5
17
P15/TOH0
18
P14/RXD6
19
P13/TXD6
20
P12/SO10
21
P11/SL10/RXD0
22
P10/SCK10/TXD0
23
AVREF
24
AVSS
25 ANI7/P27
26 ANI6/P26
27 ANI5/P25
28 ANI4/P24
29 ANI3/P23
30 ANI2/P22
31 ANI1/P21
32 P20/ANI0
33 P130
34 P01/TI010/TO00
35 P00/TI000
36 P140/PCL/INTP6
37 P120/INTP0/EXLVI 38 P41 39 P40 40 RESET 41 P124/XT2/EXCLKS 42 P123/XT1 43 FLMD0 44 P122/X2/EXCLK/OCD0B 45 P121/X1/OCD0A 46 REGC 47 VSS 48 VDD
R109 22
C19
0.1uF
5V_ON
R1190
KEY1
+3.3V_NEC_ST
+3.3V_NEC_ST
C24
0.1uF
16V
FLMD0
FLMD0
001:F5;001:H5
AC_DET
MODEL1_OPT_2
R161 10K
R111 0
RESET_NEC 001:F4
LED_RED R16922
MODEL1_OPT_0
R173 22
LED_BREATHING
R170 22
1.2V_1.8V_EN
R112 4.7K
R116 22
R83
47K
1/10W 5%
OCD1B
R166 0
NEC_ISP_TXD
R163 22
R113 4.7K
R115 22
R82
10K
R168 0
R107 10K
X11
32.768KHz
TXC
C20
0.1uF
ERROR_DET KEY1
NEC_TXD
R162 22
OCD1B
MODEL1_OPT_3
IR_NEC
R171 0
LED_WHITE R110 0
RESET_NEC
R160 0
SOC_RESET
NEC_ISP_RXD
R114 0
R120 0
R172 22
R167 0
HDMI_CEC
MODEL1_OPT_1
SUB_SCL
KEY2
+3.3V_NEC_ST
NEC_ISP_TXD
+3.3V_NEC_ST
WIRELESS_PWR_EN
R108 22
D3.3V
FLMD0
P11
12505WS-12A00
1
2
3
4
5
6
7
8
9
10
11
12
13
WIRELESS_DETECT
R32 10K
PK50/PK90
R38 10K
PK50/PK70
R29 100
MODEL1_OPT_2
R37 10K
PK90
R35 10K
READY
DISP_EN
AMP_RESET_N
+3.3V_NEC_ST
MODEL1_OPT_1
MODEL1_OPT_0
R34 10K
READY
MODEL1_OPT_3
R31 10K
PK70
R30 100
R36 10K
READY
R33 10K
READY
R26 10K NEC_ISP_RXD
OCD1B
R25 10K
R28 10K NEC_ISP_TXD
+3.3V_NEC_ST
R27 10K
D3.3V
SIDEAV_DET
FE_TS_VAL
TUNER_RESET
MODEL_OPT_5
MODEL_OPT_1
BCM_TX
MODEL_OPT_3
AUD_MASTER_CLK
SDA3_3.3V
DDC_SCL
R138 22
SCL1_3.3V
NAND_DATA[0-7]
SCL0_3.3V
NAND_CE
DDC_SDA
D3.3V
R102 22
R130 100
NAND_ALE
/RST_HUB
NAND_WE
R129 100
SDA2_3.3V
R136 0
RF_BOOSTER
SDA1_3.3V
R103 22
BT_RESET
SCL2_3.3V
R132 0
COMP1_SW
D3.3V
SCL3_3.3V
R84 22
DSUB_DET
EPHY_LINK
R89 22
NAND_RE
NAND_RB
NAND_CLE
EPHY_ACTIVE_Y
R92 100
MODEL_OPT_2
MODEL_OPT_0
SDA0_3.3V
R121 22
R78
33
BCM_RX
MODEL_OPT_4
X10
10MHz
C18
12pF
C17
12pF
R74 1K R70 1K
READY
R73 1K
READY
R53 100
D3.3V
MODEL_OPT_1
R64 1K
MODEL_OPT_4
R55 100 MODEL_OPT_2
R59 1K
READY
R65 1K
R54 100
MODEL_OPT_3
R68 1K
R71 1K
READY
R66 1K
MODEL_OPT_5
BT_ON/OFF
R60 1K
READY
R72 1K
READY
R69 1K
R67 100
MODEL_OPT_0
OCD1A
OCD1A
OCD1A
R81
10K
WIRELESS_DL_TX
WIRELESS_DL_RX
R13
0
READY
VREG_CTR
SDA1_3.3V SCL1_3.3V
RESET
SCL3_3.3V
SDA3_3.3V
R49
2.7K
READY
R46
2.7K
R47
2.7K
R50
2.7K
READY
R62
2.7K
R61
2.7K
R48
2.7K
R51
2.7K
R52
2.7K
READY
R12 10K
R153
2.2K
R152
2.2K
R151
4.7K
READY
R150
4.7K READY
R149
4.7K
R148
4.7K
P10
12505WS-06A00
1
2
3
4
5
6
7
MOD_ROM_TX
MOD_ROM_RX
R10 2.7K
R77
2.7K
R80 2.7K R79 2.7K
R11 2.7K
C11
22uF
16V C15
0.1uF
16V
R24 0
READY
R175
4.7K READY
R174
4.7K READY
R124 0
R137 0
R123 0
R58 2.7K
READY
R18 910
R15
330
WATCH_DOG_RESET
COMP2_SW
COMPOSITE1_SW
R155
4.7K
R154
4.7K
R157 3K
R118100
R164100
R165 0
RF_SWITCH_CTL
HDMI_HPD_4 008:R29
+3.3V_EN
R176 0
R177 0
R20 10
R21 10
HDMI_HPD_1 008:H29
HDMI_HPD_3 008:H10
HDMI_HPD_2 008:H20
R122 1K
R125 1K
R127 1K
R95 1K
HDMI_POWER_1
HDMI_POWER_2
HDMI_POWER_3
HDMI_POWER_4
FLASH_WP Q10
KRC103S
FLASH_WP E
B
C
FLASH_WP
R131 0
R87 0READY
R94 0
R86 0
R88 0
READY
R96 0
R97 0
R98 0
R139 0
R147 100
R178 0
R179 100
IC500
NAND04GW3B2DN6E
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VDD_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
AL
3
NC_3
6
NC_6
16
CL
15
NC_10
14
NC_9
13
VSS_1
12
VDD_1
11
NC_8
10
NC_7
9
E
8
R
7
RB
4
NC_4
5
NC_5
25 NC_16 24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
W
DEMOD_RESET
R180 0
READY
R181 0
READY
R158
120K
1/16W
1%
R159 100K 1/16W 1%
C22
22pF
50VTXC
C23
27pF
50V
TXC
C25
0.1uF
R182
4.7M
1/8W
5%
R183 0
R184 0
R185 0
R186 0
FLASH_WP
C14
0.1uF
R187 0
X11-*1
32.768KHz
KDS
C22-*1
15pF
50V
KDS
C23-*1
15pF
50V
KDS
IC14
M24C16-WMN6T
0IMMRSG036B
3
NC/E2 E2
2
NC/E1 E1
4
VSS GND
1
NC/E0 NC
5SDA SDA
6SCL SCL
7WC
WC
8VCC VCC
IC102
M24M01-HRMN6TP
3
E2
2
E1
4
VSS
1
NC
5SDA
6SCL
7WP
8VCC
/3D_FPGA_RESET
L/R_DETECT
R190 0
R191 0
R192 0
READY
R193 0
READY
IC100
LGE3556CP (C0 3D PIP)
GPIO_00 N26
GPIO_01 L26
GPIO_02 N25
GPIO_03 L25
GPIO_04 K27
GPIO_05 K28
GPIO_06 K24
GPIO_07 K26
GPIO_08 K25
GPIO_09 AA27
GPIO_10 AA28
GPIO_11 AA26
GPIO_12 L1
GPIO_13 L3
GPIO_14 L2
GPIO_15 Y25
GPIO_16 Y26
GPIO_17 M27
GPIO_18 AA25
GPIO_19 R25
GPIO_20 N28
GPIO_21 N27
GPIO_22 AH18
GPIO_23 P23
GPIO_24 M23
GPIO_25 AD19
GPIO_26 AE19
GPIO_27 M4
GPIO_28 M5
GPIO_29 L23
GPIO_30 Y28
GPIO_31 Y27
GPIO_32 G2
GPIO_33 G3
GPIO_34 G5
GPIO_35 G6
GPIO_36 G4
GPIO_37 L24
GPIO_38 P25
GPIO_39 L5
GPIO_40 K4
GPIO_41 K1
GPIO_42 L27
GPIO_43 M26
GPIO_44 N23
GPIO_45 R28
GPIO_46 R27
GPIO_47 R26
GPIO_48 P28
GPIO_49 P27
GPIO_50 K6
GPIO_51 K5
GPIO_52 P26
GPIO_53 M3
GPIO_54 M2
GPIO_55 M1
GPIO_56 L4
GPIO_57 L6
SGPIO_00 W27
SGPIO_01 W28
SGPIO_02 W26
SGPIO_03 W25
SGPIO_04 J2
SGPIO_05 J1
SGPIO_06 K3
SGPIO_07 K2
EBI_ADDR3
J23
EBI_ADDR4
J24
EBI_ADDR2
H25
EBI_ADDR1
H24
EBI_ADDR0
H23
EBI_ADDR5
J25
EBI_ADDR6
F26
EBI_ADDR8
H28
EBI_ADDR9
J26
EBI_ADDR13
H27
EBI_ADDR12
G26
EBI_ADDR11
J27
EBI_ADDR10
J28
EBI_ADDR7
F27
EBI_TAB
G24
EBI_WE1B
H26
EBI_CLK_IN
G27
EBI_CLK_OUT
G28
EBI_RWB
K23
EBI_CS0B
G25
NAND_DATA0
U24
NAND_DATA1
T26
NAND_DATA2
T27
NAND_DATA3
U26
NAND_DATA4
U27
NAND_DATA5
V26
NAND_DATA6
V27
NAND_DATA7
V28
NAND_CS0B
T24
NAND_ALE
R23
NAND_REB
T23
NAND_CLE
T25
NAND_WEB
R24
NAND_RBB
U25
SF_MISO
W24
SF_MOSI
U23
SF_SCK
V23
SF_CSB
V24
E_TDO
R195 0
FPGA_D/L
E_TCK
E_TMS
E_TDI
R199 0
R196
0
SYSTEM EEPROM
Boot Strap
1 13
NAND_IO[0] : Flash Select (1)
0 : Boot From Serial Flash
1 : Boot From NAND Flash
NAND_IO[1] : NAND Block 0 Write (0)
0 : Enable Block 0 Write
1 : Disable Block 0 Write
NAND_IO[3:2] : NAND ECC (1,0)
00 : No ECC
01 : 1 ECC Bit
10 : 4 ECC Bit
11 : 8 ECC Bit
NAND_IO[4] : CPU Endian (0)
0 : Little Endian
1 : Big Endian
NAND_IO[6:5] : Xtal Bias Control (1,0)
00 : 1.2mA
01 : 1.8mA
10 : 2.4mA (Recommand)
11 : 3.0mA
NAND_IO[7] : MIPS Frequency (0)
0 : 405MHz
1 : 378MHz
NAND_ALE : I2C Level (0)
0 : 3.3V Switching
1 : 5V Switching
NAND_CLE
0 : Enable D2CDIFF AC (Dns)
1 : Disable D2CDIFF AC
Debugging for AVC
BCM REVIEW
NAND FLASH MEMORY 4G BIT FOR BBTV
Open Drain
RESET
FOR JDEG
ISP Port for SUB MICOM
NEC SUB MICOM
CHECK PIN!!
PIN NAME
MICOM MODEL OPTION
MODEL_OPT_0
PK50/PK90
30
8
MODEL OPTION
PK70
MODEL_OPT_3
HIGH
11
MODEL_OPT_2
MODEL_OPT_1
PK90 PK50/PK70
PIN NO. LOW
31
NEC CONFIGURATION
* I2C_0 : TUNER
* I2C_1 : HDMI MUX, DEMOD, WIERLESS-JACK
* I2C_2 : NEC, AMP, (NVRAM)
* I2C_3 : SYSYEM EEPROM, MODULE
* I2C MAP
G19
MODEL_OPT_3
F7
B6
PIN NAME
MODEL_OPT_1
HD
PIN NO.
MODEL OPTION
MODEL_OPT_5
E18
LOWHIGH
C5
MODEL OPTION
FHD
MODEL_OPT_2
MODEL_OPT_4
MODEL_OPT_0
D18
A8’h‘
NOT USE
NOT USE
DDR 512MB
NOT USE
120KOhm 1%
100KOhm 1%
0
MODEL_OPT_3
0
RED ONLY
1
MODEL_OPT_0
01
ADD BREATHINGRED & WHITE
0
DDR 256MB
LOW
HIGH
HIGH
chassis option
OPT 1
LOW
LOW
OPT 5
LOW
HIGH
HIGH
BRAZIL
EURO
AUSTRALIA
replacement micom eeprom p/n : EAN61146201
replacement nvram p/n : EAN61086701
READY
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BCM AUDIO/LVDS
08/10/27
EAX63347201
Q200
2N7002(F)
G
D S
R251
22
R244
22
D3.3V
R241
0
R246 4.7K R245 4.7K
Q201
2N7002(F)
G
D S
R253 4.7K
R254
0
R256
22
R255 4.7K
D3.3V
R252
22
C224
0.1uF
16V
L201
BLM18PG121SN1D
A1.2V
EPHY_RDN
54MHz_XTAL_N
54MHz_XTAL_N 002:H1
C221
0.1uF
C252
0.1uF
C223
0.1uF
R213
3.9K
C202
100pF
D3.3V
A3.3V
EPHY_TDP
L208
BLM18PG121SN1D
A2.5V
C226 0.1uF
EPHY_TDN
C251
10uF
READY
D3.3V
C265 0.1uF
L203
BLM18PG121SN1D
R248
22
A3.3V
R250
22
C229
0.1uF
C222
0.01uF
EPHY_RDP
C220
0.1uF
A2.5V
R218
1K
P200
TJC2508-4A
1
2
3
4
C219
0.1uF
C268
12pF
C232
0.1uF
C255
0.1uF
R214
120
A2.5V
R220
390
READY
A1.2V
A2.5V
L205
BLM18PG121SN1D
C253
0.1uF
54MHz_XTAL_P 002:H1
A2.5V
R212 560
C250
10uF
54MHz_XTAL_P
L202
BLM18PG121SN1D
A1.2V
R200 1.5K
C225 0.1uF
FE_TS_CLK
A1.2V
D3.3V
C269
12pF
FE_TS_SYN
L210
1008LS-272XJLC
R217
240
A2.5V
A1.2V
C227 0.1uF
R211 1.5K
L206
BLM18PG121SN1D
D3.3V
X200
54MHz21
3
C267
33pF
R249 604
C230 0.1uF
FE_TS_SERIAL
C262
0.1uF
L204
BLM18PG121SN1D
C263 0.1uF
SYS_RESET 001:D3
A1.2V
C249
0.1uF
A1.2V
C261
10uF
L209
BLM18PG121SN1D
C260
0.1uF
A2.5V
A1.2V
C259
0.1uF
A1.2V
L207
BLM18PG121SN1D
C257
0.1uF
JTAG_TMS
/JTAG_TRST
JTAG_TCLK
JTAG_TDO
JTAG_TDI
DISP_EN
P202
TF05-51S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
MOD_ROM_TX
R242100
MOD_ROM_RX
R243
27K
PC_SER_CLK
PC_SER_DATA
LVDS_TX_1_DATA1_N
LVDS_TX_0_DATA3_N
LVDS_TX_1_DATA2_P
LVDS_TX_0_CLK_P
LVDS_TX_0_DATA2_P
LVDS_TX_1_DATA4_N
LVDS_TX_1_DATA1_P
LVDS_TX_0_DATA2_N
LVDS_TX_1_DATA4_P
LVDS_TX_0_CLK_N
LVDS_TX_0_DATA1_P
LVDS_TX_1_CLK_P
LVDS_TX_1_DATA3_N
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA0_P
LVDS_TX_0_DATA0_N
LVDS_TX_1_DATA0_N
LVDS_TX_1_CLK_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA2_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA3_P
LVDS_TX_1_DATA3_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA3_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA2_N
LVDS_TX_0_DATA0_N
LVDS_TX_1_CLK_N
LVDS_TX_0_DATA2_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA3_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA4_P
LVDS_TX_1_DATA2_P
LVDS_TX_1_CLK_P
LVDS_TX_0_CLK_P
LVDS_TX_1_DATA4_N
LVDS_TX_0_CLK_N
LVDS_TX_0_DATA1_N
LVDS_TX_1_DATA1_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA0_P
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA0_N
SCL3_3.3V
001:B3;001:I4
SDA3_3.3V
001:B3;001:I4
USB_DP
BT_DP
BT_DM
USB_DM
R232 1K
D3.3V
JTAG_TDO
002:D4
R234 1K
RESET
001:C3
JTAG_TMS
002:D4
R235 1K
JTAG_TCLK
002:D4
JTAG_TDI
002:D4
/JTAG_TRST
002:D4
P201
YFDW254-14S
READY
14 VIO
9
TCK
4GND
13
DINT
8GND
3
TDI
12 NC
7
TMS
2GND
11
nRST
6GND
1
nTRST
10 GND
5
TDO
R237
1K
R233 1K
R240 1K
R238 1K R236 1K
READY
R230
2.7K
READY
R223
2.7K
R216 2.7K
PK950
WATCH_DOG_RESET
001:D3
R224
2.7K
READY
R231
2.7K
R207 49.9
C214 0.15uF
R202 49.9
COMP_R_IN_2
010:Q23
C203 0.015uF
R206 49.9
R204 49.9
R209 49.9
C241 0.047uF
C211 0.015uF
C236 0.047uF
R203 49.9 C207 0.015uF
AV_R_IN_1
010:K25 C213 0.15uF
AV1_INCM
002:D5
C206 0.015uF
R201 49.9
AV_L_IN_1
010:K24
C217 0.15uF
R205 49.9
C215 0.15uF
C242 0.047uF
R208 49.9
C239 0.047uF C237 0.047uF C243 0.047uF C235 0.047uF C240 0.047uF
SIDE_INCM
002:D5
PC_INCM
002:D6
R210 49.9
C238 0.047uF
C210 0.015uF
COMP_L_IN_2
010:Q22
COMP2_INCM
002:D6
C204 0.015uF
C205 0.015uF
COMP1_INCM
002:D5
C216 0.15uF
C209 0.015uF
C234 0.047uF
C212 0.015uF
C208 0.015uF
SIDE_LIN
PC_L_IN
COMP_L_IN_1
PC_R_IN
COMP_R_IN_1
SIDE_RIN
TP213
TP211
TP212
SIDE_INCM
R225
5.1
R229
5.1
R227
5.1
R226
5.1
R228
5.1
COMP1_INCM
AV1_INCM
PC_INCM
TP214
COMP2_INCM
TP210
R2212.7K
R2222.7K
D3.3V
R239
3.3K
R247
3.3K
C200
4.7uF
C201
4.7uF
C228 4.7uF
C231
4.7uF
C218
4.7uF
C233
4.7uF
C258
4.7uF
C264
4.7uF C254
4.7uF
C256
4.7uF
C266
4.7uF
C246 0.47uF C248 0.47uF C247 0.47uF C244 0.47uF C245 0.47uF
L200
BLM18PG121SN1D R219
2.7K
USB1_CTL
USB1_OCD
R1227
0
PK550
3D_SYNC_OUT
L/R_DETECT
R257 0
/3D_FPGA_RESET
L211
CB4532UK121E
EAM38058401
P_+5V
R25822
READY
R25922
READY
LGE3556CP (C0 3D PIP)
IC100
PKT0_CLK
D23
PKT0_DATA
C24
PKT0_SYNC
B26
RMX0_CLK
A25
RMX0_DATA
B25
RMX0_SYNC
A26
POD2CHIP_MCLKI
G23
POD2CHIP_MDI0
D25
POD2CHIP_MDI1
D24
POD2CHIP_MDI2
C25
POD2CHIP_MDI3
E27
POD2CHIP_MDI4
E26
POD2CHIP_MDI5
D28
POD2CHIP_MDI6
D27
POD2CHIP_MDI7
D26
POD2CHIP_MISTRT
E23
POD2CHIP_MIVAL
E24
CHIP2POD_MCLKO
F25
CHIP2POD_MDO0
C27
CHIP2POD_MDO1
C26
CHIP2POD_MDO2
B28
CHIP2POD_MDO3
B27
CHIP2POD_MDO4
A27
CHIP2POD_MDO5
F24
CHIP2POD_MDO6
F23
CHIP2POD_MDO7
E25
CHIP2POD_MOSTRT
C28
CHIP2POD_MOVAL
A28
VDAC_AVDD2P5
AC18
VDAC_AVDD1P2
AF20
VDAC_AVDD3P3_1
AG20
VDAC_AVDD3P3_2
AG21
VDAC_AVSS_1
AF19
VDAC_AVSS_2
AD20
VDAC_AVSS_3
AE20
VDAC_RBIAS
AH22
VDAC_1
AH20
VDAC_2
AG19
VDAC_VREG
AH21
BSC_S_SCL
M25
BSC_S_SDA
M24
USB_AVSS_1
R6
USB_AVSS_2
T6
USB_AVSS_3
R7
USB_AVSS_4
T7
USB_AVSS_5
T8
USB_AVDD1P2
R3
USB_AVDD1P2PLL
U3
USB_AVDD2P5
T4
USB_AVDD2P5REF
T3
USB_AVDD3P3
R4
USB_RREF
U4
USB_DM1
V1
USB_DP1
V2
USB_DM2
U1
USB_DP2
U2
USB_MONCDR
T5
USB_MONPLL
R5
USB_PWRFLT_1
R1
USB_PWRFLT_2
R2
USB_PWRON_1
T2
USB_PWRON_2
T1
EPHY_VREF
P6
EPHY_RDAC
P5
EPHY_RDN
P3
EPHY_RDP
P2
EPHY_TDN
N3
EPHY_TDP
N2
EPHY_AVDD1P2
P1
EPHY_AVDD2P5
P4
EPHY_PLL_VDD1P2
N4
EPHY_AGND_1
N1
EPHY_AGND_2
N5
EPHY_AGND_3
P7
AUDMX_LEFT1
AE6
AUDMX_RIGHT1
AD7
AUDMX_INCM1
AF6
AUDMX_LEFT2
AH4
AUDMX_RIGHT2
AG5
AUDMX_INCM2
AG4
AUDMX_LEFT3
AG6
AUDMX_RIGHT3
AF7
AUDMX_INCM3
AE7
AUDMX_LEFT4
AH5
AUDMX_RIGHT4
AG7
AUDMX_INCM4
AH6
AUDMX_LEFT5
AD8
AUDMX_RIGHT5
AF8
AUDMX_INCM5
AE8
AUDMX_LEFT6
AH7
AUDMX_RIGHT6
AH8
AUDMX_INCM6
AG8
AUDMX_AVSS_1
AF5
AUDMX_AVSS_2
AB9
AUDMX_AVSS_3
AA10
AUDMX_AVSS_4
AB10
AUDMX_AVSS_5
AA11
AUDMX_AVSS_6
AB11
AUDMX_LDO_CAP
AC8
AUDMX_AVDD2P5
AE5
LVDS_TX_0_DATA0_P B4
LVDS_TX_0_DATA0_N A4
LVDS_TX_0_DATA1_P C6
LVDS_TX_0_DATA1_N B6
LVDS_TX_0_DATA2_P B3
LVDS_TX_0_DATA2_N A3
LVDS_TX_0_DATA3_P A1
LVDS_TX_0_DATA3_N A2
LVDS_TX_0_DATA4_P D5
LVDS_TX_0_DATA4_N D6
LVDS_TX_0_CLK_P C5
LVDS_TX_0_CLK_N B5
LVDS_TX_1_DATA0_P B1
LVDS_TX_1_DATA0_N B2
LVDS_TX_1_DATA1_P C2
LVDS_TX_1_DATA1_N C3
LVDS_TX_1_DATA2_P D1
LVDS_TX_1_DATA2_N D2
LVDS_TX_1_DATA3_P E1
LVDS_TX_1_DATA3_N E2
LVDS_TX_1_DATA4_P E3
LVDS_TX_1_DATA4_N E4
LVDS_TX_1_CLK_P D3
LVDS_TX_1_CLK_N D4
LVDS_PLL_VREG F5
LVDS_TX_AVDDC1P2 F1
LVDS_TX_AVDD2P5_1 F4
LVDS_TX_AVDD2P5_2 F2
LVDS_TX_AVSS_1 C1
LVDS_TX_AVSS_2 F3
LVDS_TX_AVSS_3 C4
LVDS_TX_AVSS_4 A5
LVDS_TX_AVSS_5 E5
LVDS_TX_AVSS_6 E6
LVDS_TX_AVSS_7 D7
LVDS_TX_AVSS_8 E7
LVDS_TX_AVSS_9 F7
LVDS_TX_AVSS_10 G7
LVDS_TX_AVSS_11 H7
CLK54_AVDD1P2 AD27
CLK54_AVDD2P5 AD28
CLK54_AVSS AD26
CLK54_XTAL_N AC26
CLK54_XTAL_P AC27
CLK54_MONITOR AE25
PM_OVERRIDE Y23
VCXO_AGND_1 AA23
VCXO_AGND_2 AB24
VCXO_AGND_3 AC24
VCXO_AVDD1P2 AF25
VCXO_PLL_AUDIO_TESTOUT AF24
RESET_OUTB P24
RESETB F6
NMIB N24
TMODE_0 J5
TMODE_1 J4
TMODE_2 J6
TMODE_3 J3
SPI_S_MISO V25
POR_OTP_VDD2P5 AH3
POR_VDD1P2 AB8
EJTAG_TCK H4
EJTAG_TDI H3
EJTAG_TDO H2
EJTAG_TMS H1
EJTAG_TRSTB G1
EJTAG_CE0 H6
EJTAG_CE1 H5
PLL_MAIN_AVDD1P2 AB26
PLL_MAIN_AGND AC25
PLL_MAIN_MIPS_EREF_TESTOUT AB27
PLL_RAP_AVD_TESTOUT M6
PLL_RAP_AVD_AVDD1P2 N6
PLL_RAP_AVD_AGND N7
BYP_CPU_CLK AA24
BYP_DS_CLK Y24
BYP_SYS216_CLK AE24
BYP_SYS175_CLK AD25
E_TDI
R260
0
R261
0
E_TMS
R262
0E_TCK
R263
0E_TDO
FPGA_D/L
R264
0
2 13
54MHz X-TAL
AUDIO INCM-TP
PLACE NEAR JACKS
BROAD BAND STUDIO
FHD
LVDS
USB HUB
EJTAG
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
08/10/xx
BCM VIDEO IN/BCM POWER 3 13
EAX63347201
SPDIF_OUT
010:AE6
D3.3V
10K
R341
D1.8V
R335
10K
R339 10K
C389
0.01uF
C312
1000pF
C307
0.1uF
C386
1000pF
HDMI0_RXC-_BCM 008:AA19
A2.5V
C3011
0.1uF
16V
C3005
0.1uF
16V
C367
1000pF
C3006
0.1uF
A3.3V
C381
0.01uF
R333499
A1.2V
R340 10K
HDMI0_RX1+_BCM 008:AC19
C357
0.1uF
C335
0.1uF
A1.2V
R344
20
C3003
0.1uF
A1.2V
A2.5V
C372
1000pF
HDMI0_RX2+_BCM 008:AC19
C344
1000pF
C385
0.01uF C3000
0.1uF
16V
C388
0.01uF
A2.5V
C323
0.01uF
L305
BLM18PG121SN1D
C358
10uF
C382
0.01uF
C309
0.1uF
C396
0.1uF
16V
D1.8V
R332 10K
AUD_LRCK
AUD_LRCH
C354
0.1uF
C3019
33uF
C362
10uF
C359
10uF
C3013
0.01uF
HDMI_SCL 008:AA19
L307
BLM18PG121SN1D
C3020
0.1uF
16V
RGB_VSYNC
C398
1000pF
L303
BLM18PG121SN1D
R330499
READY
L302 BLM18PG121SN1D A2.5V
A1.2V
C390
1000pF
HDMI_SDA 008:AA19
C370
0.1uF C373 1000pF
D3.3V
C392
0.01uF
C393
0.01uF
C391
0.1uF
C3010
1000pF
R331
1K
READY
C360
10uF
R3430
HDMI0_RX0-_BCM 008:AB19
C337
0.1uF
HDMI0_RX0+_BCM 008:AB19
C377
0.01uF
RGB_HSYNC
C341
0.1uF
C350
0.1uF
C352
0.01uF
A2.5V
L300
BLM18PG121SN1D
C364
33uF
C369
1000pF
C3018
10uF
C378
1000pF
HDMI0_RX2-_BCM 008:AC19
A2.5V
C375
1000pF
C324
0.1uF
A3.3V
C349
0.1uF
D3.3V
C356
0.1uF
C3002
10uF
10V
D1.2V
A1.2V
C339
1000pF
AUD_SCK
C347
0.01uF
L304
BLM18PG121SN1D
C311
0.1uF
L308
BLM18PG121SN1D
C3017
0.1uF
16V
C346
0.01uF
C3014
0.1uF
16V
C3008
0.1uF
16V
C327
0.01uF
C376
0.1uF
A1.2V
C355
0.1uF C361 10uF
C334
0.1uF
C3004
0.1uF
L301
BLM18PG121SN1D
C368
0.01uF
D1.8V
C365
0.1uF
16V
L306
BLM18PG121SN1D
C379
1000pF
HDMI0_RXC+_BCM 008:AA19
C380
0.1uF
C394
0.1uF
16V
C306
0.1uF
C343
0.01uF
C348
0.01uF
D1.2V
C340
1000pF
C399
0.1uF
C353
0.1uF
C371
0.1uF
C325
1000pF
C397
0.1uF
D1.2V
D1.8V
C363
10uF
C345
0.01uF
C384
0.1uF
C3016
0.1uF
A3.3V
C3001
0.01uF
C351
10uF
R3420
HDMI0_RX1-_BCM 008:AB19
C366
33uF
TP307 C3000.1uF
RGB_G
009:E20
COMP2_Pb
010:Q19
C314 0.1uF
R328
75
COMP1_Y
010:X11
C302
0.1uF
TP308
RGB_R
009:E19
COMP2_Y
010:Q17
COMP1_Pr
010:X14
TP306
C315 0.1uF
COMP2_Pr
010:Q20
C3040.1uF
R304
36
R303 36
R322
75
C322 0.1uF
R305
36
R319
75
R329
75
C317 0.1uF
R302 36
R318
82
C316 0.1uF
TP305
C318 0.1uF
R306
36
C319 0.1uF
C321 0.1uF
TP302
R320
82
R324
75
RGB_B
009:E22
R323
75
C303
0.1uF
COMP1_Pb
010:X13
C305
0.1uF
R325
75
C320 0.1uF
R327 12K
TU_SIF
006:AE24
R317
240
A2.5V
R300
120
C301
0.1uF
R312 12K
A2.5V
R326 10K
R311 10K
C308
0.1uF
R315
0
R33622
R33822
R33722
R334 0
C310
4.7uF
C313
4.7uF
C326
4.7uF
C338
4.7uF
C342
4.7uF
C336
4.7uF
C374
4.7uF
C383
4.7uF
C387
4.7uF
C395
4.7uF C3007 4.7uF
C3009
4.7uF C3012 4.7uF C3015 4.7uF
TP300
R321
75
R313
56
READY
C332
0.1uFC333
0.1uF
C328 0.1uF
C331
0.1uF
COMPOSITE2_IN
010:K8
R308 0
TP301
TP303
R310
36
TP304
R301
36
R309
0
R316
75
R314
36
TU_CVBS
006:AE21
COMPOSITE1_IN
010:K23
R307
0
C329 0.1uF
C330 0.1uF
P_+5V
P_+5V
LGE3556CP (C0 3D PIP)
IC100
DS_AGCI_CTL
AG28
DS_AGCT_CTL
AH28
EDSAFE_AVSS_1
AA21
EDSAFE_AVSS_2
AB22
EDSAFE_AVSS_3
AF26
EDSAFE_AVSS_4
AF27
EDSAFE_AVSS_5
AF28
EDSAFE_AVDD2P5
AG27
EDSAFE_DVDD1P2
AE26
EDSAFE_IF_N
AE28
EDSAFE_IF_P
AE27
PLL_DS_AGND
AD24
PLL_DS_AVDD1P2
AB19
PLL_DS_TESTOUT
AB25
SD_V5_AVDD1P2
AB18
SD_V5_AVDD2P5
AC17
SD_V5_AVSS
AB17
SD_V1_AVDD1P2
AD14
SD_V1_AVDD2P5
AD16
SD_V1_AVSS_1
AB15
SD_V1_AVSS_2
AC15
SD_V2_AVDD1P2
AD13
SD_V2_AVDD2P5
AE13
SD_V2_AVSS_1
AC13
SD_V2_AVSS_2
AB14
SD_V2_AVSS_3
AC14
SD_V3_AVDD1P2
AC12
SD_V3_AVDD2P5
AD12
SD_V3_AVSS_1
AB13
SD_V3_AVSS_2
AA14
SD_V4_AVDD1P2
AC11
SD_V4_AVDD2P5
AD11
SD_V4_AVSS
AB12
SD_R
AD10
SD_INCM_R
AC10
SD_G
AE9
SD_INCM_G
AF9
SD_B
AH9
SD_INCM_B
AG9
SD_Y1
AG15
SD_PR1
AE15
SD_PB1
AF15
SD_INCM_COMP1
AH15
SD_Y2
AG16
SD_PR2
AF16
SD_PB2
AH17
SD_INCM_COMP2
AH16
SD_Y3
AG14
SD_PR3
AE14
SD_PB3
AF14
SD_INCM_COMP3
AH14
SD_L1
AH10
SD_C1
AG10
SD_INCM_LC1
AE10
SD_L2
AE11
SD_C2
AF11
SD_INCM_LC2
AH11
SD_L3
AH13
SD_C3
AE12
SD_INCM_LC3
AF12
SD_CVBS1
AD9
SD_CVBS2
AG11
SD_CVBS3
AG12
SD_CVBS4
AF13
SD_INCM_CVBS1
AC9
SD_INCM_CVBS2
AF10
SD_INCM_CVBS3
AH12
SD_INCM_CVBS4
AG13
SD_SIF1
AF17
SD_INCM_SIF1
AG17
SD_FB
AD15
SD_FS
AE16
SD_FS2
AE17
PLL_VAFE_AVDD1P2
AB16
PLL_VAFE_AVSS
AA15
PLL_VAFE_TESTOUT
AC16
RGB_HSYNC
AG3
RGB_VSYNC
AF4
I2S_CLK_IN AE18
I2S_CLK_OUT AF18
I2S_DATA_IN AD17
I2S_DATA_OUT AH19
I2S_LR_IN AD18
I2S_LR_OUT AG18
AUD_LEFT0_N AG26
AUD_LEFT0_P AH26
AUD_AVDD2P5_0 AF23
AUD_AVSS_0_1 AA20
AUD_AVSS_0_2 AB21
AUD_AVSS_0_3 AC22
AUD_AVSS_0_4 AC23
AUD_AVSS_0_5 AD23
AUD_RIGHT0_N AH25
AUD_RIGHT0_P AG25
AUD_LEFT1_N AH23
AUD_LEFT1_P AG23
AUD_RIGHT1_N AG24
AUD_RIGHT1_P AH24
AUD_AVDD2P5_1 AE22
AUD_AVSS_1_1 AB20
AUD_AVSS_1_2 AC21
AUD_AVSS_1_3 AE23
AUD_LEFT2_N AF21
AUD_LEFT2_P AE21
AUD_RIGHT2_N AF22
AUD_RIGHT2_P AG22
AUD_AVDD2P5_2 AD21
AUD_AVSS_2_1 AC20
AUD_AVSS_2_2 AD22
AUD_SPDIF AH2
SPDIF_AVDD2P5 AC6
SPDIF_AVSS AE4
SPDIF_IN_N AF3
SPDIF_IN_P AH1
HDMI_RX_0_CEC_DAT AG1
HDMI_RX_0_HTPLG_IN AA6
HDMI_RX_0_HTPLG_OUT AA5
HDMI_RX_0_DDC_SCL AB3
HDMI_RX_0_DDC_SDA Y6
HDMI_RX_0_RESREF AC4
HDMI_RX_0_CLK_N AC1
HDMI_RX_0_CLK_P AC2
HDMI_RX_0_DATA0_N AD1
HDMI_RX_0_DATA0_P AD2
HDMI_RX_0_DATA1_N AE1
HDMI_RX_0_DATA1_P AE2
HDMI_RX_0_DATA2_N AF1
HDMI_RX_0_DATA2_P AF2
HDMI_RX_0_VDD3P3 AD3
HDMI_RX_0_VDD1P2 AE3
HDMI_RX_0_VDD2P5 AC3
HDMI_RX_0_AVSS_1 AD4
HDMI_RX_0_AVSS_2 AB5
HDMI_RX_0_AVSS_3 AB6
HDMI_RX_0_AVSS_4 AG2
HDMI_RX_0_AVSS_5 AB4
HDMI_RX_0_AVSS_6 AA7
HDMI_RX_0_PLL_AVSS Y8
HDMI_RX_0_PLL_DVDD1P2 AC5
HDMI_RX_0_PLL_DVSS W8
HDMI_RX_1_CEC_DAT AA3
HDMI_RX_1_HTPLG_IN V4
HDMI_RX_1_HTPLG_OUT U6
HDMI_RX_1_DDC_SCL V5
HDMI_RX_1_DDC_SDA V3
HDMI_RX_1_RESREF W4
HDMI_RX_1_CLK_N W2
HDMI_RX_1_CLK_P W3
HDMI_RX_1_DATA0_N Y1
HDMI_RX_1_DATA0_P Y2
HDMI_RX_1_DATA1_N AA2
HDMI_RX_1_DATA1_P AA1
HDMI_RX_1_DATA2_N AB2
HDMI_RX_1_DATA2_P AB1
HDMI_RX_1_VDD3P3 Y3
HDMI_RX_1_VDD1P2 Y4
HDMI_RX_1_VDD2P5 W5
HDMI_RX_1_AVSS_1 W1
HDMI_RX_1_AVSS_2 U5
HDMI_RX_1_AVSS_3 W6
HDMI_RX_1_AVSS_4 U7
HDMI_RX_1_AVSS_5 V7
HDMI_RX_1_AVSS_6 W7
HDMI_RX_1_AVSS_7 U8
HDMI_RX_1_AVSS_8 V8
HDMI_RX_1_AVSS_9 Y5
HDMI_RX_1_PLL_AVSS V6
HDMI_RX_1_PLL_DVDD1P2 AA4
HDMI_RX_1_PLL_DVSS Y7
IC100
LGE3556CP (C0 3D PIP)
VDDC_1
H8
VDDC_2
J8
VDDC_3
K8
VDDC_4
L8
VDDC_5
M8
VDDC_6
N8
VDDC_7
P8
VDDC_8
R8
VDDC_9
AA8
VDDC_10
H9
VDDC_11
H10
VDDC_12
H11
VDDC_13
H12
VDDC_14
H13
VDDC_15
H14
VDDC_16
H15
VDDC_17
H16
VDDC_18
H17
VDDC_19
H18
VDDC_20
H19
VDDC_21
H21
VDDC_22
J21
VDDC_23
K21
VDDC_24
L21
VDDC_25
M21
VDDC_26
N21
VDDC_27
P21
VDDC_28
R21
VDDC_29
T21
VDDC_30
U21
VDDC_31
V21
VDDC_32
W21
VDDC_33
Y21
AGC_VDDO
AH27
VDDO_1
AA12
VDDO_2
AA13
VDDO_3
AA18
VDDO_4
AA19
VDDO_5
E28
VDDO_6
L28
VDDO_7
U28
VDDO_8
AB28
DDRV_1
A9
DDRV_2
G9
DDRV_3
G11
DDRV_4
G13
DDRV_5
A14
DDRV_6
G15
DDRV_7
G17
DDRV_8
A19
DDRV_9
G19
LGE3556CP (C0 3D PIP)
IC100
DVSS_1
AD5
DVSS_2
AD6
DVSS_3
J7
DVSS_4
K7
DVSS_5
L7
DVSS_6
M7
DVSS_7
AB7
DVSS_8
AC7
DVSS_9
G8
DVSS_10
D9
DVSS_11
AA9
DVSS_12
G10
DVSS_13
A11
DVSS_14
L11
DVSS_15
M11
DVSS_16
N11
DVSS_17
P11
DVSS_18
R11
DVSS_19
T11
DVSS_20
U11
DVSS_21
V11
DVSS_22
D12
DVSS_23
G12
DVSS_24
L12
DVSS_25
M12
DVSS_26
N12
DVSS_27
P12
DVSS_28
R12
DVSS_29
T12
DVSS_30
U12
DVSS_31
V12
DVSS_32
L13
DVSS_33
M13
DVSS_34
N13
DVSS_35
P13
DVSS_36
R13
DVSS_37
T13
DVSS_38
U13
DVSS_39
V13
DVSS_40
G14
DVSS_41
L14
DVSS_42
M14
DVSS_43
N14
DVSS_44
P14
DVSS_45
R14
DVSS_46
T14
DVSS_47
U14
DVSS_48
V14
DVSS_49
L15
DVSS_50
M15
DVSS_51
N15
DVSS_52
P15
DVSS_53
R15
DVSS_54
T15
DVSS_55
U15
DVSS_56
V15
DVSS_57
A16
DVSS_58
G16
DVSS_59
L16
DVSS_60
M16
DVSS_61
N16
DVSS_62 P16
DVSS_63 R16
DVSS_64 T16
DVSS_65 U16
DVSS_66 V16
DVSS_67 AA16
DVSS_68 D17
DVSS_69 L17
DVSS_70 M17
DVSS_71 N17
DVSS_72 P17
DVSS_73 R17
DVSS_74 T17
DVSS_75 U17
DVSS_76 V17
DVSS_77 AA17
DVSS_78 AC19
DVSS_79 G18
DVSS_80 L18
DVSS_81 M18
DVSS_82 N18
DVSS_83 P18
DVSS_84 R18
DVSS_85 T18
DVSS_86 U18
DVSS_87 V18
DVSS_88 D20
DVSS_89 G20
DVSS_90 H20
DVSS_91 A21
DVSS_92 E21
DVSS_93 F21
DVSS_94 G21
DVSS_95 E22
DVSS_96 F22
DVSS_97 G22
DVSS_98 H22
DVSS_99 J22
DVSS_100 K22
DVSS_101 L22
DVSS_102 M22
DVSS_103 N22
DVSS_104 P22
DVSS_105 R22
DVSS_106 T22
DVSS_107 U22
DVSS_108 V22
DVSS_109 W22
DVSS_110 Y22
DVSS_111 AA22
DVSS_112 W23
DVSS_113 AB23
DVSS_114 F28
DVSS_115 M28
DVSS_116 T28
DVSS_117 AC28
Place this test point
near connector
Wrap aroundG, B, R traces
Wrap aroundY, PB, Pr traces
Wrap aroundL, C traces
Run along CVBS
Run along SIF
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
08/06/xx
DDR2 MEMORY INTERFACE
EAX63347201
DDR01_A[13]
DDR01_A[10]
DDR0_DQ[0]
DDR01_A[11]
DDR1_DQ[8]
DDR1_A[5]
DDR01_A[11]
DDR1_A[5]
DDR01_A[12]
DDR01_A[11]
DDR1_A[4]
DDR0_A[4]
DDR01_A[13]
DDR01_A[10]
DDR0_A[5]
DDR1_A[6]
DDR0_DQ[1]
DDR01_A[12]
DDR1_A[6]
DDR01_A[12]
DDR0_DQ[13]
DDR1_A[5]
DDR1_DQ[10]
DDR01_A[10]
DDR01_A[7]
DDR01_A[3]
DDR01_A[7]
DDR01_A[3]
DDR01_A[1] DDR01_A[3]
DDR01_A[7]
DDR0_DQ[15]
DDR1_DQ[14]
DDR01_A[10]
DDR01_A[0]
DDR01_A[13]
DDR01_A[7]
DDR01_A[7]
DDR1_A[4]
DDR01_A[13]
DDR1_DQ[11]
DDR01_A[12]
DDR01_A[2]
DDR01_A[1]
DDR01_A[9]
DDR1_A[4]
DDR01_A[2]
DDR1_DQ[12]
DDR01_A[9]
DDR01_A[11]
DDR1_DQ[3]
DDR0_A[4]
DDR01_A[8]
DDR01_A[0]
DDR01_A[2]
DDR01_A[8]
DDR01_A[8]
DDR01_A[8]
DDR1_DQ[6]
DDR01_A[2]
DDR0_A[4]
DDR1_A[6]
DDR01_A[13]
DDR01_A[1]
DDR0_DQ[5]
DDR01_A[11]
DDR1_DQ[2]
DDR0_DQ[10]
DDR01_A[0]
DDR0_DQ[3]
DDR0_A[5]
DDR01_A[2]
DDR1_DQ[13]
DDR01_A[7]
DDR01_A[11]
DDR1_DQ[4]
DDR01_A[12]
DDR0_A[6]
DDR1_DQ[5]
DDR01_A[3]
DDR01_A[7]
DDR01_A[11]
DDR0_DQ[11]
DDR0_DQ[4]
DDR01_A[9]
DDR01_A[3]
DDR1_DQ[0]
DDR01_A[13]
DDR01_A[0]
DDR01_A[9]
DDR01_A[0]
DDR1_A[4]
DDR1_DQ[9]
DDR01_A[9]
DDR0_DQ[7]
DDR01_A[9]
DDR01_A[10]
DDR01_A[12]
DDR01_A[1]
DDR0_DQ[12]
DDR0_A[6]
DDR1_A[5]
DDR01_A[8]
DDR01_A[10]
DDR1_DQ[1]
DDR0_DQ[14]
DDR01_A[1]
DDR0_A[5]
DDR1_DQ[15]
DDR01_A[12]
DDR0_DQ[2]
DDR01_A[3]
DDR01_A[8]
DDR0_A[6]
DDR01_A[10]
DDR0_DQ[8]
DDR01_A[2]
DDR0_DQ[6]
DDR0_A[6]
DDR0_A[5]
DDR01_A[8]
DDR01_A[0]
DDR01_A[9]DDR1_DQ[7]
DDR1_A[6]
DDR0_DQ[9]
DDR01_A[1]
DDR0_A[4]
DDR01_A[3]
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR0_DQ[15]
DDR0_DQ[14]
DDR0_DQ[13]
DDR0_DQ[12]
DDR0_DQ[11]
DDR0_DQ[10]
DDR0_DQ[9]
DDR0_DQ[8]
DDR0_DQ[7]
DDR0_DQ[6]
DDR0_DQ[5]
DDR0_DQ[4]
DDR0_DQ[3]
DDR0_DQ[2]
DDR0_DQ[1]
DDR0_DQ[0]
DDR1_DQ[15]
DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]
DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR01_A[13]
C422
0.047uF
D1.8V
R400 0
READY
DDR01_BA0
C405
10uF
10V
C455
22uF
DDR01_A[7-13]
DDR1_DQ[8-15]
004:B3
C460
470pF
C471
0.1uF
DDR0_DM1 004:B4 DDR1_DM1 004:B4
IC400
BD35331F-E2
3
VTTS
2
EN
4
VREF
1
GND
5VDDQ
6VCC
7VTT_IN
8VTT
DDR01_BA2
C409
0.1uF
16V
DDR01_WEb
DDR0_CLK
004:B1;004:C1
C432
0.1uF
A1.2V
DDR0_DQS0 004:B4
R418
75
R401 0
DDR1_DQ[0-7]
004:B3
DDR1_DQS0 004:G2
DDR1_CLKb
004:B1;004:F4
DDR1_DQS0b 004:B4
C472
0.1uF
DDR01_RASb
DDR1_DQ[0-15]
C412
470pF
cap_crack
DDR01_A[0-3,7-13]
C421
470pF
C475
0.1uF
C450
0.1uF
R425
75
DDR01_BA0
C449
470pF
C476
0.1uF
DDR01_CKE
DDR0_A[4-6]
C408
0.1uF
16V
C434
470pF
DDR0_DQ[0-7] 004:B3
DDR1_DQS1b 004:G4
DDR0_DQS1b 004:E4
DDR0_A[4-6]
DDR01_ODT
D1.8V
C452
0.1uF
DDR01_BA2
DDR0_DQS1b 004:B4
R420 75
+3.3V_ST
DDR1_A[4-6]
C402
0.1uF
R415
75
DDR0_VREF0
DDR01_A[0-3]
DDR01_CKE
DDR0_DQS0 004:E2
DDR1_VREF0
DDR_VTT
DDR0_DQ[8-15]
C415
470pF
R421
75
R411
100
1%
C4010.1uF
C411
470pF
cap_crack
DDR01_BA2
DDR0_A[4-6]
DDR01_WEb
DDR0_DQ[0-15]
DDR01_WEb
DDR0_DM0 004:B3
DDR01_BA0
DDR01_RASb
DDR01_BA0
DDR01_CASb
DDR1_DQS0b 004:G2
DDR01_BA1
DDR0_DQS1 004:E4
DDR0_VREF0
R423
75
C407
0.1uF
16V
DDR1_VREF0
DDR1_A[4-6]
C443
470pF
DDR01_WEb
C459
0.047uF
C444
0.047uF
DDR1_DM0 004:B4
C461
10uF
DDR1_CLK 004:E1;004:F4
DDR1_CLKb
DDR01_RASb
DDR01_RASb
C427
0.1uF
DDR0_CLKb 004:C1;004:C4 DDR01_RASb
C447
470pF
C467
470pF
DDR01_BA0
DDR0_A[4-6]
DDR01_RASb
DDR1_DQS1b 004:B4
C453
0.1uF
DDR0_CLK 004:C1;004:C4
C431
10uF
C4000.1uF
C463
0.047uF
R402 240
1%
C403
0.1uF
C425
470pF
DDR1_CLK
R416 75
C446 10uF
D1.8V
DDR01_CKE
C440
0.1uF
DDR0_VREF0
R413 75
DDR01_BA2
C451
470pF
DDR01_A[0-3,7-13]
DDR0_DM0 004:E2
DDR01_RASb
DDR01_CKE
R419
75
C435
10uF
R422
75
DDR01_BA1
R414
75
C436
0.1uF
DDR01_WEb
DDR0_VREF0
DDR0_DQS1 004:B4
DDR01_A[0-3,7-13]
C423
0.1uF
DDR01_BA2
D1.8V
C416
470pF
C426
0.047uF
C454
10uF
DDR01_ODT
004:B1;004:C3;004:C5;004:F5;004:H3;004:H2
DDR01_BA1
C429
10uF
R424
75
DDR01_A[0-3,7-13]
C424
10uF
C441
470pF
DDR1_CLKb 004:E1;004:F4
DDR01_CASb
C439
470pF
DDR1_VREF0
C433
0.047uF
DDR01_BA0
DDR01_A[0-3,7-13]
DDR1_DQS0 004:B4
DDR01_CASb
C457
10uF
C458
0.1uF
DDR01_BA2
DDR01_ODT
C428
22uF
DDR01_CASb
D1.8V
DDR01_BA1
DDR01_WEb
DDR01_BA1
DDR1_A[4-6]
004:B2;004:E4;004:H1
DDR0_CLKb
004:B1;004:C4
DDR0_DQS0b 004:B4
DDR01_BA0
DDR01_WEb
D1.8V
DDR1_DQS1 004:G4
C438
0.1uF
C473
0.1uF
DDR0_CLK
004:B1;004:C4
R412 75
C404
100uF
16V
C474
0.1uF
C448
0.047uF
C442
470pF
C406
0.1uF
16V
DDR0_DQS0b 004:E2
DDR01_ODT
DDR1_DM0 004:G2
C445
0.1uF
DDR_VTT
DDR01_CKE
004:B1;004:C1;004:E1;004:F4;004:H3;004:H2
C456
22uF
DDR1_VREF0
DDR01_BA1
C430
22uF
D1.8V
DDR0_CLKb
004:B1;004:C1
DDR01_ODT
DDR0_DM1 004:E4
DDR01_BA1 DDR1_DQS1 004:B4
R417
75
DDR01_ODT
C462
0.1uF
DDR01_CASb
DDR1_DM1 004:G4
DDR1_A[4-6]
004:B2;004:E2;004:H1
DDR01_CASb
DDR1_CLK
004:B1;004:F4
R410
100 1%
DDR01_ODT
D1.8V
DDR01_BA2
DDR_VTT
C437
0.047uF
C410
1uF
cap_crack
C413
1uF
C414
1uF
C417
1uF
C420
0.1uF
16V
R408 10K
R409
220
L400
BLM18PG121SN1D
L401
BLM18PG121SN1D
C418
10uF
16V
C419
2.2uF
READY
IC401
NT5TU128M8DE_BD
CK
E8
CK
F8
CKE
F2
RAS
F7
CAS
G7
WE
F3
CS
G8
BA0
G2
BA1
G3
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10/AP
H2
A11
K7
A12
L2
NC_1/BA2
G1
NC_2/A14
L3
NC_3/A15
L7
A13
L8
ODT
F9
DQ0 C8
DQ1 C2
DQ2 D7
DQ3 D3
DQ4 D1
DQ5 D9
DQ6 B1
DQ7 B9
DQS B7
DQS A8
DM/RDQS B3
NU/RDQS A2
VDDQ_1 A9
VDDQ_2 C1
VDDQ_3 C3
VDDQ_4 C7
VDDQ_5 C9
VDD_1 A1
VDD_2 L1
VDD_3 E9
VDD_4 H9
VSSQ_1 A7
VSSQ_2 B2
VSSQ_3 B8
VSSQ_4 D2
VSSQ_5 D8
VSS_1 A3
VSS_2 E3
VSS_3 J1
VSS_4 K9
VREF E2
VDDL E1
VSSDL E7
IC403
NT5TU128M8DE_BD
CK
E8
CK
F8
CKE
F2
RAS
F7
CAS
G7
WE
F3
CS
G8
BA0
G2
BA1
G3
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10/AP
H2
A11
K7
A12
L2
NC_1/BA2
G1
NC_2/A14
L3
NC_3/A15
L7
A13
L8
ODT
F9
DQ0 C8
DQ1 C2
DQ2 D7
DQ3 D3
DQ4 D1
DQ5 D9
DQ6 B1
DQ7 B9
DQS B7
DQS A8
DM/RDQS B3
NU/RDQS A2
VDDQ_1 A9
VDDQ_2 C1
VDDQ_3 C3
VDDQ_4 C7
VDDQ_5 C9
VDD_1 A1
VDD_2 L1
VDD_3 E9
VDD_4 H9
VSSQ_1 A7
VSSQ_2 B2
VSSQ_3 B8
VSSQ_4 D2
VSSQ_5 D8
VSS_1 A3
VSS_2 E3
VSS_3 J1
VSS_4 K9
VREF E2
VDDL E1
VSSDL E7
IC404
NT5TU128M8DE_BD
CK
E8
CK
F8
CKE
F2
RAS
F7
CAS
G7
WE
F3
CS
G8
BA0
G2
BA1
G3
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10/AP
H2
A11
K7
A12
L2
NC_1/BA2
G1
NC_2/A14
L3
NC_3/A15
L7
A13
L8
ODT
F9
DQ0 C8
DQ1 C2
DQ2 D7
DQ3 D3
DQ4 D1
DQ5 D9
DQ6 B1
DQ7 B9
DQS B7
DQS A8
DM/RDQS B3
NU/RDQS A2
VDDQ_1 A9
VDDQ_2 C1
VDDQ_3 C3
VDDQ_4 C7
VDDQ_5 C9
VDD_1 A1
VDD_2 L1
VDD_3 E9
VDD_4 H9
VSSQ_1 A7
VSSQ_2 B2
VSSQ_3 B8
VSSQ_4 D2
VSSQ_5 D8
VSS_1 A3
VSS_2 E3
VSS_3 J1
VSS_4 K9
VREF E2
VDDL E1
VSSDL E7
IC402
NT5TU128M8DE_BD
CK
E8
CK
F8
CKE
F2
RAS
F7
CAS
G7
WE
F3
CS
G8
BA0
G2
BA1
G3
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10/AP
H2
A11
K7
A12
L2
NC_1/BA2
G1
NC_2/A14
L3
NC_3/A15
L7
A13
L8
ODT
F9
DQ0 C8
DQ1 C2
DQ2 D7
DQ3 D3
DQ4 D1
DQ5 D9
DQ6 B1
DQ7 B9
DQS B7
DQS A8
DM/RDQS B3
NU/RDQS A2
VDDQ_1 A9
VDDQ_2 C1
VDDQ_3 C3
VDDQ_4 C7
VDDQ_5 C9
VDD_1 A1
VDD_2 L1
VDD_3 E9
VDD_4 H9
VSSQ_1 A7
VSSQ_2 B2
VSSQ_3 B8
VSSQ_4 D2
VSSQ_5 D8
VSS_1 A3
VSS_2 E3
VSS_3 J1
VSS_4 K9
VREF E2
VDDL E1
VSSDL E7
C477
22uF
16V
C468
0.1uF
C470
0.1uF
C466
0.1uF
C469
0.1uF
C464
0.1uF
C465
0.1uF
DDR01_CKE
DDR01_CKE
C478
0.1uF
C479
0.1uF
C480
0.1uF
R404
1M
READY
C481
10uF
10V
C482
2.2uF
10V
C483
10uF
10V
C484
0.1uF
16V
C485
0.1uF
16V
cap_crack
C486
0.1uF
16V
IC100
LGE3556CP (C0 3D PIP)
DDR_BVDD0 A6
DDR_BVDD1 A24
DDR_BVSS0 B7
DDR_BVSS1 B24
DDR_PLL_TEST F20
DDR_PLL_LDO B23
DDR01_CKE B17
DDR_COMP C22
DDR01_ODT E16
DDR_EXT_CLK C23
DDR0_CLK B12
DDR0_CLKB C12
DDR1_CLK A13
DDR1_CLKB A12
DDR01_A00 B15
DDR01_A01 E14
DDR01_A02 A15
DDR01_A03 D15
DDR0_A04 E13
DDR0_A05 E12
DDR0_A06 F13
DDR01_A07 C14
DDR01_A08 F14
DDR01_A09 B14
DDR01_A10 D14
DDR01_A11 C13
DDR01_A12 D13
DDR01_A13 B13
DDR1_A04 F15
DDR1_A05 C15
DDR1_A06 D16
DDR01_BA0 F16
DDR01_BA1 B16
DDR01_BA2 E15
DDR01_CASB A17
DDR0_DQ00 A8
DDR0_DQ01 B11
DDR0_DQ02 B8
DDR0_DQ03 D11
DDR0_DQ04 E11
DDR0_DQ05 C8
DDR0_DQ06 C11
DDR0_DQ07 C9
DDR0_DQ08 D8
DDR0_DQ09 E10
DDR0_DQ10 E9
DDR0_DQ11 F11
DDR0_DQ12 F12
DDR0_DQ13 E8
DDR0_DQ14 D10
DDR0_DQ15 F8
DDR1_DQ00 C18
DDR1_DQ01 C20
DDR1_DQ02 A18
DDR1_DQ03 B21
DDR1_DQ04 C21
DDR1_DQ05 B18
DDR1_DQ06 B20
DDR1_DQ07 D18
DDR1_DQ08 E18
DDR1_DQ09 D21
DDR1_DQ10 F18
DDR1_DQ11 E20
DDR1_DQ12 A22
DDR1_DQ13 F17
DDR1_DQ14 B22
DDR1_DQ15 E17
DDR0_DM0 A10
DDR0_DM1 C10
DDR1_DM0 A20
DDR1_DM1 F19
DDR0_DQS0 B10
DDR0_DQS0B B9
DDR0_DQS1 F10
DDR0_DQS1B F9
DDR1_DQS0 B19
DDR1_DQS0B C19
DDR1_DQS1 E19
DDR1_DQS1B D19
DDR01_RASB C16
DDR_VREF0 A7
DDR_VREF1 A23
DDR01_WEB C17
DDR_VDDP1P8_1 C7
DDR_VDDP1P8_2 D22
4 13
Close to IC
Close to IC
Close to IC
Close to IC
SI
SI
SI
SI
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THERMAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SMPS POWER
08/10/xx
EAX63347201
C506
0.1uF
16V
1.2V_1.8V_EN
R5120
+5V_ST
R536 6.2K
1%
C559
0.1uF
16V
RL_ON
AC_DET
C544
10uF
25V
C502
10uF
6.3V
C522
10uF
6.3V
READY
RL_ON
5V_ON
P_+5V
P_17V
C553 0.1uF
C518
0.1uF
50V
+3.3V_ST
L501
CB4532UK121E
EAM38058401
IC505
MP8706EN-C247-LF-Z
3
SW_2
2
SW_1
4
BST
1
IN
5EN/SYNC
6FB
7VCC
8GND
L506
MLB-201209-0120P-N2
0LCML00003B
C515
0.1uF
16V
R501
10K
READY
+5V_TU
C505
10uF
6.3V
READY
R514
100
L502
CB3216PA501E
EAM44020101
C507
0.1uF
16V
C523
100uF
16V
L515
10uH
NR8040T100M
R533
10K
C521
0.1uF
16V
C501
100uF
16V
C513
10uF
6.3V
C500
10uF
6.3V
READY
ERROR_DET
C503
0.1uF
16V
+5V_ST
C509
0.1uF
16V
IC506
AP2121N-3.3TRE1
EAN58801701
1
GND
2VOUT 3
VIN
L516
MLB-201209-0120P-N2
0LCML00003B
R502
100
C508
10uF
6.3V
C557
10uF
6.3V
L507
+5V_ST
C519
33uF
25V
D3.3V
R506
100
R500
10K
READY
C558
10uF
6.3V
C520
0.1uF
16V
R513
10K
READY
C552
1uF
50V
D1.8V
P_17V
L511
+3.3V_NEC_ST
L504
MLB-201209-0120P-N2
0LCML00003B
A2.5V
R504 910
1%
R505 66.5
1%
R509
1K
1%
IC502
AZ1085S-ADJTR/E1
0IPMG78346A
1
ADJ/GND
2OUTPUT 3
INPUT
L505
MLB-201209-0120P-N2
0LCML00003B
P500
SMAW200-H18S1
14
9
4
18
13
8
3
17
12
7
2
16
11
6
1
15
10
5
19
R515
100K C538
22uF
16V
R522
0
C536
22uF
16V
C535
0.1uF
1.2V_1.8V_EN
L509
2uH
C530
22uF
16V
R523
0
C529
0.1uF
R520
0
C531
0.1uF C533
22uF
C537
22uF
16V
L510
BLM18PG121SN1D
10
R516
A1.2V
C543
0.1uF
16V
C528
0.1uF
D1.2V
C532
1uF
10V
C517
100uF
16V C525
100uF
16V
C516
100uF
16V
READY
C556
100uF
16V
R531
100K
READY
A3.3V
C542
0.1uF
16V
R529 1.2K
1%
R519
47
L514
UBW2012-121F
R530
13K
1/8W
1%
R528 39K
1%
R527 0
C540
1uF
C526
47uF
16V
+3.3V_EN
001:H5
C541
22uF
10V
C549
22uF
10V
C534
0.1uF
C548
100uF
16V
D3.3V
IC504
MP8706EN-C247-LF-Z
3
SW_2
2
SW_1
4
BST
1
IN
5EN/SYNC
6FB
7VCC
8GND
L508
3.6uH
C527
22uF
10V
C550
0.1uF
16V C551
100uF
16V
READY
R521
470K
1%
R525
820K
1%
R510
10K
1/10W
1%
C561
0.01uF
25V
R503
6.8K
C512
22uF
10V
L503
3.6uH
NR8040T3R6N
C510 0.01uF 25V
C504
22uF
10V
C562
100pF
50V
READY
R508
10K
C511
0.01uF
25V
0.1uF
C564
L500
CIC21J501NE
R511
10.5K
1%
R532
47
1/10W 5%
IC501
MP2108DQ
3
LX
2
VIN
4
PGND
1
BST
5
SGND 6SS
7FB
8COMP
9VREF
10 RUN
IC503
MP2208DL-LF-Z
3
PGND_1
2
SS
4
SW_1
1
AGND
6
NC
5
IN_1
7
BS 8VCC
9POK
10 IN_2
11 SW_2
12 PGND_2
13 EN/SYNC
14 FB
15
EP
C514
3300pF
50V
P_+5V
P_+5V
+5V_ST
+5V_ST
R539
0
1/10W
5%
R535 15K
1%
R540 18K
1%
R537
0
1/10W
5%
R538
300K
1/10W
5%
5 13
Vout=(1+R1/R2)*0.8
TUNER 5V
CURRENT: MAX 3A
Multi Power(5V -->3.3V)
R1
BCM3556 core 2.5V
CURRENT: MAX 6A
POWER Wafer 24P
3A
Multi Power(5V -->2.5V)
POWER B/D
Stand-by (5VST --> +3.3V)
R2
MUST BE CHANGE ADJ LDO
AFTER THEN CHECK CST
V0 = 1.25(1+R2/R1)
R1
R2
CURRENT: MAX 3A
R1
Vout=0.8*(1+R1/R2)
R2
130mA
3A
Vout=0.8*(1+R1/R2)
R1
R2
R1
300 mA
R2
Placed on SMD-TOP
Vout=0.9*(1+R2/R1)=1.845
Placed on SMD-TOP
C IN
3A
Replaced Part
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only