LG 42PT250B User manual

PLASMA TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : PB12K
MODEL : 42PT250B 42PT250B-SG
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
Internal Use Only
Printed in KoreaP/NO : MFL67320203 (1110-REV00)

- 2 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
CONTENTS
CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS ...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION ..................................................................................................6
BLOCK DIAGRAM ...................................................................................................................13
EXPLODED VIEW ...................................................................................................................14
SCHEMATIC CIRCUIT DIAGRAM .............................................................................................

- 3 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in
the Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to
prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it
with the specified.
When replacing a high wattage resistor (Oxide Metal Film
Resistor, over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Due to high vacuum and large surface area of picture tube,
extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect
an electrical jumper across the two AC plug prongs. Place the
AC switch in the on position, connect one lead of ohm-meter to
the AC plug prongs tied together and touch other ohm-meter
lead in turn to each exposed metallic parts such as antenna
terminals, phone jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩand 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC
voltage measurements for each exposed metallic part. Any
voltage measured must not exceed 0.75 volt RMS which is
corresponds to 0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument’s
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
IMPORTANT SAFETY NOTICE
0.15uF

- 4 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement .
1. Application Range
(1) This spec sheet is applied all of PDP TV with PB12K chassis.
2. Specification
Each part is tested as below without special appointment.
(1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 °C ± 5 °C
(2) Relative Humidity : 65 % ± 10 %
(3) Power Voltage : Standard input voltage (100 V - 240 V ~ 50 / 60 Hz)
* Standard Voltage of each product is marked by models
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
BOM.
(5) The receiver must be operated for about 5 minutes prior to the adjustment.
3. Test Method
(1) Performance : LGE TV test method followed.
(2) Demanded other specification
Safety : CE, IEC specification
Model Name Market Brand
42PT250B-SG Brazil LG
Model Name Market Appliance
42PT250B-SG Brazil Safety : IEC / EN60065

- 5 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
4. General Specification
No Item Specification Remark
1. Receiving System 1) SBTVD / NTSC / PAL-M / PAL-N PW350B, PV550B, PT250B, PT350B
2) DVB-T PW350E, PV550E, PT250E, PT260E
2. Available Channel 1) VHF : 02~13 PW350B, PV550B, PT250B, PT260E
2) UHF : 14~69
3) DTV : 07-69 (VHF high/UHF)
4) CATV : 02~135
1) VHF : 02~13 PW350E, PV550E, PT250E, PT260E
2) UHF : 14~69
3) DTV : 14~69 (UHF)
4) CATV : 02~135
3. Input Voltage 1)AC 100 ~ 240V 50/60Hz
4. Market Brazil / chile / Peru / Venezuela PW350B, PV550B, PT250B, PT350B
/ Costarica / Uruguay
Colombia / Panama PW350E, PV550E, PT250E, PT260E
5 Screen Size 42 inch Wide(1024 ×768) PW350B, PW350E, PT350B
PT250B, PT250E, PT260E
50 inch Wide(1024 ×768) PW350B, PW350E, PT350B
PT250B, PT250E, PT260E
50 inch Wide(1024 ×768) PV550B, PV550E
60 inch Wide(1024 ×768) PV550B, PV550E
6. Aspect Ratio 16:9 50/42PW350B-SA
50/42PW350E-DC
7. Tuning System FS
8. Module PDP42T3 (3D)#### (1024 ×768) 42PW###
PDP42T3N (2D)#### (1024 ×768) 42PT###
PDP50T3 (3D)#### (1024 ×768) 50PW###
PDP50T3N (2D)#### (1024 ×768) 50PT###
PDP60R3 #### (1920 ×1080) 60PZ###, 60PV###
PDP50R3 #### (1920 ×1080) 50PZ###, 50PV###
9. Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10. Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : 0 ~ 90 %

- 6 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet applies to PB12K Chassis applied PDP TV
all models manufactured in TV factory.
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order. But it is
flexible when its factory local problem occurs.
(3) The adjustment must be performed in the circumstance of
25 cC ± 5 cC of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep 100 V - 240 V,
50 / 60 Hz.
(5) Before adjustment, execute Heat-Run for 5 minutes.
VAfter Receive 100% Full white pattern (06CH) then
process Heat-run
(or “8. Test pattern” condition of Ez-Adjust status)
VHow to make set white pattern
1) Press Power ON button of Service Remocon
2) Press ADJ button of Service remocon. Select “10.
Test pattern” and, after select “White” using
navigation button, and then you can see 100% Full
White pattern.
* In this status you can maintain Heat-Run useless any
pattern generator
* Notice: if you maintain one picture over 20 minutes
(Especially sharp distinction black with white pattern –
13Ch, or Cross hatch pattern – 09Ch) then it can
appear image stick near black level.
3. Adjustment items
3-1. PCB Assembly adjustment
(1) Adjust 480i Comp1
(2) Adjust 1080p Comp1/RGB
- If it is necessary, it can adjustment at Manufacture Line
- You can see set adjustment status at “9. ADJUST
CHECK” of the “In-start menu”
3-2. Set Assembly Adjustment
(1) EDID (The Extended Display Identification Data )
(2) Color Temperature (White Balance) Adjustment
(3) Make sure RS-232C control
(4) Selection Factory output option
4. PCB Assembly Adjustment
4-1. Using RS-232C
- Adjust 3 items at 3-1 PCB assembly adjustments
“ (3) Adjustment sequence” one after the order.
(1) Adjustment protocol
(2) Necessary items before Adjustment items
OPattern Generator : (MSPG-925FA)
OAdjust 480i Comp1
(MSPG-925FA:model :209, pattern :65) – Comp1 Mode
OAdjust 1080p Comp1
(MSPG-925FA:model :225 , pattern :65) – Comp1 Mode
OAddjust RGB (MSPG-925FA:model :225 , pattern :65)
– RGB-PC Mode
* If you want more information then see the below Adjustment
method (Factory Adjustment)
(3) Adjustment sequence
Oaa 00 00: Enter the ADC Adjustment mode.
Oxb 00 40: Change the mode to Component1 (No actions)
Oad 00 10: Adjust 480i Comp
Oad 00 10: Adjust 1080p comp
Oxb 00 60: Change to RGB-PC mode(No action)
Oad 00 10: Adjust 1080p RGB
Oxb 00 90: Endo of Adjustmennt
< See ADC Adjustment RS232C Protocol_Ver1.0 >
Order Command Set response
1. Inter the aa 00 00 a 00 OK00x
Adjustment
mode
2. Change the XB 00 40 b 00 OK40x (Adjust 480i Comp1 )
Source XB 00 60 (Adjust 1080p Comp1)
b 00 OK60x (Adjust 1080p RGB)
3. Start ad 00 10
Adjustment
4. Return the OKx ( Success condition )
Response NGx ( Failed condition )
5. Read data ( main ) (main : component1 480i, RGB 1080p)
Adjustment ad 00 20 00000000000000000000000007c007b006dx
data ( main ) (main : component1 480i, RGB 1080p)
ad 00 30 000000070000000000000000007c00830077x
6. Confirm ad 00 99 NG 03 00x (Failed condition)
Adjustment NG 03 01x (Failed condition)
NG 03 02x (Failed condition)
OK 03 03x (Success condition)
7. End of ad 00 90 d 00 OK90x
Adjustment

5. Factory Adjustment
5-1. Auto Adjust Component
480i/1080p RGB 1080p
(1) Summary : Adjustment component 480i/1080i and RGB
1080p is Gain and Black level setting at Analog
to Digital converter, and compensate the RGB
deviation
(2) Using instrument
1) Adjustment remocon, 801GF(802B, 802F, 802R) or
MSPG925FA pattern generator
(It can output 480i/1080i horizontal 100 % color bar
pattern signal, and its output level must setting
0.7 V ± 0.1 V p-p correctly)
* You must make it sure its resolution and pattern cause every
instrument can have different setting
2) Adjustment method 480i Comp1, Adjust 1080p
Comp1/RGB (Factory adjustment)
O ADC 480i Component1 adjustment -
- Check connection of Component1
- MSPG-925FA Ë Model: 209, Pattern 65
OSet Component 480i mode and 100% Horizontal
Color Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”
OADC 1080p Component1 / RGB adjustment
- Check connection both of Component1 and RGB
- MSPG-925FA Ë Model: 225, Pattern 65
OSet Component 1080p mode and 100% Horizontal
Color Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”
OAfter get each the signal, wait more a second and
enter the “IN-START” with press IN-START key of
Service remocon. After then select “7. External ADC”
with navigator button and press “Enter”.
OAfter Then Press key of Service remocon “Right
Arrow(VOL+)”
OYou can see “ADC Component1 Success”
OComponent1 1080p, RGB 1080p Adjust is same
method.
OComponent 1080p Adjustment in Component1 input
mode
ORGB 1080p adjustment in RGB input mode
OIf you success RGB 1080p Adjust. You can see “ADC
RGB-DTV Success”
Caution : Set Volume 0 after adjustment
5-2. Use Internal ADC(S7R)
- ADJ(EZ ADJUST) -> 6.ADC Calibration -> ADC
Calibration(START)
5-3. EDID(The Extended Display
Identification Data) / DDC(Display Data
Channel) download
(1) Summary
1) It is established in VESA, for communication between
PC and Monitor without order from user for building user
condition. It helps to make easily use realize “Plug and
Play” function.
2) For EDID data write, we use DDC2B protocol.
5-4. Auto Download
(1) After enter Service Mode by pushing “ADJ” key,
(2) Enter EDID D/L mode.
(3) Enter “START” by pushing “OK” key.
Caution
- Never connect HDMI & D-sub Cable when the user
downloading .
- Use the proper cables below for EDID Writing.
O It only needs to PCM EDID D/L for North America Product.
(PU11A)
- 7 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
< Adjustment pattern : 480i / 1080p 60Hz Pattern >

* Edid data and Model option download(RS232)
5-5. Manual Download
(1) Write HDMI EDID data
1) Using instruments
- Jig. (PC Serial to D-Sub connection) for PC, DDC
adjustment.
- S/W for DDC recording (EDID data write and read)
- D-sub jack
- Additional HDMI cable connection Jig.
2) Preparing and setting.
- Set instruments and Jig. Like pic.5), then turn on PC
and Jig.
- Operate DDC write S/W (EDID write & read)
- It will operate in the DOS mode.
EDID data (Model name = LG TV)
HDMI-1 EDID table(2D HD) - South Centural America
(PT250B/E, PT260E)
HDMI-2 EDID table(2D HD) - South Centural America
(PT250B/E, PT260E)
- 8 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
< For write EDID data, setting Jig and another instruments >
0123456789ABCDEF
0 00FFFFFFFFFFFF001E6D010001010101
10 01 15 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20
50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 0F
0 020327F14E0203111293041516051410
10 1F 22 20 26 15 07 50 09 57 07 68 03 0C 00 10 00
20 B8 2D 00 E3 05 03 01 02 3A 80 18 71 38 2D 40 58
30 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16
40 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51
50 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00
60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 D2
0123456789ABCDEF
0 00FFFFFFFFFFFF001E6D010001010101
10 01 15 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20
50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 0F
0 020327F14E0203111293041516051410
10 1F 22 20 26 15 07 50 09 57 07 68 03 0C 00 20 00
20 B8 2d 00 E3 05 03 01 02 3A 80 18 71 38 2D 40 58
30 2C 45 00 40 84 63 00 00 1E 01 1E 80 18 71 1C 16
40 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51
50 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00
60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 C2

HDMI-3 EDID table(2D HD) - South Centural America
(PT250B/E, PT260E)
RGB EDID table(2D HD) - Brazil GP4 Replace only
(PT350B, PT250B)
* See Working Guide if you want more information about EDID
communication.
5-6. Adjustment Color Temperature
(White balance)
(1) Using Instruments
1) Color Analyzer: CA-210 (CH 9)
- Using LCD color temperature, Color Analyzer (CA-
210) must use CH 9, which Matrix compensated
(White, Red, Green, Blue compensation) with CS-
2100. See the Coordination bellowed one.
2) Auto-adjustment Equipment (It needs when Auto-
adjustment – It is availed communicate with RS-232C :
Baud rate: 115200)
3) Video Signal Generator MSPG-925F 720p, 216Gray
(Model: 217, Pattern 78)
(2) Connection Diagram (Auto Adjustment)
1) Using Inner Pattern
2) Using HDMI input
(3) White Balance Adjustment
- If you can’t adjust with inner pattern, then you can adjust
it using HDMI pattern. You can select option at “Ez-Adjust
Menu – 7. White Balance” there items “NONE, INNER,
HDMI”. It is normally setting at inner basically. If you can’t
adjust using inner pattern you can select HDMI item, and
you can adjust.
- In manual Adjust case, if you press ADJ button of service
remocon, and enter “Ez-Adjust Menu – 7. White Balance”,
then automatically inner pattern operates. (In case of
“Inner” originally “Test-Pattern. On” will be selected in The
“Test-Pattern. On/Off”.
OConnect all cables and equipments like Pic.5)
OSet Baud Rate of RS-232C to 115200. It may set
115200 orignally.
OConnect RS-232C cable to set
OConnect HDMI cable to set
- 9 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
< Connection Diagram for Adjustment White balance >
0123456789ABCDEF
0 00FFFFFFFFFFFF001E6D010001010101
10 01 15 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20
50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 0F
0 020327F14E0203111293041516051410
10 1F 22 20 26 15 07 50 09 57 07 68 03 0C 00 30 00
20 B8 2d 00 E3 05 03 01 02 3A 80 18 71 38 2D 40 58
30 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16
40 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51
50 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00
60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B2
0123456789ABCDEF
0 00FFFFFFFFFFFF001E6D010001010101
10 01 15 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20
50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A
60 3E 1E 32 07 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 52

V RS-232C COMMAND(Commonly apply)
O wb 00 00”: Start Auto-adjustment of white balance.
O“wb 00 10”: Start Gain Adjustment (Inner pattern)
O“jb 00 c0” :
O…
O“wb 00 1f”: End of Adjustment
* If it needs, offset adjustment (wb 00 20-start, wb 00 2f-
end)
O“wb 00 ff”: End of white balance adjustment (inner
pattern disappear)
V Adjustment Mapping information
OWhen Color temperature (White balance) Adjustment
(Automatically)
- Press “Power only key” of service remocon and
operate automatically adjustment.
- Set BaudRate to 115200.
OYou must start “wb 00 00” and finish it “wb 00 ff”.
OIf it needs, then adjustment “Offset”.
(4) White Balance Adjustment (Manual adjustment)
1) Test Equipment: CA-210
- Using PDP color temperature, Color Analyzer (CA-
210) must use CH 10, which Matrix compensated
(White, Red, Green, Blue compensation) with CS-
2100. See the Coordination bellowed one.
2) Manual adjustment sequence is like bellowed one.
- Turn to “Ez-Adjust” mode with press ADJ button of
service remocon.
- Select “10.Test Pattern” with CH+/- button and press
enter. Then set will go on Heat-run mode. Over 30
minutes set let on Heat-run mode.
- Let CA-210 to zero calibration and must has gap more
10cm from center of PDP module when adjustment.
- Press “ADJ” button of service remocon and select
“7.White-Balance” in “Ez-Adjust” then press “G” button
of navigation key. (When press “G” button then set will
go to full white mode)
- Adjust at three mode (Cool, Medium, Warm)
- If “cool” mode
Let B-Gain to 192 and R, G, B-Cut to 64 and then
control R, G gain adjustment High Light adjustment.
- If “Medium” and “Warm” mode Let R-Gain to 192 and
R, G, B-Cut to 64 and then control G, B gain
adjustment High Light adjustment.
- All of the three mode
Let R-Gain to 192 and R, G, B-Cut to 64 and then
control G, B gain adjustment High Light adjustment.
- With volume button (+/-) you can adjust.
- After all adjustment finished, with Enter (_ key) turn to
Ez-Adjust mode. Then with ADJ button, exit from
adjustment mode
* Attachment: White Balance adjustment coordination and color
temperature.
OUsing CS-1000 Equipment.
- COOL : T=11000K, _uv=0.000, x=0.276 y=0.283
- MEDIUM : T=9300K, _uv=0.000, x=0.285 y=0.293
- WARM : T=6500K, _uv=0.000, x=0.313 y=0.329
OUsing CA-210 Equipment. (10 CH)
- Contras value : 216 Gray
- Brighness spec.
- 10 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
RS-232C COMMAND
[CMD ID DATA] Meaning
wb 00 00 White Balance adjustment start.
wb 00 10 Start of adjust gain
(Inner white pattern)
wb 00 1f End of gain adjust
wb 00 20 Start of offset adjust
(Inner white pattern)
wb 00 2f End of offset adjust
wb 00 ff End of White Balance adjust
(Inner pattern disappeared)
RS-232C COMMAND CENTER
[CMD ID DATA] MIN (DEFAULT) MAX
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 184 192 192 192
G Gain jh Jb je 00 187 183 159 192
B Gain ji Jc jf 00 192 161 95 192
R Cut 64 64 64 127
G Cut 64 64 64 127
B Cut 64 64 64 127 Color Test Color Coordination
temperature Equipment x y
COOL CA-210 0.276±0.002 0.283±0.002
MEDIUM CA-210 0.285±0.002 0.293±0.002
WARM CA-210 0.313±0.002 0.329±0.002
Item Min Typ Max Unit Remark
White 49 60 - cd/m - 100%Window White
average Pattern
brightness - 100IRE(255Gray)
- Picture: Vivid(Medium )
Brightness -20 +20 % - 85IRE(216Gray) 100%
uniformity Window White Pattern
- Picture: Vivid(Medium)

6. Test of RS-232C control.
- Press In-Start button of Service Remocon then set the “4.Baud
Rate” to 115200. Then check RS-232C control and
7. Selection of Country option.
- Selection of country option is allowed only North American
model (Not allowed Korean model). It is selection of Country
about Rating and Time Zone.
(1) Models: All models which PB82C Chassis (See the first
page.)
(2) Press “In-Start” button of Service Remocon, then enter the
“Option” Menu with “PIP CH-“ Button
(3) Select one of these three (USA, CANADA, MEXICO)
defends on its market using “Vol. +/-“button.
Caution : Don’t push The INSTOP KEY after completing the
function inspection
Caution : Inspection only PAL M / NTSC
8. GND and ESD Testing
8-1. Prepare GND and ESD Testing.
- Check the connection between set and power cord
8-2. Operate GND and ESD auto-test.
(1) Fully connected (Between set and power cord) set enter
the Auto-test sequence.
(2) Connect D-Jack AV jack test equipment.
(3) Turn on Auto-controller(GWS103-4)
(4) Start Auto GND test.
(5) If its result is NG, then notice with buzzer.
(6) If its result is OK, then automatically it turns to ESD Test.
(7) Operate ESD test
(8) If its result is NG, then notice with buzzer.
(9) If its result is OK, then process next steps. Notice it with
Good lamp and STOPER Down.
8-3. Check Items.
(1) Test Voltage
GND: 1.5KV/min at 100mA
Signal: 3KV/min at 100mA
(2) Test time: just 1 second.
(3) Test point
- GND test: Test between Power cord GND and Signal
cable metal GND.
- ESD test: Test between Power cord GND and Live and
neutral.
(4) Leakage current: Set to 0.5mA(rms)
9. POWER PCB Ass’y Voltage
Adjustment
(Va/Vs Voltage Adjustment)
(1)Test equipment : D.M.M 1EA
(2) Connection Diagram for Measuring : refer to fig.1
9-1. Adjustment method
(1) Vs adjustment (refer fig.1)
1) Connect + terminal of D.M.M. to Vs pin of P811, connect
-terminal to GND pin of P811
2) After turning VR901, voltage of D.M.M adjustment as
same as Vs voltage which on label of panel left/top (
deviation ; ±0.5V)
(2) Va adjustment (refer fig.1)
1) After receiving 100% Full White Pattern, HEAT RUN.
2) Connect + terminal of D.M.M. to Va pin of P811, connect
-terminal to GND pin of P811.
3) After turning VR502,voltage of D.M.M adjustment as
same as Va voltage which on label of panel left/top
(deviation; ±0.5V)
10. Default Service option.
10-1. ADC-Set.
VR-Gain adjustment Value (default 128)
VG-Gain adjustment Value (default 128)
VB-Gain adjustment Value (default 128)
VR-Offset adjustment Value (default 128)
VG-Offset adjustment Value (default 128)
VB-Offset adjustment Value (default 128)
10-2. White balance. Value.
- 11 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
CENTER (DEFAULT)
Cool Mid Warm
R Gain 192 192 192
G Gain 192 192 192
B Gain 192 192 192
R Cut 64 64 64
G Cut 64 64 64
B Cut 64 64 64
< fig.1 : 42 inch Power PCB Assy Voltage adjustment >

10-3. Temperature Threshold
VThreshold Down Low 20
VThreshold Up Low 23
VThreshold Down High 70
VThreshold Up High 75
11. USB DOWNLOAD
(*.epk file download)
VPut the USB Stick to the USB socket
VPress Menu key, and move OPTION
VPress “FAV” Press 7 times.
VSelect download file (epk file)
VAfter download is finished, remove the USB stick.
V Press “IN-START” key of ADJ remote control, check the
S/W version.
- 12 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes

- 13 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM

- 14 - LGE Internal Use Only
EXPLODED VIEW
900
910
203
590
204
601
207
520
400
200
240
580
301
305
120
300
206
202
205
302
303
304
501
602
201
570
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
A10 A9
LV1
A12
A21
A2
A4

USB DOWN STREAM
Fiber Optic
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R228
10K
5V_HDMI_3
+5V
R208
10K
C245
0.1uF
16V
R227
10K
R249 1.8K
+5V_ST
D200
READY
DDC_SDA_1
CK-_HDMI3
R223
12K
D0+_HDMI2
D2-_HDMI2
D2+_HDMI3
D1+_HDMI2
R226 1.8K
R204
3.3K
+5V
R1201
10K
D212
READY
C240
27pF
50V
HDMI_ARC
R240
75
R274 0 READY
DSUB_R+
JK207
PPJ235-01
4A [YL]O-SPRING
5A [YL]E-LUG
3A [YL]CONTACT
4B [WH]O-SPRING
3C [RD]CONTACT
4C [RD]O-SPRING
5C [RD]E-LUG
D207
READY
R278
33 USB1_CTL
D218
BAT54_SUZHO
READY
30V
R212
10K
+5V
R6005
10K
1/16W
5%
D214
30V
READY
5V_HDMI_2
C239
1000pF
50V
R290
10K
D1-_HDMI2
C237
0.1uF
16V
10K
5V_HDMI_2
C222
0.1uF
16V
R221
0
READY
GND
CK+_HDMI1
Q200
2SC3875S(ALY)
E
B
C
JP207
SIDE_USB_DP
R200 1K
JK209
1234
5
R1200
75
5V_DET_HDMI_1
R291
10K
D2+_HDMI1
PM_RXD
BSS83
Q203
READY
SB D
G
CK-_HDMI2
R267
10K
R205 33
JK202
EAG62611201
HDMI Side
14
13
5D1_GND
20
BODY_SHIELD
12
11
2D2_GND
19
18
10 CK+
4D1+
1D2+
17
9D0-
8D0_GND
3D2-
16
7D0+
6D1-
15
JP201
Q201
2SC3875S(ALY)
E
B
C
PC_R_IN
JP204
C235
0.1uF
16V
C236
10pF
50V
R277
10K
READY
D201
ENKMC2838-T112
A1
C
A2
R220
56K
READY
R296
100
PC_SER_DATA
JP202
JK200
EAG59023302
HDMI1
14
13
5D1_GND
20
SHIELD
12
11
2D2_GND
19
18
10 CK+
4D1+
1D2+
17
9D0-
8D0_GND
3D2-
16
7D0+
6D1-
15
D0-_HDMI3
PC_SER_CLK
5V_DET_HDMI_2
D1+_HDMI1
D1-_HDMI3
CEC_REMOTE
R1205
12K
C209
10pF
50V
5V_HDMI_2
DDC_SCL_2
DDC_SCL_1
R6004
10K
1/16W
5%
DDC_SCL_3
D0-_HDMI2
R299
470K
R253 33
R1202
10K
5V_HDMI_3
R288
100
RGB_DDC_SCL
R213
470K
C243
0.1uF
16V
D202
ENKMC2838-T112
A1
C
A2
D219
READY
R1204
12K
SIDEAV_L_IN
DSUB_G+
D1+_HDMI3
R203
10K
R211
10
R216
10K
JP205
DSUB_DET
CEC_REMOTE
R201 1.8K
R293
100
READY
R231 33
PC_SER_CLK
JK201
EAG59023301
HDMI2
14
13
5D1_GND
20
SHIELD
12
11
2D2_GND
19
18
10 CK+
4D1+
1D2+
17
9D0-
8D0_GND
3D2-
16
7D0+
6D1-
15
SIDEAV_R_IN
R210
10
R239
75
R217
10K
+3.3V_ST
R292
1K
READY
5V_HDMI_3
SPDIF_OUT
C208
0.1uF
16V
R289
100
PC_SER_DATA
R214
470K
5V_HDMI_1
10K
R222
12K
DDC_SDA_3
IC203
MAX3232CDR
3C1-
2V+
4C2+
1C1+
6V-
5C2-
7DOUT2
8RIN2 9
ROUT2
10
DIN2
11
DIN1
12
ROUT1
13
RIN1
14
DOUT1
15
GND
16
VCC
R1203
1K
R248 1K
5V_DET_HDMI_3
S7_TXD
+5V
R295 0
CK-_HDMI1
CEC_REMOTE
C223
22uF
16V
READY
5V_HDMI_1
CK+_HDMI3
D2-_HDMI1
PM_TXD
10K
D0-_HDMI1
D0+_HDMI3
CEC_REMOTE
SIDEAV_CVBS_IN
HPD1
C205
1000pF
50V
R236
10K
5V_HDMI_1
+3.3V_ST
R294
10K
+5V
R230 33
USB1_OCD
SIDE_USB_DM
IC206
AP2191SG-13
3IN_2
2IN_1
4EN
1GND
5
FLG
6
OUT_1
7
OUT_2
8
NC
DSUB_VSYNC
HPD3
DSUB_HSYNC
+3.3V
RGB_DDC_SDA
D2+_HDMI2
JK203
1
2
3
4
5
6
7
8
9
10
PC_L_IN
D203
ENKMC2838-T112
A1
C
A2
C206
1000pF
50V
+3.3V
R298
470K
R224
1K
JK205
SPG09-DB-010
1
RED
2
GREEN
3
BLUE
4
GND_1
5
DDC_GND
6
RED_GND
7
GREEN_GND
8
BLUE_GND
9
NC
10
SYNC_GND
11
GND_2
12
DDC_DATA
13
H_SYNC
14
V_SYNC
15
DDC_CLOCK
16
SHILED
HPD2
R6003
10K
1/16W
5%
DDC_SDA_2
CK+_HDMI2
R297 0
D217
30V
READY
D2-_HDMI3
C211
10pF
50V
SIDEAV_DET
C238
1000pF
50V
JK204
1
GND
2
VCC
3
VINPUT
4
FIX_POLE
D0+_HDMI1
R219
10K
IC204
READY
3GND
2B
4
Y
1A 5
VCC
S7_RXD
R263
33
C241
0.1uF
16V
DSUB_B+
R269
27K
READY
JP208
R238
75
JK208
PEJ027-04
6B T_TERMINAL2
7B B_TERMINAL2
5T_SPRING
4R_SPRING
7A B_TERMINAL1
6A T_TERMINAL1
3E_SPRING
+3.3V
+3.3V
R229
3.3K
R225 1K
CEC_REMOTE_S7
C244
0.1uF
16V
Q202
2SC3875S(ALY)
E
B
CR258
10K
+3.3V_ST
D1-_HDMI1
+5V
C242
0.1uF
16V
R268
100
R252
3.3K
R254 33
R215
10K
R206 33
R273 0 READY
GP4 LM1 20110531
1
FLASH/EEPROM/GPIO
7
NAND
GATE
RGB PC
SIDE_HDMI
HDMI_1
RS232C
SPDIF
SIDE CVBS
Capacitors on VBUSA should be
placed as closd to connector as possible.
SIDE USB
For CEC
PC AUDIO
HDMI_2
10mm
$0.11
HDMI
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THERMAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
TC2P
TCLK2P TCLK2N
C315
22pF
50V
READY
TCLK1P
C325
68uF
35V
TB2N
C339
1000pF
50V
C337
0.22uF
50V
DISP_EN
TD2N TA2N
TE2P
R392
4.7K
C333
0.22uF
50V
C326
330pF
50V
ZD301
5.1V
C314
0.1uF
50V
AUD_SCK
R387
22
KEY2
TD1P TB1P
R397
10K
R3552K
R396
10K
C340
1000pF
50V
C310
4700pF
50V
+3.3V
R323
2.2
C342
1000pF
50V
TC1P
PC_SER_CLK
C322 1uF 25V
AMP_RESET_N
TE2N
AC_DET
TC2N
R383
0
TE1N
R379
4.7K
TOUCH_VER_CHK
AUD_LRCK
TD2P TA2P
P_SDA
C336
0.22uF
50V
C334
0.22uF
50V
TE1P
C335
0.22uF
50V
DISP_EN
TC2N
C313
22pF
50V
READY
TB1P
UART_RXD
TCLK2P
C321 0.1uF 50V
R393
4.7K
R390
22
IR
L303
10.0uH
R324
0
TB2P TCLK1N
ZD306
5.1V
READY
C308
0.1uF
16V
AMP_DEMOD_SDA
P300
SMAW250-H04R
1
2
3
4
TE1P
C316
0.1uF
50V
AUD_LRCH
SUB_SCL
TA1P
R1300
20
R386
22
R398
22
PC_SER_DATA
R391
22
R394
10K
Q306
2SC3052
E
B
C
AMP_MUTE
P_17V
TC1N
C327
330pF
50V
TCLK2N
ZD302
5.1V
P302
TF05-51S
HD
1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51
52
R1302
10K
R321 2K
R353
10K
READY
P_SCL
R326
10K
READY
TB2P
R385
22
TC2P
R399
22
C319
0.1uF
50V
R388
22
C323 0.1uF 50V
R384
22
TA1N
P301
1
2
3
4
5
6
7
8
9
10
11
12
13
14
16
15
R389
22
TCLK1N
C309
22pF
50V
READY
C331
10pF
PC_SER_DATA
PC_SER_CLK
TD1N
KEY1
TB1N
Q305
2SC3875S(ALY)
READY
E
B
C
L302
10.0uH
TE2N
+3.3V_ST
TA2P
SUB_SDA
P_SCL
TA2N TA1P
ZD305
5.1V
READY
TE1N
R381
10K
+3.3V_ST
R1301
20
TE2P
LED_RED
TD1N
L300
10.0uH
C338
0.22uF
50V
TD2P
AUD_MASTER_CLK
L301
10.0uH
ZD303
5.1V
READY
TB1N
UART_TXD
TA1N
C311
0.1uF
50V
TC1N
C318
0.1uF
50V
UART_TXD
C317
680pF
50V
UART_RXD
P_SDA
C330
0.1uF
16V
C312
22pF
50V
READY
C3201uF 25V
TD2N TC1P
+3.3V_ST
C341
1000pF
50V
IC300
STA368BWG
@compC
26
GND_PLL
27
XTI
28
BICKI
29
LRCKI
30
SDI
31
RESET
32
INT_LINE
33
SDA
34
SCL
35
GND_DIG_2
36
VDD_DIG_2
17 OUT3B/FFX3B
3TEST_MODE
6OUT2B
16 CONFIG
15 VDD
14 GND_REG
13 OUT1A
12 GND1
11 VCC1
10 OUT1B
9OUT2A
8VCC2
7GND2
4VSS
5VCC_REG
2SA
21
VDD_DIG_1
1GND_SUB
20
TWARN/OUT4A
19
EAPD/OUT4B 18 OUT3A/FFX3A
23
PWRDN
24
VDD_PLL
25
FILTER_PLL
22
GND_DIG_1
37
[EP]GND
TB2N
TD1P TCLK1P
P303
104060-8017
FHD
1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
81
ZD304
5.1V
READY
AMP_DEMOD_SCL
R320 2K
R382
0
READY
C324
0.1uF
50V
GP4 LM1 20110531
2
Main/Power/GPIO
7
 

 
LVDS
Close-by
Close-by
Key/IR
Close-by
Close-by
Audio AMP
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PCM_A[2]
PCM_A[0]
PCM_A[1]
PCM_A[7]
PCM_A[5]
PCM_A[4]
PCM_A[3]
PCM_A[6]
C490 0.1uF
B-TMDQU3
AC_DET
SOC_RESET
A-TMA6
B-TMDMU
PCM_A[0-7]
C441 2.2uF
R463 47
C461
0.1uF
DISP_EN
AV_CVBS2_DET
B-TMDQU2
B-TMDQU4
AMP_MUTE
R474 22
AV_LIN_COM1
C478 0.1uF
A-TMCKE
A-TMDQU3
B-TMDQL6
R454
1K
READY
C1410 0.1uF
C462
1000pF
READY
B-TMA8
DDC_SCL_3
B-TMDQL5
COMP1_Pr+
C401 0.047uF
TB2N
IC400
LGE2112-T8
AVDDLV_USB
K12
VDDC_1
G9
VDDC_2
H9
VDDC_3
K10
VDDC_4
K11
VDDC_5
L10
VDDC_6
M12
VDDC_7
M13
VDDC_8
N12
VDDC_9
P14
VDDC_10
P15
VDDC_11
R10
VDDC_12
R14
VDDC_13
R15
VDDC_14
T10
AVDD1P0
P10
FB_CORE
P19
AVDDL_MOD
R16
AVDD10_LAN
L11
DVDD_DDR
M14
AVDD2P5_ADC_1
W9
AVDD2P5_ADC_2
W10
AVDD2P5_ADC_3
W11
AVDD25_REF
W12
AVDD25_LAN
Y17
AVDD_MOD_1
V18
AVDD_MOD_2
U19
AVDD25_PGA
W14
AVSS_PGA
W15
AVDD_NODIE
U7
AVDD_DVI_USB_1
L7
AVDD_DVI_USB_2
M7
AVDD3P3_MPLL
P7
AVDD_DMPLL
R7
DVDD_NODIE
M19
AVDD_AU33
V7
AVDD_EAR33
W7
VDDP_1
R19
VDDP_2
T19
AVDD_LPLL_1
W18
AVDD_LPLL_2
W19
VDDP_NAND
V19
AVDD_DDR0_D_1
J17
AVDD_DDR0_D_2
K15
AVDD_DDR0_D_3
K16
AVDD_DDR0_C
L15
AVDD_DDR1_D_1
K17
AVDD_DDR1_D_2
L17
AVDD_DDR1_D_3
M17
AVDD_DDR1_C
L16
GND_EFUSE
E9
GND_1
A23
GND_2
B17
GND_3
C23
GND_4
A5
GND_5
C11
GND_6
C19
GND_7
C22
GND_8
D14
GND_9
D18
GND_10
D19
GND_11
E17
GND_12
E18
GND_13
E19
GND_14
E22
GND_15
F8
GND_16
F17
GND_17
F18
GND_18
F19
GND_19
G8
GND_20
H8
GND_21
N22
GND_22
N21
GND_23
N20
GND_24
M22
GND_25
M21
GND_26
M20
GND_27
F10
GND_28
V15
GND_29
W16
GND_30
V8
GND_31
T18
GND_32 G10
GND_33 G11
GND_34 G12
GND_35 G13
GND_36 G14
GND_37 G17
GND_38 G18
GND_39 G19
GND_40 G24
GND_41 H11
GND_42 H12
GND_43 H13
GND_44 H14
GND_45 H15
GND_46 H16
GND_47 H17
GND_48 H18
GND_49 H19
GND_50 J9
GND_51 J10
GND_52 J11
GND_53 J12
GND_54 J13
GND_55 J14
GND_56 J15
GND_57 J16
GND_58 J18
GND_59 J19
GND_60 J25
GND_61 K9
GND_62 K13
GND_63 K14
GND_64 H10
GND_65 K18
GND_66 K19
GND_67 K22
GND_68 L8
GND_69 L9
GND_70 J8
GND_71 L12
GND_72 L13
GND_73 L18
GND_74 L19
GND_75 M8
GND_76 K8
GND_77 M10
GND_78 M11
GND_79 L14
GND_80 M15
GND_81 M16
GND_82 M18
GND_83 M25
GND_84 N10
GND_85 N11
GND_86 N13
GND_87 N14
GND_88 N15
GND_89 N16
GND_90 N17
GND_91 N19
GND_92 K7
GND_93 P8
GND_94 P9
GND_95 M9
GND_96 P11
GND_97 P13
GND_98 P16
GND_99 P17
GND_100 P18
GND_101 P12
GND_102 R8
GND_103 R9
GND_104 R11
GND_105 R12
GND_106 R13
GND_107 R17
GND_108 T8
GND_109 T9
GND_110 N7
GND_111 T11
GND_112 T12
GND_113 T13
GND_114 T14
GND_115 T15
GND_116 T16
GND_117 T17
GND_118 U8
GND_119 U9
GND_120 U10
GND_121 U11
GND_122 U12
GND_123 U13
GND_124 U14
GND_125 U15
GND_126 U16
GND_127 U17
GND_128 R18
GND_129 V9
GND_130 V10
GND_131 V11
GND_132 V12
GND_133 V14
GND_134 V17
GND_135 T7
GND_136 E8
R440 1K
READY
B-TMDQSUB
A-TMDQU7
TOUCH_VER_CHK
C420 0.047uF
CK-_HDMI2
TCLK1P
C1402 0.1uF
C413 0.047uF
A-TMWEB
C1412 0.1uF
C455
0.1uF
DSUB_G+
C423
10uF
D2+_HDMI2
R417 33
SIDEAV_L_IN
A-TMBA1
L405
120-ohm
Main
C449
0.1uF
FE_TS_CLK
DDC_SDA_3
R424 33
GND
C1420 0.1uF
AV_RIN_COM1
A-TMDQL7
COMP1_DET
C418 0.047uF
D1-_HDMI2
C416 0.047uF
+3.3V_ST
D2+_HDMI1
C469
1000pF
C468
1000pF
C477 0.1uF
B-TMA13
COMP2_Pb+
R475 22
TU_SIF
SW400
TMUE312GAB
SOC_RESET
1 2
43
5
R410 33
+3.3V_AVDD
B-TMA6
A-TMDQL4
LED_RED
PF_ALE
R406 33
C424
10uF
B-TMBA1
KEY2
C412 0.047uF
R484 22
C474 10uF
A-TMA1
R487
1K 1%
ERROR_DET
TA2P
C498 0.1uF
A-TMA12
B-TMCK
TA1P
C434
10uF
MODEL_OPT_3
C497 0.1uF
TE1P
UART_TXD
B-TMDQSL
S7_RXD
R483 22
AUD_LRCK
TA1N
R402
10K
AUD_SCK
B-TMDQL4
R496
1K 1%
VCC_1.5V_DDR
A-TMA4
D1+_HDMI3
/PF_CE0
A-TMA13
C429
0.1uF
SOC_RESET
TB2P
R444
1K
READY
R495
1K 1%
C487 0.1uF
HPD1
C430
4.7uF
DSUB_HSYNC
PM_RXD
+3.3V_AVDD
C475 1uF
TE1N
R489 22
READY
C454
0.1uF
R465
3.3K
CEC_REMOTE_S7
HPD2
AR401 22
1/16W
R413 33
TC1P
R434
100
SOC_RESET
A-TMDQSLB
D2-_HDMI1
R425 68
R466
3.3K
TE2P
A-TMA9
B-TMRASB
A-TMDQL0
CK+_HDMI1
B-TMDQU1
C485 10uF
C1400 10uF
RGB_DDC_SCL
R442
1K
READY
L403
Main
120-ohm
TD1N
R492 33
C1416 0.1uF
C467
0.1uF
R4371KREADY
D2+_HDMI3
C427 0.047uF
A-TMBA0
C445 2.2uF
C447
22pF
D1+_HDMI1
TCLK2N
L409
120-ohm
Main
C453
10uF
A-TMDQSU
DDC_SCL_2
C479 0.1uF
C414 1000pF
C417 0.047uF
D0+_HDMI2
SUB_SDA
SUB_SCL
R408 33
TU_CVBS
TU_SDA
FE_TS_VAL_ERR
C428
22uF
10V
SOC_RESET
C463
0.1uF
R455
1K
R447
1K
READY
B-TMCKE
10uFC486
A-TMRASB
AMP_DEMOD_SCL
FB_CORE
C411 0.047uF
A-TMA0
R476100
C409 0.047uF
A-TMA7
I2C_SCL
B-TMCKB
C435
10uF
D1-_HDMI3
DDC_SCL_1
C438 2.2uF
AUD_MASTER_CLK
D0-_HDMI3
L404
120-ohm
Main
FE_TS_SYN
COMP2_Pr+
R400
1KREADY
C436
10uF
C405 0.047uF
TD1P
D1+_HDMI2
C465
0.1uF
C425 0.047uF
COMP1_Y+
AUD_SCK
A-TMDQU5
B-TMDML
A-TMA10
C422 0.047uF
C1413 10uF
R435
10
SOC_RESET
B-TMA14
RL_ON
D0+_HDMI1
PM_TXD
A-TMDQL2
5V_ON
A-TMA2
R458100
C426 0.047uF
C1401 0.1uF
TB1P
/PF_CE1
L407
120-ohm
Main
A-TMA14
A-TMCASB
R469
2.2K
DDC_SDA_1
C403 0.047uF
B-TMRESETB
C406 0.047uF
IC400
LGE2112-T8
RXACKP
J2
RXACKN
J3
RXA0P
K3
RXA0N
J1
RXA1P
K2
RXA1N
K1
RXA2P
L2
RXA2N
L3
DDCDA_DA/GPIO24
T5
DDCDA_CK/GPIO23
T4
HOTPLUGA/GPIO19
V5
HOTPLUGB/GPIO20
R5
RXCCKP
AE9
RXCCKN
AC9
RXC0P
AC10
RXC0N
AD9
RXC1P
AC11
RXC1N
AD10
RXC2P
AE11
RXC2N
AD11
DDCDC_DA/GPIO28
AE8
DDCDC_CK/GPIO27
AD8
HOTPLUGC/GPIO21
AC8
RXDCKP
F2
RXDCKN
F3
RXD0P
G3
RXD0N
F1
RXD1P
G2
RXD1N
G1
RXD2P
H2
RXD2N
H3
DDCDD_DA/GPIO30
R6
DDCDD_CK/GPIO29
U6
HOTPLUGD/GPIO22
P5
CEC/GPIO5
R4
HSYNC0
P2
VSYNC0
R3
RIN0P
N2
RIN0M
P3
GIN0P
N3
GIN0M
N1
BIN0P
M3
BIN0M
M2
SOGIN0
M1
HSYNC1
V2
VSYNC1
V3
RIN1P
U3
RIN1M
U2
GIN1P
T1
GIN1M
T2
BIN1P
R2
BIN1M
R1
SOGIN1
T3
HSYNC2
AA2
RIN2P
Y2
RIN2M
AA3
GIN2P
W2
GIN2M
Y3
BIN2P
V1
BIN2M
W3
SOGIN2
W1
CVBS0
AA8
CVBS1
Y4
CVBS2
W4
CVBS3
AA5
CVBS4
Y5
CVBS5
AA4
CVBSOUT0
Y6
CVBSOUT1
AA1
VCOM
AB4
VIFP AC4
VIFM AD3
IP AC3
IM AE3
SIFP AD4
SIFM AC5
IF_AGC AD2
RF_AGC AE2
I2C_SCKM1/GPIO75 AE6
I2C_SDAM1/GPIO76 AD6
XIN AD1
XOUT AC1
SPDIF_IN/GPIO152 D7
SPDIF_OUT/GPIO153 D6
USB0_DM E3
USB0_DP E2
USB1_DM AC12
USB1_DP AE12
I2S_IN_BCK/GPIO150 C8
I2S_IN_SD/GPIO151 D8
I2S_IN_WS/GPIO149 D9
I2S_OUT_BCK/GPIO156 B10
I2S_OUT_MCK/GPIO154 C9
I2S_OUT_SD/GPIO157 B9
I2S_OUT_WS/GPIO155 C10
AUL0 AB9
AUR0 AA11
AUL1 Y9
AUR1 AA9
AUL2 AA7
AUR2 AB8
AUL3 Y8
AUR3 Y10
AUL4 AC7
AUR4 AD7
AUOUTL0 W6
AUOUTL2 V6
AUOUTL3 V4
AUOUTR0 Y7
AUOUTR2 W5
AUOUTR3 U5
AUVRM AD5
AUVAG AE5
AUVRP AC6
EARPHONE_OUTL AA6
EARPHONE_OUTR AB6
ET_RXD[0]/RP/GPIO60 C6
ET_TXD[0]/TP/GPIO57 C5
ET_RXD[1]/RN/GPIO63 A6
ET_TXD[1]/LED1/GPIO56 C4
ET_TX_CLK/TN/GPIO59 B5
ET_TX_EN/GPIO58 C3
ET_MDC/GPIO61 A3
ET_MDIO/GPIO62 B3
ET_COL/LED0/GPIO55 B4
IRIN/GPIO4 N4
ARC0 T6
HWRESET N5
TC2N
B-TMA3
R445
1K
PC_R_IN
D2-_HDMI3 SPI_SDI
IC400
LGE2112-T8
GPIO36
C7
GPIO37
E6
GPIO38
F5
GPIO39
B6
GPIO40
E5
GPIO41
D5
GPIO42
B7
GPIO45
E7
GPIO46
F7
GPIO49
AB5
GPIO50
AB3
GPIO51
A9
GPIO52
F4
I2C_SCKM0/GPIO53
AB1
I2C_SDAM0/GPIO54
N6
GPIO73
AB2
GPIO74
AC2
LVA0P AB25
LVA0N AB23
LVA1P AC25
LVA1N AB24
LVA2P AD25
LVA2N AC24
LVA3P AE23
LVA3N AC23
LVA4P AC22
LVA4N AD23
LVB0P V23
LVB0N U24
LVB1P V25
LVB1N V24
LVB2P W25
LVB2N W23
LVB3P AA23
LVB3N Y24
LVB4P AA25
LVB4N AA24
LVACKP AE24
LVACKN AD24
LVBCKP Y23
LVBCKN W24
GPIO196 T25
GPIO193 U23
GPIO194 T24
GPIO195 T23
C458
0.1uF
C408 0.047uF
A-TMCK
C421 1000pF
5V_DET_HDMI_1
A-TMCKB
D400
KDS181
SOC_RESET
R499 33
READY
R486
1K
R468
2.2K
SPI_SDO
C404 0.047uF
AUD_MASTER_CLK
D2-_HDMI2
A-TMDQSL
10uFC1415
R479 22
FE_BOOSTER_CTL B-TMDQL2
SIDEAV_R_IN
C473 0.1uF
5V_DET_HDMI_3
X400
24MHz
MODEL_OPT_3
B-TMDQL3
L408
120-ohm
Main
C402 0.047uF
AMP_DEMOD_SDA
B-TMDQSU
R403
2.4K
R436
1M
B-TMA2
R423 68
P_SDA
R419 33
R494 33
C1421 10uF
TCLK1N
B-TMDQL1
SPI_SCK
A-TMDMU
R433
100K
SOC_RESET
B-MVREFCA
A-TMA5
A-TMBA2
B-TMDQL0
P_SCL
R415 33
R452
1KREADY
AV_RIN_COM2
D0+_HDMI3
CK-_HDMI1
C459
0.1uF
TC2P
IC400
LGE2112-T8
PCMDATA[0]/GPIO126
W21
PCMDATA[1]/GPIO127
AA18
PCMDATA[2]/GPIO128
AB22
PCMDATA[3]/GPIO120
AE20
PCMDATA[4]/GPIO119
AA15
PCMDATA[5]/GPIO118
AE21
PCMDATA[6]/GPIO117
AB21
PCMDATA[7]/GPIO116
Y15
PCMADR[0]/GPIO125
W20
PCMADR[1]/GPIO124
V20
PCMADR[2]/GPIO122
W22
PCMADR[3]/GPIO121
AB18
PCMADR[4]/GPIO99
AA20
PCMADR[5]/GPIO101
AA21
PCMADR[6]/GPIO102
Y19
PCMADR[7]/GPIO103
AB17
PCMADR[8]/GPIO108
Y16
PCMADR[9]/GPIO110
AB19
PCMADR[10]/GPIO114
AB20
PCMADR[11]/GPIO112
AA16
PCMADR[12]/GPIO104
AA19
PCMADR[13]/GPIO107
AC21
PCMADR[14]/GPIO106
AA17
PCMREG_N/GPIO123
Y20
PCMOE_N/GPIO113
AB15
PCMWE_N/GPIO197
AA22
PCMIORD_N/GPIO111
AD22
PCMIOWR_N/GPIO109
AD20
PCMCE_N/GPIO115
AD21
PCMIRQA_N/GPIO105
AC20
PCMCD_N/GPIO130
Y18
PCMWAIT_N/GPIO100
Y21
PCM_RESET/GPIO129
Y22
PCM2_CE_N/GPIO131
U21
PCM2_IRQA_N/GPIO132
V21
PCM2_CD_N/GPIO135
R20
PCM2_WAIT_N/GPIO133
T20
PCM2_RESET/GPIO134
U22
UART1_TX/GPIO43
D4
UART1_RX/GPIO44
E4
UART2_TX/GPIO65
N25
UART2_RX/GPIO64
N24
UART3_TX/GPIO47
B8
UART3_RX/GPIO48
A8
I2C_SCKM2/DDCR_CK/GPIO72
P23
I2C_SDAM2/DDCR_DA/GPIO71
P24
DDCA_DA/UART0_TX
D2
DDCA_CK/UART0_RX
D1
PWM0/GPIO66
P21
PWM1/GPIO67
N23
PWM2/GPIO68
P22
PWM3/GPIO69
R21
PWM4/GPIO70
P20
PWM_PM/GPIO199
F6
SAR0/GPIO31
H6
SAR1/GPIO32
G5
SAR2/GPIO33
G4
SAR3/GPIO34
J5
SAR4/GPIO35
J4
VSYNC_LIKE/GPIO145
R23
SPI1_CK/GPIO201
R24
SPI1_DI/GPIO202
R25
SPI2_CK/GPIO203
T21
SPI2_DI/GPIO204
T22
NF_CE1Z/GPIO138 AE18
NF_WPZ/GPIO198 AC17
NF_CEZ/GPIO137 AD18
NF_CLE/GPIO136 AC18
NF_REZ/GPIO139 AC19
NF_WEZ/GPIO140 AD17
NF_ALE/GPIO141 AE17
NF_RBZ/GPIO142 AD19
GPIO_PM[0]/GPIO6 H5
PM_UART_TX/GPIO_PM[1]/GPIO7 K6
GPIO_PM[2]/GPIO8 K5
GPIO_PM[3]/GPIO9 J6
GPIO_PM[4]/GPIO10 K4
PM_UART_RX/GPIO_PM[5]/GPIO11 L6
PM_SPI_SCZ1/GPIO_PM[6]/GPIO12 C2
GPIO_PM[7]/GPIO13 L5
GPIO_PM[8]/GPIO14 M6
GPIO_PM[9]/GPIO15 M5
PM_SPI_SCZ2/GPIO_PM[10]/GPIO16 C1
GPIO_PM[11]/GPIO17 M4
PM_SPI_SCK/GPIO1 A2
PM_SPI_CZ0/GPIO_PM[12]/GPIO0 D3
PM_SPI_SDI/GPIO2 B2
PM_SPI_SDO/GPIO3 B1
TS0CLK/GPIO87 Y14
TS0VALID/GPIO85 AA10
TS0SYNC/GPIO86 Y12
TS0DATA_[0]/GPIO77 Y13
TS0DATA_[1]/GPIO78 Y11
TS0DATA_[2]/GPIO79 AA12
TS0DATA_[3]/GPIO80 AB12
TS0DATA_[4]/GPIO81 AA14
TS0DATA_[5]/GPIO82 AB14
TS0DATA_[6]/GPIO83 AA13
TS0DATA_[7]/GPIO84 AB11
TS1CLK/GPIO98 AC15
TS1VALID/GPI96 AD15
TS1SYNC/GPIO97 AC16
TS1DATA_[0]/GPIO88 AD16
TS1DATA_[1]/GPIO89 AE15
TS1DATA_[2]/GPIO90 AE14
TS1DATA_[3]/GPIO91 AC13
TS1DATA_[4]/GPIO92 AC14
TS1DATA_[5]/GPIO93 AD12
TS1DATA_[6]/GPIO94 AD13
TS1DATA_[7]/GPIO95 AD14
/PF_WE
C494 10uF
R405 22
R462 47
LED_RED
B-TMA4
DEMOD_RESET
R448
1K
HDMI_ARC
B-TMDQL7
USB1_CTL
B-TMDQSLB
DSUB_VSYNC
TCLK2P
B-TMA0
USB1_OCD
R459 22
VCC_1.5V_DDR
A-TMA3
B-TMA5
B-TMA1
C407 1000pF
CK-_HDMI3
C460
1uF
SIDE_USB_DP
COMP2_Y+
A-TMA11
R438 1K
READY
R432 68
UART_RXD
B-TMA10
C443 2.2uF
TC1N
TUNER_RESET
R416 68
R420 33
TA2N
A-TMDQL1
S7_TXD
PWM0
A-TMA8
+1.5V_DDR_IN
L411
120-ohm
Main
PWM0
A-TMDQL5
IC400
LGE2112-T8
A_DDR3_A[0]
A11
A_DDR3_A[1]
C14
A_DDR3_A[2]
B11
A_DDR3_A[3]
F12
A_DDR3_A[4]
C15
A_DDR3_A[5]
E12
A_DDR3_A[6]
A14
A_DDR3_A[7]
D11
A_DDR3_A[8]
B14
A_DDR3_A[9]
D12
A_DDR3_A[10]
C16
A_DDR3_A[11]
C13
A_DDR3_A[12]
A15
A_DDR3_A[13]
E11
A_DDR3_A[14]
B13
A_DDR3_BA[0]
F13
A_DDR3_BA[1]
B15
A_DDR3_BA[2]
E13
A_DDR3_MCLK
C17
A_DDR3_MCLKZ
A17
A_DDR3_MCLKE
B16
A_DDR3_ODT
E14
A_DDR3_RASZ
B12
A_DDR3_CASZ
A12
A_DDR3_WEZ
C12
A_DDR3_RESET
F11
A_DDR3_DQSL
B19
A_DDR3_DQSLB
C18
A_DDR3_DQSU
B18
A_DDR3_DQSUB
A18
A_DDR3_DQML
E15
A_DDR3_DQMU
A21
A_DDR3_DQL[0]
D17
A_DDR3_DQL[1]
G15
A_DDR3_DQL[2]
B21
A_DDR3_DQL[3]
F15
A_DDR3_DQL[4]
B22
A_DDR3_DQL[5]
F14
A_DDR3_DQL[6]
A22
A_DDR3_DQL[7]
D15
A_DDR3_DQU[0]
G16
A_DDR3_DQU[1]
B20
A_DDR3_DQU[2]
F16
A_DDR3_DQU[3]
C21
A_DDR3_DQU[4]
E16
A_DDR3_DQU[5]
A20
A_DDR3_DQU[6]
D16
A_DDR3_DQU[7]
C20
B_DDR3_A[0] B23
B_DDR3_A[1] D25
B_DDR3_A[2] F22
B_DDR3_A[3] G22
B_DDR3_A[4] E24
B_DDR3_A[5] F21
B_DDR3_A[6] E23
B_DDR3_A[7] D22
B_DDR3_A[8] D24
B_DDR3_A[9] D21
B_DDR3_A[10] C24
B_DDR3_A[11] C25
B_DDR3_A[12] F23
B_DDR3_A[13] E21
B_DDR3_A[14] D23
B_DDR3_BA[0] G20
B_DDR3_BA[1] F24
B_DDR3_BA[2] F20
B_DDR3_MCLK G25
B_DDR3_MCLKZ G23
B_DDR3_MCLKE F25
B_DDR3_ODT D20
B_DDR3_RASZ B25
B_DDR3_CASZ B24
B_DDR3_WEZ A24
B_DDR3_RESET E20
B_DDR3_DQSL K24
B_DDR3_DQSLB K25
B_DDR3_DQSU J21
B_DDR3_DQSUB J20
B_DDR3_DQML H24
B_DDR3_DQMU L20
B_DDR3_DQL[0] L23
B_DDR3_DQL[1] J24
B_DDR3_DQL[2] L24
B_DDR3_DQL[3] J23
B_DDR3_DQL[4] M24
B_DDR3_DQL[5] H23
B_DDR3_DQL[6] M23
B_DDR3_DQL[7] K23
B_DDR3_DQU[0] G21
B_DDR3_DQU[1] L22
B_DDR3_DQU[2] H22
B_DDR3_DQU[3] K20
B_DDR3_DQU[4] H20
B_DDR3_DQU[5] L21
B_DDR3_DQU[6] H21
B_DDR3_DQU[7] K21
PWM1
A-TMDQU4
COMP1_Pb+
TD2N
TE2N
D0-_HDMI2
B-TMA9
R409 68
C456
0.1uF
R478
22
A-TMDQU0
R411 68
C437 2.2uF
TU_SCL
AR400 22
1/16W
C446 2.2uF
R414 68
A-TMDQU6
A-TMDQSUB
TB1N
A-TMDQU2
B-TMDQU6
B-TMDQU5
DSUB_DET
FE_TS_SERIAL
B-TMDQU0
R431 33
A-TMDML
TD2P
DSUB_R+
SOC_RESET
A-TMRESETB
AUD_LRCH
+3.3V_AVDD
SIDEAV_CVBS_IN
C442 2.2uF
A-TMDQL6
C466
1000pF
A-TMDQU1
/FLASH_WP
/PF_OE
COMP2_Y+
R45722
R418 68
SIDEAV_DET
R491 100
L412
120-ohm
Main
/PF_WP
R4391K READY
B-TMBA2
R47722
DDC_SDA_2
C444 2.2uF
+1.10V_VDDC
C433
1uF
RGB_DDC_SDA
B-TMA11
D0-_HDMI1
R493 33
C419 0.047uF
/F_RB
HPD3
D1-_HDMI1 C431 0.1uF
R443
1K
R427 33
PC_L_IN
C1414 10uF
R401 1K
READY
KEY1
A-TMDQL3
A-MVREFCA
PWM1
A-TMODT
SPDIF_OUT
R430 33
R421 68
COMP2_DET
RF_SWITCH_CTL
B-TMCASB
+2.5V_AVDD
B-TMA7
B-TMODT
+3.3V_AVDD
+3.3V_AVDD
RF_SWITCH_CTL
R451
1K
CK+_HDMI2
C488 0.047uF
READY
R488
1K 1%
C1419 0.1uF
5V_DET_HDMI_2
SIDE_USB_DM
L406
120-ohm
Main
I2C_SDA
C410 0.047uF
B-TMA12
FE_BOOSTER_CTL
C1411 0.1uF
DSUB_B+
R480 22
C439
10uF
16V
SOC_RESET
B-TMBA0
C415 0.047uF
R404 22
C448
22pF
B-TMDQU7
C471 0.1uF
B-TMWEB
CK+_HDMI3
AV_LIN_COM2
IR
/SPI_CS
+3.3V_ST
C457
0.1uF
C499 10uF
R407 68
C432 0.1uF
R422 33
AMP_RESET_N
RGB/RS232/PC/USA IR
SUB IR
GP4 LM1 20110531
3 7
SOC_RESET
AU33:31mA
VDD33_NAND
3D_SYNC
B51_NO_EJ : 4’b0000 Boot from 8051 with SPI flash
SB51_WOS : 4’b0001 Secure B51 without scramble
SB51_WS : 4’b0010 Secure B51 with scramble
MIPS_SPI_NO_EJ : 4’b0100 Boot from MIPS with SPI flash
MIPS_SPI_EJ_1 : 4’b0101 Boot from MIPS with SPI flash
MIPS_SPI_EJ_2 : 4’b0110 Boot from MIPS with SPI flash
MIPS_WOS : 4’b1001 Secure MIPS without scramble
MIPS_WO : 4’b1010 Secure MIPS with scramble
POWER
<LM1 CHIP Config>
(AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)
AVDD_NODIE:7.362mA
CLose to Saturn7LR IC
VDD33_T/VDDP/U3_VD33_2:47mA
LVDS
VDDC : 2026mA
PIN NAME PIN NO.
CLose to Saturn7LR IC
BRAZIL DEMOD OPT
M4
AVDD_DDR0:55mA
3D_RF_TXD
3D_RF_RXD
AVDD2P5:172mA
3D_GPIO_2
LGE 8300_RESET
DDR
VIDEO/AUDIO
AVDD_DDR1:55mA
HIGH
3D_GPIO_0
3D_GPIO_1
AVDD33
MODEL_OPT_3
3D_RF_RESET
AVDD25_PGA:13mA
MIUVDDC
LOW
MODEL OPTION
NEED TO SWAP LVDS POLARITY
 
CLOSE TO MAIN IC
CLOSE TO MAIN IC
CLOSE TO MAIN IC
CLOSE TO MAIN IC
CLOSE TO MAIN IC
CLOSE TO MAIN IC
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PCM_A[5]
A-MVREFDQ
PCM_A[2]
PCM_A[7]
PCM_A[4]
B-MVREFDQ
PCM_A[1]
PCM_A[0]
PCM_A[3]
PCM_A[6]
A-TMDQU7
C531 0.1uF
L500
Main
500
B-TMA5
C532 0.1uF
A-TMDQSLB
B-TMA8
B-TMA10
+3.3V_AVDD
C502
1000pF
A-TMA11
C507 0.1uF
C527 0.1uF
/PF_WE
IC505-*1
MX25L8006EM2I-12G
MX
3
WP#
2
SO/SIO1
4
GND
1
CS#
5SI/SIO0
6SCLK
7HOLD#
8VCC
R504
240
1%
R525
4.7K
/PF_WP
B-TMA13
B-TMDQU2
+3.3V_AVDD
K4B1G1646G-BCH9
IC500-*2
SS
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
B-TMBA2
A-TMRASB
A-TMBA0
B-TMA1
B-TMDQU1
C509 0.1uF
B-TMDQU0
B-TMCK
B-TMDQL0
A-TMDQSUB
B-TMDQU7
B-TMCASB
A-TMCKE
B-TMCKB
A-TMA14
A-TMDQL3
C543
0.01uF
50V
A-TMA3
C510 0.1uF
A-TMDQU3
R506
10K
A-TMODT
A-TMA6
C533 0.1uF
C501
0.1uF
A-TMDQL5
C508 0.1uF
H5TQ1G63DFR-H9C
IC500
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
A13 T3
NC_5 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
IC503
AT24C256C-SSHL-T
3
A2
2
A1
4
GND
1
A0
5SDA
6SCL
7WP
8VCC
A-TMDML
A-TMCASB
A-TMDQL1
+3.3V_ST
/PF_CE1
/PF_CE0
A-TMA4
A-TMDQL6
B-TMDQU5
IC504-*1
K9F1G08U0D-SCB0
SS
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25 NC_16 24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
B-TMA11
VCC_1.5V_DDR
SPI_SDI
R509
56
1%
A-TMA0
C548
0.1uF
A-TMWEB
/FLASH_WP
B-TMRESETB
AR501
22
A-TMDQU2
B-TMDQSL
R524
1K
C500
0.1uF
A-TMDQL2
A-TMA13
C545
0.1uF
16V
VCC_1.5V_DDR
A-TMDQU5
I2C_SDA
C529 0.1uF
R502
1K
1%
I2C_SCL
C512 0.1uF
A-TMDQL7
C503
1000pF
C549
10pF
READY
K4B1G1646G-BCH9
IC501-*2
SS
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
R503
1K
1%
C511 0.1uF
IC503-*1
M24256-BRMN6TP
SGS
3
E2
2
E1
4
VSS
1
E0
5SDA
6SCL
7WC
8VCC
B-TMWEB
C513 0.1uF
+3.3V_AVDD
H5TQ1G63DFR-H9C
IC500-*1
Hynix 2nd
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
R508
56
1%
PCM_A[0-7]
SPI_SDO
/F_RB
B-TMDQL2
B-TMA2
C526 0.1uF
B-TMRASB
+3.3V_ST
A-TMDQU4
B-TMODT
C525 0.1uF
B-TMA14
+3.3V_ST
B-TMDQSLB
B-TMDQSU
C528 0.1uF
R522
1K
R500
1K
1%
/PF_OE
A-TMA10
B-TMA3
AR500
22
R523
1K
READY
A-TMDQL4
R507
10K
B-MVREFCA
H5TQ1G63DFR-H9C
IC501-*1
Hynix 2nd
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
R521
10K
B-TMBA0
PF_ALE
A-TMA9
+1.5V_DDR_IN
C552
0.1uF
B-TMDQL1
B-TMDMU
I2C_SDA
IC504
H27U1G8F2BTR-BC
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25 NC_16 24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
B-TMDQU3
A-TMA7
+3.3V_AVDD
B-TMDQL3
C547
10pF
READY
B-TMA4
C546
0.1uF
R520
4.7K
B-TMDQU6
B-TMA12
SPI_SCK
B-TMA7
B-TMDQU4
IC505
W25Q80BVSSIG
3
%WP[IO2]
2
DO[IO1]
4
GND
1
CS
5DI[IO0]
6CLK
7HOLD[IO3]
8VCC
I2C_SCL
A-TMRESETB R512 3.3K
VCC_1.5V_DDR
A-TMDQL0
B-TMDQL7
A-TMA1
A-MVREFCA
A-TMA8
H5TQ1G63DFR-H9C
IC501
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
A13 T3
NC_5 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
R527 4.7K
A-TMA5
R510
56
1%
/SPI_CS
B-TMDQL4
A-TMCKB
C514 0.1uF
A-TMBA2 C551
0.1uF
C542
0.01uF
50V
A-TMDMU
R526
4.7K
READY
B-TMDQL5
A-TMA12
R511
56
1%
VCC_1.5V_DDR
B-TMDQSUB
C515 0.1uF
C544
10uF
10V
C550
10uF
10V
C530 0.1uF
A-TMDQSU
C524 10uF
A-TMCK
B-TMA0
R501
1K
1% B-TMA6
VCC_1.5V_DDR
B-TMA9
A-TMDQU0
B-TMCKE
B-TMBA1
A-TMDQSL
C506 10uF
A-TMDQU6
R505
240
1%
B-TMDQL6
A-TMA2
B-TMDML
A-TMDQU1
A-TMBA1
IC502
CAT24C08WI-GT3-H-RECV(TV)
3
A2
2
NC_2
4
VSS
1
NC_1
5SDA
6SCL
7WP
8VCC
CVBS/COMP/SPDIF JACK
GP4 LM1 20110810
47
Addr:10101--
HDCP EEPROM
8KBit
A0’h
DDR3 Memory
1GBit x 2
SERIAL FLASH
8MBit
NAND Flash
1GBit
EEPROM
1MBit
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THERMAL
THERMAL
THERMAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
7V
P_17V
C648
10uF
25V
C613
10uF
16V
C603
0.1uF
16V
C650
1uF
6.3V
READY
RL_ON
R603
59K
1%
L601
120-ohm
+2.5V_AVDD
+3.3V_ST
C611
10uF
6.3V
C634
0.1uF
16V
ERROR_DET
R600
10K
+5V
IC605
TPS54327DDAR
3
VREG5
2
VFB
4
SS
1
EN
5GND
6SW
7VBST
8VIN
9
[EP]GND
+3.3V_TU
AC_DET
L611
C620
1uF
6.3VL602
120-ohm
C625
22uF
6.3V
C641
0.1uF
50V
R605
150
1%
+1.2V_DE
+3.3V_AVDD
+3.3V_TU
C600
10uF
25V
L604
120-ohm
2A
L603
NR5040T2R2N
2.2uH
C629
0.1uF
50V
C610
10uF
25V
+3.3V_TU
C647
10uF
16V
R615
1.2K
C631
10uF
6.3V
5V_ON
C623
10uF
6.3V
+5V_TU
+5V
P600
SMAW200-H18S1
14
9
4
18
13
8
3
17
12
7
2
16
11
6
1
15
10
5
19
IC608
AP2121N-3.3TRE1
READY
1
GND
2VOUT 3
VIN
C628
10uF
25V
IC601
TJ3940S-2.5V-3L
1
GND
2VOUT 3
VIN
R604
17.4K
1%
R613
100K
1%
IC607
AZ1117BH-ADJTRE1
2
OUTPUT
3
INPUT 1ADJ/GND
R619
1
C612
0.1uF
16V C605
0.1uF
16V
FB_CORE
IC600
TPS54327DDAR
3
VREG5
2
VFB
4
SS
1
EN
5GND
6SW
7VBST
8VIN
9
[EP]GND
C626
10uF
16V
+3.3V_DE
C617
10uF
25V
C615
10uF
10V
IC604
AP1117EG-13
1
ADJ/GND
2OUT 3
IN
C646
10uF
25V
+3.3V_ST
C635
0.1uF
50V
R606
75
1%
R616
10
C644
10uF
10V
READY
IC606
AZ1117BH-ADJTRE1
2
OUTPUT
3
INPUT 1ADJ/GND
IC603
TPS54327DDAR
3
VREG5
2
VFB
4
SS
1
EN
5GND
6SW
7VBST
8VIN
9
[EP]GND
R623
0
READY
+3.3V
R609
330
R621
22K1%
+3.3V
R601
10K
+3.3V_DE
C609
10uF
10V
+5V_ST
R608
1
L608
READY
C642
10uF
16V
C637
0.1uF
16V
C602
0.1uF
16V
C651
0.1uF
16V
P_17V
+1.5V_DDR_IN
+5V_ST
C630
100pF
50V
C601
0.1uF
50V
C621
1uF
10V
C638
22pF
50V
R620
180K
1% R618
10K
R610
110
C639
1uF
10V
C627
0.1uF
16V
+5V
C643
0.1uF
16V
R6141
C645
0.1uF
16V
READY
C640
3300pF
50V
C633
3300pF
50V
C608
0.1uF
16V
C616
0.1uF
16V
L610
READY
R602
1
R611
100
1%
C618
0.1uF
50V
+3.3V
C604
0.1uF
16V
L605
NR5040T3R3N
3.3uH
L600
120-ohm
Power Main
R617
10K
C606
10uF
6.3V
+1.10V_VDDC
C649
10uF
16V
C632
1uF
10V
C619
22pF
50V
R612
62K
1%
C622
3300pF
50V
IC602
AP2121N-3.3TRE1
1
GND
2VOUT 3
VIN
C624
0.1uF
50V
L606
NR5040T3R3N
3.3uH
C607
0.1uF
16V
L609
READY
C636
10uF
16V
R607
1K
1%
POWER
GP4 LM1 20110531
57
R1
Power Wafer
R2
Vout=0.765*(1+R1/R2)
Vout=0.765*(1+R1/R2)
3.3V_AVDD / 2.5AVDD
+3.3V Multi
1.24V Core
R1
3.3Vst
1.53V DDR
R2
R2
Vout=0.765*(1+R1/R2)
R1
R1
R2
1.26V Tuner
Vout=1.25*(1+R2/R1)
Vout=1.25*(1+R2/R1)
R1
R2
Vout=1.25*(1+R2/R1)
R1
R2
7V
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R2032
12K
+3.3V
R2019
75
COMP2_Y+
R2028
10K
R2025
75
R2024
75
R2004
10K
C2011
10pF
50V
READY
COMP1_Pr+
C2009
1000pF
50V
AV_CVBS2_DET
COMP2_DET
R2022
470K
JK2001
PPJ239-01
5J [GN2]O-SPRING
6J [GN2]E-LUG
4J [GN2]CONTACT
7K [BL2]E-LUG-S
5K [BL2]O-SPRING
7L [RD2]E-LUG-S
5L [RD2]O-SPRING_1
5M [WH2]O-SPRING
4N [RD2]CONTACT
5N [RD2]O-SPRING_2
6N [RD2]E-LUG
6D [GN1]E-LUG
5D [GN1]O-SPRING
4D [GN1]CONTACT
7E [BL1]E-LUG-S
5E [BL1]O-SPRING
7F [RD1]E-LUG-S
5F [RD1]O-SPRING_1
4F [RD1]CONTACT_1
5G [WH1]O-SPRING
4H [RD1]CONTACT_2
5H [RD1]O-SPRING_2
6H [RD1]E-LUG
+3.3V
COMP1_DET
R2027
10K
R2016
75
COMP2_Pr+
C2005
10pF
50V
READY
R2007
1K
R2029
10K
R2003
1K
R2021
470K
R2020
470K
AV_RIN_COM1
C2004
10pF
50V
READY
AV_LIN_COM1
AV_RIN_COM2
C2003
1000pF
50V
R2006
10K
COMP1_Y+
R2018
75
R2001
10K
R2023
75 C2008 10pF
50V
READY
R2033
12K
COMP1_Pb+
R2026
10K
C2007
1000pF
50V
AV_LIN_COM2
+3.3V
C2010
1000pF
50V
R2005
1K
R2017
470K
R2035
12K
COMP2_Pb+
C2006
10pF
50V
READY
C2012
10pF
50V
READY
R2034
12K
USB / LVDS
GP4 LM1 20110303
6 7
HIGH
RESULT
HIGH
AV_CVBS_DET
AV_CVBS
COMP2_DET
LOW
HIGH
LOW LOW
LOW
COMP2_DET
HIGH
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only