Linear Technology LTC5100 User manual

LTC5100
1
sn5100 5100fs
FEATURES
APPLICATIO S
U
DESCRIPTIO
U
TYPICAL APPLICATIO
U
■
Gigabit Ethernet and Fibre Channel Transceivers
■
SFF and SFP Transceiver Modules
■
Proprietary Fiber Optic Links
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
155Mbps to 3.2Gbps Laser Diode Driver for VCSELs*
■
60ps Rise and Fall Times, 10ps Deterministic Jitter
■
Eye Diagram is Stable and Consistent Across
Modulation Range and Temperature
■
1mA to 12mA Modulation Current
■
Easy Board Layout, Laser can be Remotely Located
if Desired
■
No Input Matching or AC Coupling Components
Needed
■
On-Chip ADC for Monitoring Critical Parameters
■
Digital Setup and Control with I
2
C
TM
Serial Interface
■
Emulation and Set-Up Software Available**
■
Operates Standalone or with a Microprocessor
■
On-Chip DACs Eliminate External Potentiometers
■
Constant Current or Automatic Power Control
■
First and Second Order Temperature Compensation
■
On-Chip Temperature Sensor
■
Extensive Eye Safety Features
■
Single 3.3V Supply
■
4mm ×4mm QFN Package
3.3V, 3.2Gbps VCSEL Driver
I
2
C is a trademark of Philips Electronics N.V.
*Vertical Cavity Surface Emitting Laser
**Downloadable from www.linear.com
Figure 1. VCSEL Transmitter with Automatic Power Control
The LTC
®
5100 is a 3.2Gbps VCSEL driver offering an
unprecedented level of integration and high speed perfor-
mance. The part incorporates a full range of features to
ensure consistently outstanding eye diagrams. The data
inputs are AC coupled, eliminating the need for external
capacitors. The LTC5100 has a precisely controlled 50Ω
output that is DC coupled to the laser, allowing arbitrary
placement of the IC. No coupling capacitors, ferrite beads
or external transistors are needed, simplifying layout,
reducing board area and the risk of signal corruption. The
unique output stage of the LTC5100 confines the modula-
tioncurrenttothegroundsystem,isolatingthehighspeed
signal from the power supply to minimize RFI.
TheLTC5100supportsfullyautomatedproductionwithits
extensivemonitoringandcontrolfeatures.Integrated10-bit
DACseliminatetheneedforexternalpotentiometers.Anon-
board 10-bit ADC provides the laser current and voltage,
as well as monitor diode current and temperature. Status
informationisavailablefrom theI
2
Cserialinterfaceforfeed-
back and statistical process control.
An internal digital controller compensates laser tempera-
ture drift and provides extensive laser safety features.
3.2Gbps Electrical Eye Diagram
1mA/DIV
50ps/DIV
5100 TA01
–
+
ADC
3.3V
SCL
EN
SDA
V
DD
V
SS
24LC00 EEPROM
IN SOT-23 PACKAGE
MD
MODA
SRC
MODB
DAC
DAC
10nF
3.2Gbps
MODULATOR
FAULT
WARNING: POTENTIAL EYE HAZARD.
SEE “EYE SAFETY INFORMATION”
100Ω
IN
+
IN
–
50Ω
5100 F01
DIGITAL
CONTROLLER
ARBITRARY
DISTANCE
SERIALIZER

LTC5100
2
sn5100 5100fs
V
DD
, V
DD(HS)
............................................................. 4V
IN
+
, IN
–
(Cml_en = 1) (Note 6)
Peak Voltage........... V
DD(HS)
– 1.2V to V
DD(HS)
+ 0.3V
Average Voltage...... V
DD(HS)
– 0.6V to V
DD(HS)
+ 0.3V
IN
+
, IN
–
(Cml_en = 0) (Note 4).. –0.3V to V
DD(HS)
+ 0.3V
Cml_en = 0 (Note 4)
Peak Difference Between IN
+
and IN
–
.............. ±2.5V
Average Difference Between IN
+
and IN
–
....... ±1.25V
MODA, MODB (Transmitter Disabled) ....–0.3V to 2.75V
MODA, MODB
(Transmitter Enabled) ............ V
DD(HS)
– 2.75V to 2.75V
EN, SDA, SCL, FAULT .....................–0.3V to V
DD
+ 0.3V
MD, SRC................................................... –0.3V to V
DD
Ambient Operating Temperature Range.. –40°C to 85°C
Storage Temperature Range ................ –65°C to 125°CConsult LTC Marketing for parts specified with wider operating temperature ranges.
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
(Note 1)
ELECTRICAL CHARACTERISTICS
The ●denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA= 25°C; VDD = VDD(HS) = 3.3V, IS= 24mA; IM= 12mA (IMPP = 24mA); 49.9Ω, 1%
resistor from SRC (Pin 14) to MODA (Pin 11); 50Ω, 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to
VSS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5.
ORDER PART
NUMBER
UF PART MARKING
5100
LTC5100EUF
T
JMAX
= 125°C, θ
JA
= 37°C/W
EXPOSED PAD IS V
SS
(PIN 17)
MUST BE SOLDERED TO PCB GROUND PLANE
16 15 14 13
5 6 7 8
TOP VIEW
17
UF PACKAGE
16-LEAD (4mm ×4mm) PLASTIC QFN
9
10
11
12
4
3
2
1VSS
IN+
IN–
VSS
VSS
MODA
MODB
VSS
VDD EN SRC MD
FAULT
SDA
SCL
VDD(HS)
1/16 of Full-Scale I
S
Current
PARAMETER CONDITIONS MIN TYP MAX UNITS
Power Supply
V
DD
, V
DD(HS)
Operating Voltage ●3.135 3.3 3.465 V
V
DD
+ V
DD(HS)
Quiescent Current, V
DD
= 3.465V
Excluding the SRC Pin Current (Note 2)
Transmitter Disabled, Power_down_en = 1 4.5 mA
Transmitter Enabled, Is_rng = Im_rng = 3 54 mA
Impp = 24mA
High Speed Data Inputs (IN
+
and IN
–
Pins) (Test Circuit, Figure 5)
Input Signal Amplitude Peak-to-Peak Differential Voltage (The Single- 500 to 2400 mV
P-P
Ended Peak-to-Peak Voltage is One Half the
Differential Voltage)
Common Mode Input Signal Range (Note 3) Cml_en = 0 (Note 4) 0 V
DD(HS)
V
Differential Input Resistance 80 to 120 Ω
Common Mode Input Resistance Cml_en = 0 (Note 5) 50 kΩ
Open-Circuit Voltage Cml_en = 0 (Note 5) 1.65 V
SRC Pin Current, I
S
Full-Scale I
S
Current Is_rng = 0 6 9 mA
Is_rng = 1 12 18 mA
Is_rng = 2 18 27 mA
Is_rng = 3 24 36 mA
Minimum Operating Current (Note 7)
Resolution 10 Bits
SRC Pin Voltage Range 1.2 V
DD
–V
200mV

LTC5100
3
sn5100 5100fs
ELECTRICAL CHARACTERISTICS
The ●denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA= 25°C; VDD = VDD(HS) = 3.3V, IS= 24mA; IM= 12mA (IMPP = 24mA); 49.9Ω, 1%
resistor from SRC (Pin 14) to MODA (Pin 11); 50Ω, 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to
VSS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5.
1/8 of Full-Scale Peak-to-Peak
Modulation Current
PARAMETER CONDITIONS MIN TYP MAX UNITS
Laser Bias Current, I
B
Full-Scale Current (Note 8) Is_rng = 0 6 – I
M
9 – I
M
mA
Is_rng = 1 12 – I
M
18 – I
M
mA
Is_rng = 2 18 – I
M
27 – I
M
mA
Is_rng = 3 24 – I
M
36 – I
M
mA
Absolute Accuracy SRC Pin and MODA, MODB Pin Currents Within ±25 %
Specified Voltage Ranges
Resolution 10 Bits
Linear Tempco Resolution 122 ppm/°C
Linear Tempco Range ±15625 ppm/°C
Second Order Tempco Resolution 3.81 ppm/°C
2
Second Order Tempco Range ±488 ppm/°C
2
Temperature Stability Ib_tc1 = 0, Ib_tc2 = 0 ±500 ppm/°C
Off-State Leakage Transmitter Disabled, V
SRC
= 1.2V 50 µA
MODA, MODB Pin Current, I
M
Full Scale, Peak-to-Peak Modulation Current (Note 9) Im_rng = 0 6 9 mA
Im_rng = 1 12 18 mA
Im_rng = 2 18 27 mA
Im_rng = 3 24 36 mA
Minimum Operating Current (Note 10)
Resolution (Note 11) 9 Bits
Current Stability Im_tc1 = 0, Im_tc2 = 0 ±500 ppm/°C
Voltage Range Peak Transient Voltage on MODA and MODB 1.2 2.7 V
Absolute Accuracy of the Modulation Current ±25 %
Linear Tempco Resolution 122 ppm/°C
Linear Tempco Range ±15625 ppm/°C
Second Order Tempco Resolution 3.81 ppm/°C
2
Second Order Tempco Range ±484 ppm/°C
2
Maximum Bit Rate 3.2 Gbps
Modulation Current Rise and Fall Times 20% to 80% Measured with K28.5 Pattern at 60 ps
2.5Gbps
Deterministic Jitter, Peak-to-Peak (Note 12) Measured with K28.5 Pattern at 3.2Gbps 10 ps
Random Jitter, RMS (Note 13) 1ps
RMS
Pulse Width Distortion 10 ps
Automatic Power Control (Note 14)
Minimum Operating Current for the Monitor Diode 20% of Full Scale
(Note 15) Monitor Diode Current
Temperature Stability Imd_tc1 = 0, Imd_tc2 = 0 ±500 ppm/°C
Monitor Diode Bias Voltage (Note 16) I
MD
≤1600µA 1.45 V

LTC5100
4
sn5100 5100fs
ELECTRICAL CHARACTERISTICS
The ●denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA= 25°C; VDD = VDD(HS) = 3.3V, IS= 24mA; IM= 12mA (IMPP = 24mA); 49.9Ω, 1%
resistor from SRC (Pin 14) to MODA (Pin 11); 50Ω, 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to
VSS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Automatic Power Control (Note 14)
Temperature Compensation (Note 17)
Linear Tempco Resolution 254 • Imd_nom/1024 ppm/°C
Linear Tempco Range ±32300 • Imd_nom/1024 ppm/°C
ADC
Resolution 10 Bits
Source Current Measurement, I
S
(SRC Pin Current)
Full Scale Is_rng = 0 9 mA
Is_rng = 1 18 mA
Is_rng = 2 27 mA
Is_rng = 3 36 mA
Accuracy ±3% of Full Scale
±25% of Reading
Average Modulation Current Measurement, I
M
(Note 18)
Full Scale Im_rng = 0 9 mA
Im_rng = 1 18 mA
Im_rng = 2 27 mA
Im_rng = 3 36 mA
Accuracy ±3% of Full Scale
±25% of Reading
Laser Diode Voltage Measurement
Full Scale 3.5 V
Accuracy ±150mV ±10% of Reading
Monitor Diode Current Measurement (Note 19)
Full Scale Imd_rng = 0 34 µA
Imd_rng = 1 136 µA
Imd_rng = 2 544 µA
Imd_rng = 3 2176 µA
Zero Scale ADC Code = 0 1/8 of Full Scale
Resolution Relative to Reading 0.2 %
Accuracy ±25% of Reading
Temperature Measurement
Full Scale Celsius 239 °C
Sensitivity 0.500 °C/LSB
Termination Resistor Voltage Measurement
Full Scale Is_rng = 0 400 mV
Is_rng = 1 800 mV
Is_rng = 2 1200 mV
Is_rng = 3 1600 mV
Accuracy ±30mV ±10% of Reading
Safety Shutdown, Undervoltage Lockout (UVLO)
Undervoltage Detection V
DD
Decreasing 2.8 V
Undervoltage Detection Hysteresis 150 mV

LTC5100
5
sn5100 5100fs
ELECTRICAL CHARACTERISTICS
The ●denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA= 25°C; VDD = VDD(HS) = 3.3V, IS= 24mA; IM= 12mA (IMPP = 24mA); 49.9Ω, 1%
resistor from SRC (Pin 14) to MODA (Pin 11); 50Ω, 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to
VSS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Bias Current Limit, I
B(LIMIT)
Set Point Resolution 7 Bits
Set Point Range Is_rng = 0 9 mA
Is_rng = 1 18 mA
Is_rng = 2 27 mA
Is_rng = 3 36 mA
Optical Power Limit Automatic Power Control Mode Only, Apc_en = 1
Overpower Limit Expressed in % Over the Imd Set Point 50 %
Underpower Limit Expressed in % Under the Imd Set Point –50 %
Safety Shutdown Response Time Time from the Fault Occurance to Reduction of 100 µs
the Laser Bias Current to 10% of Nominal
FAULT Output, Open-Drain Mode, Flt_drv_mode = 0
Output Low Voltage I
OL
= 3.3mA 0.4 V
Output High Leakage Current V
FAULT
= 2.4V 10 µA
FAULT Output, Open-Drain Mode with 330µA Internal Pull Up, Flt_drv_mode = 1
Output Low Voltage I
OL
= 3.3mA 0.4 V
Output High Current V
FAULT
= 2.4V –280 µA
FAULT Output, Open-Drain Mode with 500µA Internal Pull Up, Flt_drv_mode = 2
Output Low Voltage I
OL
= 3.3mA 0.4 V
Output High Current V
FAULT
= 2.4V –425 µA
FAULT Output, Complementary Drive Mode, Flt_drv_mode = 3
Output High Voltage I
OH
= –3.3mA 2.4 V
Output Low Voltage I
OL
= 3.3mA 0.4 V
EN Input, Ib_gain or (Apc_gain in APC Mode) = 16, Im_gain = 4, Is_rng = 0, Im_rng = 0
Input Low Voltage 0.8 V
Input High Voltage 2V
Input Low Current En_polarity = 0 (EN Active Low), V
EN
= 0V –10 µA
Input High Current En_polarity = 0 (EN Active Low), V
EN
= V
DD
–10 to 10 µA
Input Low Current En_polarity = 1 (EN Active High), V
EN
= 0V –10 to 10 µA
Input High Current En_polarity = 1 (EN Active High), V
EN
= V
DD
10 µA
Transmit Enable Time Time from Active Transition on EN to 95% of 100 ms
Nominal Laser Power and 95% of Full Modulation.
First Time Transmission is Enabled After Power
On or with Rapid_restart_en = 0
Transmit Re-Enable Time Time from Active Transition on EN to 95% of 1 ms
Nominal Laser Power and 95% of Full Modulation.
When Transmission is Re-Enabled After the First
Time and with Rapid_restart_en = 1
Transmit Disable Time Time from Inactive Transition on EN to 5% of 10 µs
Nominal Laser Power
Minimum Pulse Width Required to Clear 10 µs
a Latched Fault

LTC5100
6
sn5100 5100fs
ELECTRICAL CHARACTERISTICS
The ●denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA= 25°C. VDD = VDD(HS) = 3.3V, IS= 24mA; IM= 12mA (IMPP = 24mA); 49.9Ω, 1%
resistor from SRC (Pin 14) to MODA (Pin 11); 50Ω, 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to
VSS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: The quiescent V
DD
and V
DD(HS)
currents refer to the current with
zero SRC pin current (i.e., the laser is operating with zero bias current and
zero modulation current). The total power supply current is the quiescent
current plus the SRC pin current, I
S
, plus any current sinked from IN
+
and
IN
–
.
Note 3: The peak transient voltage at the IN
+
and IN
–
pins must not
exceed the range of –300mV to V
DD(HS)
+ 300mV.
Note 4: When Cml_en = 0 (not in CML mode), the termination is 100Ω
differential with 50k common mode to V
DD(HS)
/2.
Note 5: The common mode input resistance is measured relative to
V
DD(HS)
/2 with the inputs tied together.
Note 6: When Cml_en = 1 (CML mode), the termination is nominally 50Ω
to V
DD(HS)
on each of the IN
+
and IN
–
pins.
Note 7: The SRC pin current can be programmed to near zero in each
range, but the recommended minimum operating level is 1/16 of full scale.
Note 8: The laser bias current is the average current delivered to the laser.
It is equal to the SRC pin current minus the average modulation current at
the MODA and MODB pins, or I
B
= I
S
– I
M
. Full scale for the bias current
therefore depends on Is_rng and the actual modulation current.
Note 9: The MODA and MODB pins are connected on-chip. The modulation
current refers to the sum of the currents on these pins. I
M
refers to the
total average current at the MODA and MODB pins. I
MPP
refers to the total
peak-to-peak modulation current at the MODA and MODB pins. I
MPP
differs
from the laser modulation current, I
MOD
. I
MPP
splits between the laser and
the termination resistor according to I
MOD
= I
MPP
• R
T
/(R
T
+ R
LD
), where
R
T
is the value of the termination resistor and R
LD
is the dynamic
resistance of the laser diode.
PARAMETER CONDITIONS MIN TYP MAX UNITS
SCL, SDA
SCL, SDA Input Low Voltage, V
IL
–0.5 0.3 • V
V
DD
SCL, SDA Input High Voltage, V
IH
0.7 • V
DD
+V
V
DD
0.5
SCL, SDA Input Low Current (Note 21) V
SDA
, V
SCL
= 0.1 • V
DD
–100 µA
SCL, SDA Input High Current (Note 21) V
SDA
, V
SCL
= 0.9 • V
DD
–100 µA
SCL, SDA Output Low Voltage I
OL
= 3mA 0 0.4 V
Hysteresis 280 mV
Serial Interface Timing (Note 20)
SCL Clock Frequency 100 kHz
Hold Time (Repeated) START Condition. After This 4 µs
Period the First Clock Pulse is Generated
Low Period of the SCL Clock 4.7 µs
High Period of the SCL Clock 4µs
Set-Up Time for a Repeated START Condition 4.7 µs
Data Hold Time 0 3.45 µs
Data Set-Up Time 250 ns
Input Rise Time of Both SDA and SCL Signals 1000 ns
Output Fall Time of SCL and SDA from V
IH(MIN)
to 300 ns
V
IL(MAX)
with a Bus Capacitance from 10pF to 400pF
Set-Up Time for STOP Condition 4µs
Bus Free Time Between a STOP and START Condition 4.7 µs
Capacitive Load for Each Bus Line 400 pF
Noise Margin at the LOW Level for Each Connected 0.1 • V
Device (Including Hysteresis) V
DD
Noise Margin at the HIGH Level for Each Connected 0.2 • V
Device (Including Hysteresis) V
DD

LTC5100
7
sn5100 5100fs
ELECTRICAL CHARACTERISTICS
Note 10: The modulation current can be programmed to near zero in each
range, but the high speed performance is not guaranteed for currents less
than the specified minimum.
Note 11: The effective resolution of the modulation current is 9 bits
because the modulation servo system uses only one-half of the 10-bit
ADC range.
Note 12: As defined in ANSI x3.230, Annex A, deterministic jitter is the
peak-to-peak deviation of the 50% crossings of the modulation signal
when compared to the ideal time crossings. The specification for the
LTC5100 pertains to the electrical modulation signal. The K28.5 pattern is
the repeating sequence 00111110101100000101.
Note 13: Random jitter is the standard deviation of the 50% crossings of
the electrical modulation signal as measured by an oscilloscope. It is
measured with a 1GHz square wave after quadrature subtraction of the
random jitter of the pulse generator and oscilloscope. Peak-to-peak
random jitter is defined as 14 times the RMS random jitter.
Note 14: The LTC5100 digitizes and servo controls the logarithm of the
monitor diode current. Many of the characteristics of the APC system,
such as range and resolution, are determined by the ADC.
Note 15: The minimum practical operating current for the monitor diode is
determined by servo settling time considerations.
Note 16: I
MD
must be less than 25µA, 100µA, 400µA and 1600µA
corresponding to Imd_rng = 0, 1, 2, 3.
Note 17: The temperature coefficients of the monitor diode current depend
on the I
MD
setting because of the logarithmic relationship between the set
point and the monitor diode current. Imd_nom is the digital code setting
for the nominal monitor diode current. Imd_nom lies between 0 and 1023.
Note 18: The ADC digitizes the average modulation current, which is 50%
of the peak-to-peak current for a 50% duty cycle signal.
Note 19: The LTC5100 ADC digitizes the logarithm of the monitor diode
current. This implies that the ADC resolution is a constant percentage of
reading and that the monitor diode current is non-zero when the ADC
reads zero. See the Design Notes for further information.
Note 20: Serial interface timing is guaranteed by design from
–40°C to 85°C.
Note 21: The LTC5100 has 100µA nominal pull-up current sources on the
SCL and SDA pins to eliminate the need for external pull-up resistors when
connected to a single EEPROM device. The LTC5100 meets the maximum
rise time specification of 1000ns with external I
2
C bus capacitances up to
25pF. Example: 10pF EEPROM + 150mm trace ~ 25pF.
Note 22: V
DD
and V
DD(HS)
must be tied together on the PC board.

LTC5100
8
sn5100 5100fs
TYPICAL PERFOR A CE CHARACTERISTICS
UW
VDD = VDD(HS) = 3.3V, TA= 25°C, Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit shown in Figure 5.
Optical Eye Diagram at 3.2Gbps
with 850nm VCSEL
100µW/DIV
50ps/DIV 5100 G01
EMCORE MODE LC-TOSA VCSEL
2
15
PRBS, 7dB EXTINCTION RATIO, 300µW AVG
PWR, 2.4GHz 4TH ORDER BESSEL-THOMPSON
LOWPASS FILTER
Optical Eye Diagram at 2.5Gbps
with 850nm VCSEL
125µW/DIV
60ps/DIV 5100 G02
EMCORE MODE LC-TOSA VCSEL
2
15
PRBS, 10dB EXTINCTION RATIO, 300µW AVG
PWR, 1.87GHz 4TH ORDER BESSEL-THOMPSON
LOWPASS FILTER
Effect of Peaking Control on the
Electrical Eye Diagram
3mA/DIV
50ps/DIV 5100 G03
3.2Gbps, 2
23
PRBS, Im_rng = 2, I
MPP
= 12mA,
PEAKING = 4, 8, 16, 30
Electrical Eye Diagram at 25°C
3.2Gbps, 223 PRBS, IMPP = 3mA
0.5mA/DIV
49ps RISING 50ps/DIV 5100 G04
54ps FALLING
Im_rng = 0
PEAKING = 16
Electrical Eye Diagram at 25°C
3.2Gbps, 223 PRBS, IMPP = 12mA
2mA/DIV
51ps RISING 50ps/DIV 5100 G05
59ps FALLING
Im_rng = 2
PEAKING = 16
Electrical Eye Diagram at 25°C
3.2Gbps, 223 PRBS, IMPP = 24mA
4mA/DIV
50ps RISING 50ps/DIV 5100 G06
62ps FALLING
Im_rng = 3
PEAKING = 16
Electrical Eye Diagram at –40°C,
3.2Gbps, 223 PRBS, IMPP = 12mA
2mA/DIV
47ps RISING 50ps/DIV 5100 G07
56ps FALLING
Im_rng = 2
PEAKING = 16
Electrical Eye Diagram at 85°C,
3.2Gbps, 223 PRBS, IMPP = 12mA
2mA/DIV
57ps RISING 50ps/DIV 5100 G09
67ps FALLING
Im_rng = 2
PEAKING = 16
2mA/DIV

LTC5100
9
sn5100 5100fs
TYPICAL PERFOR A CE CHARACTERISTICS
UW
VDD = VDD(HS) = 3.3V, TA= 25°C, Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit shown in Figure 5.
Supply Current vs Modulation
Level (Excluding Laser Current) Supply Current vs Temperature Modulator Output Resistance vs Modulation Level
Impp (mA)
0
0
IDD + IDD(HS) (mA)
10
20
30
40 Im_rng
0
60
481216
5100 G16
20 24
50 Im_rng
1
Im_rng
2Im_rng
3
TRANSMIT DISABLED
AND Power_down_en = 0
TRANSMIT DISABLED
AND Power_down_en = 1
TRANSMIT
ENABLED
TEMPERATURE (°C)
–40
48.1
48.0
47.9
47.8
47.7
47.6
47.5
47.4 20 60
5100 G17
–20 0 40 80
I
DD
+ I
DD(HS)
(mA)
Im_rng = 3
Impp = 12mA
Ib = 0.0mA
(INCLUDES SRC PIN
CURRENT REQUIRED
TO SUPPLY THE AVERAGE
MODULATION CURRENT
Impp (mA)
1
100
OUTPUT RESISTANCE (Ω)
1000
10000
10 100
5100 G18
Laser Bias Current
vs Temperature in CCC Mode Monitor Diode Current vs Temperature in APC Mode
TEMPERATURE (°C)
–40
0.97
I
B
(NORMALIZED)
0.98
0.99
1.00
1.01
–20 0 20 40
5100 G20
60 80
NORMALIZED TO UNITY AT 25°C
Ib_tc1 = Ib_tc2 = 0
TEMPERATURE (°C)
–40
0.97
IMD (NORMALIZED)
0.98
0.99
1.00
1.01
–20 0 20 40
5100 G21
60 80
NORMALIZED TO UNITY AT 25°C
Imd_tc1 = Imd_tc2 = 0
Laser Modulation Current
vs Temperature, Im_rng = 1
TEMPERATURE (°C)
–40
0.97
I
MPP
(NORMALIZED)
0.98
0.99
1.00
1.01
–20 0 20 40
5100 G22
60 80
NORMALIZED TO UNITY AT 25°C
Im_tc1 = Im_tc2 = 0
Rise and Fall Times vs IMat the
Midpoint of Each Im_rng Deterministic Jitter vs IMPP for Im_rng = 3
I
MPP
(mA)
0
50
20% TO 80% RISE AND FALL TIMES (ps)
52
54
56
58
60
62
36912
5100 G13
15
Im_rng
0
1
1
2
2
3
3
t
FALL
t
RISE
Im_rng
0
I
MPP
(mA)
0
40
20% TO 80% RISE AND FALL TIMES (ps)
45
55
60
65
612 15 27
5100 G14
50
39 18 21 24
t
FALL
t
RISE
I
MPP
(mA)
0
DETERMINISTIC JITTER (ps)
5
6
7
24
5100 G15
4
3
1
0612 18
327
915 21
2
8
Rise and Fall Times
vs IMPP for Im_rng = 3

LTC5100
10
sn5100 5100fs
TYPICAL PERFOR A CE CHARACTERISTICS
UW
VDD = VDD(HS) = 3.3V, TA= 25°C, Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted.
Transmitter Enable
5µs/DIV
5100 G26
V
DD
FAULT
LASER OUTPUT
EN
Transmitter Disable
5µs/DIV
5100 G27
V
DD
FAULT
LASER OUTPUT
EN
Transmitter Enable, Rapid Restart
10µs/DIV
5100 G28
V
DD
FAULT
LASER OUTPUT
EN
Response to Fault Fault Recovery Time
10µs/DIV
5100 G29
FAULT
FAULT
LASER OUTPUT
V
MD
10ms/DIV
5100 G30
FAULT
LASER OUTPUT
EN
5µs WIDE
PULSE ON EN
Hot Plug with EN Active in
CCC Mode
10ms/DIV
5100 G23
V
DD
SCL
FAULT
LASER OUTPUT
Hot Plug with EN Active in
APC Mode
10ms/DIV
5100 G24
V
DD
SCL
FAULT
LASER OUTPUT
Start-Up with Slow Ramping
Supply in APC Mode
10ms/DIV
5100 G25
V
DD
FAULT
LASER OUTPUT
EEPROM READ
SCL

LTC5100
11
sn5100 5100fs
PI FU CTIO S
UUU
VSS (Pins 1, 4, 9, 12, 17): Ground for Digital, Analog and
HighSpeedCircuitry.Thesepinsareinternallyconnected.
Connect Pins 1, 4, 9 and 12 to the ground plane with
minimal trace lengths. Place a minimum of four vias
(preferably nine vias) to the ground plane in the Exposed
Pad area. Most of the high speed modulation current is
returned through the Exposed Pad (Pin 17).
IN
+
, IN
–
(Pins 2, 3): High Speed Laser Modulation Inputs.
The inputs are differential with internal termination resis-
tors. The input amplifier is internally AC coupled. With
currentmodelogic(CML)enabled,theinputsareindepen-
dently terminated to V
DD(HS)
with 50Ωresistors. With
CML disabled, the inputs provide 100Ωdifferential termi-
nation and permit rail-to-rail common mode range. The
input pins can be AC coupled with external capacitors.
When externally AC coupled, the input pins self-bias to
V
DD(HS)
/2. The Cml_en bit selects the termination mode.
FAULT (Pin 5): Signals One of Five Safety Fault Con-
ditions: laserovercurrent,overpower,underpower,power
supply undervoltage and memory load error. The pin can
be programmed active high or active low with the
Flt_pin_polarity bit. The FAULT pin can be programmed to
four different drive modes with the Flt_drv_mode bits.
SDA, SCL (Pins 6, 7): Serial Interface Data and Clock
Signals.Thepinsareopendrainwitha100µAinternalpull-
up current. An external pull-up resistor can be added to
drive larger capacitive loads.
V
DD(HS)
(Pin 8): Power Input for the High Speed Laser
Modulation Circuitry. Filter this pin with a ferrite bead and
bypass the pin directly to the ground plane with a 10nF
ceramic capacitor.
MODA, MODB (Pins 11, 10): High Speed Laser Modula-
tion Outputs. MODA and MODB are connected on-chip
and driven by an open-drain output transistor. One of
these pins should be connected to the laser. The other
should be connected to a termination resistor. See the
Applications Information section for details.
MD (Pin 13): Monitor Diode Input for Automatic Power
Control of the Laser Bias Current. The MD pin allows
connection to the cathode or anode of the monitor diode.
The Md_polarity bit selects the polarity of the monitor
diode.
SRC (Pin 14): Current Source for Biasing the Laser. See
the Applications Information section for details.
EN (Pin 15): Transmitter Enable and Disable Input. This
inputisTTL compatible and canbeprogrammed for active
high or active low operation with the En_polarity bit. An
internal10µAcurrent sourcedisables thetransmitter ifthe
EN pin becomes disconnected. This safety feature oper-
ates whether the EN pin is active high or active low.
V
DD
(Pin 16): Power Input for Digital and Low Speed
Analog Circuitry. Connect this pin to V
DD(HS)
(Pin 8) with
a short trace. No bypassing is needed at the V
DD
pin if the
trace length to the V
DD(HS)
bypass capacitor is less than
10mm long.

LTC5100
12
sn5100 5100fs
BLOCK DIAGRA
W
–
+
–
+
I
M(MON)
I
M
V
TERM(MON)
V
LD
MODA
MODB
Transmit_en
Transmit_en
Im_rng
Is_rng
Is_rng
PEAKING DAC
5 BITS
I
M
DAC
10 BITS
I
S
DAC
10 BITS
I
S
V
DD
Im_rng Is_rng
I
S(MON)
I
MD(MON)
Over_current
Over_pwr
Under_pwr
En_polarity
Over_pwr
Under_pwr
I
M(MON)
11
10
V
SS
5100 F02
9
V
SS
12
SRC
14
I
S(MON)
Over_current
–
–
+
–
+
Imd_rngMd_polarity
LOGARITHMIC
AMPLIFIER
Flt_pin_polarity
Transmit_en
Flt_drv_mode
FAULT PIN
DRIVER
Ib LIMIT DAC
7 BITS
10-BIT ADC
I
S(MON)
I
M(MON)
V
LD
I
MD(MON)
V
TERM(MON)
TEMP
SENSOR
sel
LASER POWER
CONTROLLER
REGISTER
SET
SERIAL DIGITAL
INTERFACE
UNDERVOLTAGE
DETECTION
Under_voltage
POWER LIMIT
COMPARATORS
TRANSMIT AND
FAULT
CONTROLLER
CURRENT
ATTENUATOR
6
7
SDA
EN
16
V
DD
SCL
2
IN+
3
IN–
V
SS
100µADATA BUS 100µA
MD
13
FAULT
5
4
17
V
SS
1
V
DD(HS)
8
50Ω50Ω
CML_en
V
DD(HS)
20pF
15
V
SS
(EXPOSED PAD)
Mem_load_errorr
Fault
Figure 2. Block Diagram

LTC5100
13
sn5100 5100fs
Figure 3. Functional Diagram—Automatic Power Control Mode
FU CTIO AL DIAGRA S
UU W
–
+
DAC
ADC
+
+
Im set
Imd set
Im error
Peaking
Im nom
Im tc2
Im tc1
Imd tc2
Imd tc1
Ext temp en
T nom
T int adc
T ext
Im gain
Im dac
Im adc
IN
+
IN
–
V
SS
100Ω
V
SS
8
V
DD(HS)
2
3
4
1
SDA
EN
16
V
DD
6
SCL 7
15
11
10
9
12
∑DAC
+–
Imd error
Imd nom
Apc gain
Is dac
Imd adc
∑DAC
ADC
ADC
V
DD
ADC
ADC V
SS
5100 F03
V
SS
V
LD
V
TERM
I
S
I
S
MODB
MODA
I
M
USER_ADC. Data
USER_ADC. Data
USER_ADC. Data
ADC
+
–
+
–
+
–
14 SRC
13 MD
5FAULT
Im rng
Is rng
Imd rng Md polarity
TEMP
COMP
TEMP
COMP
MINIMUM
GAIN CTRL
CURRENT
ATTENUATOR
TEMP
SENSOR
I
MD
LOG AMP
+
–
–
–
17
V
SS
(EXPOSED PAD)

LTC5100
14
sn5100 5100fs
FU CTIO AL DIAGRA S
UU W
Figure 4. Functional Diagram—Constant Current Control Mode
USER_ADC. Data
USER_ADC. Data
–
+
DAC
+
–
Ib_set
Im nom
Im tc2
Im tc1
Ib tc2
Ib tc1
Ext temp en
T nom
T int adc
T ext
Im gain
Im dac
Im adc
IN
+
IN
–
V
SS
100Ω
V
SS
8
V
DD(HS)
2
3
4
1
SDA
EN
16
V
DD
6
SCL 7
15
11
10
9
12
∑DAC
+–
Ib_error
Im_error
Ib nom
Ib gain
Is rng
Im rng
Is dac
Is adc
∑DAC
ADC
V
DD
ADC
ADC V
SS
5100 F04
V
SS
V
LD
V
TERM
I
S
I
S
MODB
MODA
I
M
ADC
+
–
+
–
+
–
14 SRC
13 MD
5FAULT
Im rng
Is rng
TEMP
COMP
TEMP
COMP
TEMP
SENSOR
(BIAS CURRENT)
+
–
Peaking
+
–
17
V
SS
(EXPOSED PAD)
ADC
+
–

LTC5100
15
sn5100 5100fs
TEST CIRCUIT
Figure 5. Test Circuit
EQUIVALE T I PUT A D OUTPUT CIRCUITS
UUU
15 EN
V
DD
En_polarity
0 EN ACTIVE LOW
10µA
V
DD
V
SS
10µA
5100 F06
1 EN ACTIVE HIGH
LTC5100
100µA
5100 F07
SDA, SCL
6, 7
VDD
LTC5100
VDD
Figure 6. Equivalent Circuit for the EN Pin Figure 7. Equivalent Circuit for the SDA and SCL Pins
6
3.3mA
DRIVER
COMPLEMENTARY
DRIVE FAULT
5100 F08
250µA
PULL-UP
250µA
3.3mA
DRIVER
400µA
PULL-UP
400µA
V
DD
LTC5100
V
DD
13
V
DD
M2 Md_polarity
MD
5100 F09
Imd
Imd
M1
1
0
LTC5100
V
DD
Figure 8. Equivalent Circuit for the FAULT Pin.
All Switches are Open in Open-Drain Mode Figure 9. Equivalent Circuit for the MD Pin
FAULT SDA SCL VDD(HS)
VDD
VDD
VSS
IN+
IN–
VSS
VSS
MODA
MODB
VSS
EN SRC
1.8V POWER SOURCE
LTC5100
MD
13
12
10nF
ZO= 50Ω
MICROWAVE
BLOCKING
CAPACITOR
TO
SCOPE
50Ω
RESISTORS: 0402 SURFACE MOUNT
CAPACITORS: 0402 SURFACE MOUNT, X7R DIELECTRIC
11
10
9
1
2
3
4
141516
8
10nF
5100 F05
765
10nF
ZO= 50Ω
ZO= 50Ω
FROM
BERT

LTC5100
16
sn5100 5100fs
EQUIVALE T I PUT A D OUTPUT CIRCUITS
UUU
2IN
+
3IN
–
50Ω
50k
V
DD(HS)
TO INPUT
AMPLIFIER
50k
5100 F10
25k
20pF
R
ON
≅3ΩCml_en
50Ω
LTC5100
V
DD(HS)
V
DD(HS)
14
V
DD
M2
25k
SRC
11
MODA
10
MODB
5100 F11
1M
M1
LTC5100 V
DD(HS)
V
DD(HS)
Figure 10. Equivalent Circuit for the IN+and IN–Pins Figure 11. Equivalent Circuit for the SRC, MODA and MODB Pins
OPERATIO
U
OVERVIEW
(Refer to Figure 1 and the Block Diagram in Figure 2)
The LTC5100 is optimized to drive common cathode
VCSELs in high speed fiber optic transceivers. The chip
incorporates several features that make it very compact
and easy-to-use while delivering exceptional high speed
performance. Only a capacitor, a resistor and a small
EEPROM (excluding laser diode and power supply filter-
ing) are needed to build a complete fiber optic transmitter.
Digital control over the I
2
C serial interface allows fully
automated laser setup to improve manufacturing effi-
ciency. The LTC5100’s extensive set of eye safety features
meet GBIC and SFF requirements but go beyond the
standards with open-pin protection, redundant transmit-
ter enable controls and other interlocks.
10-bit integrated DACs set laser bias and modulation
levels,eliminatingthecostandspaceofdigital potentiom-
eters. A multiplexed ADC allows monitoring of tempera-
ture and laser operating conditions in production or field
operation. Laser bias and modulation currents are digi-
tally temperature compensated to second order for tight
controlofaveragepowerandextinctionratio.TheLTC5100
provides both constant current and automatic power
control of the laser bias current. In automatic power
control mode, special circuitry maintains constant set-
tling time in spite of variations in the laser slope efficiency
and monitor diode response characteristics.
The high speed inputs of the LTC5100 are internally
terminated in 50Ωand internally AC coupled, eliminating
all external components at the inputs. The modulation
output is DC coupled to the laser and presents a high
quality resistive drive impedance to deliver very fast and
clean eye diagrams in spite of laser impedance variations.
The modulation output is capable of driving significant
lengths of transmission line, allowing the LTC5100 to be
placed at an arbitrary distance from the laser. This feature
allows for packaging flexibility within the module.
TheLTC5100minimizeselectromagneticinterference(EMI)
with several architectural features. The unique design of
thedriveroutputforcesthehighspeedmodulationcurrent
to circulate only in the laser and ground system. The high
speedamplifier chainand thedigital circuitryareinternally
filtered and decoupled to further reduce power supply
noise generation.

LTC5100
17
sn5100 5100fs
LASER BIAS AND MODULATION
Modulator Architecture
The LTC5100 drives common cathode lasers using a
method called “shunt switching”. As shown in Figure 12,
shunt switching involves sourcing DC current into the
laser diode and shunting part of that current with a high
speed current switch to produce the required modulation.
The SRC pin provides the DC current and the MODA,
MODB pins (which are connected on chip) provide the
high speed modulation current. This technique results in
a very fast, single-ended driver that confines the high
speed modulation current to the laser and ground system.
The LTC5100 actually uses a modified shunt switching
scheme in which the source current is delivered through
a “termination” resistor, R
T
, that is bypassed to ground
with a large capacitor. The resistor brings three advan-
tagestothemodulationstage.First, it gives the modulator
a precise resistive output impedance to damp ringing and
absorb reflections from the laser. Second, the resistor
isolates the capacitance of the SRC pin from the high
speed signal path, further improving modulation speed.
Third, the resistor and capacitor heavily filter the high
speedoutput signal sothatit doesnotmodulate thepower
supply and cause radiation or interference. On-chip
decoupling of the high speed amplifiers further reduces
power supply noise generation.
OPERATIO
U
Terminology and Basic Calculations
Figure 12 through Figure 16 define terminology that is
used throughout this data sheet. The current delivered by
the SRC pin is called I
S
. The average modulation current
deliveredbythechip at the MODA, MODBpinsiscalledI
M
.
The laser bias current, I
B
, is defined as the average current
inthelaser.I
B
isthedifferencebetweenthesourcecurrent
and average modulation current.
The peak-to-peak modulation current delivered by the
chip is called IMPP. IMPP is twice the value of IMbecause
the high speed data is assumed to have a 50% duty cycle.
The peak-to-peak modulation current is divided between
the termination resistor and the laser. The peak-to-peak
modulation amplitude in the laser is called IMOD. The
relationship between IMPP and IMOD depends on the
relative values of the termination resistor and the laser
dynamic resistance.
Figure 12. Simplified Laser Bias and Modulation Circuit
V
SS
I
M
I
S
= I
B
+ I
M
I
B
I
MOD
I
S
V
DD
MODA, MODB
11, 10
SRC
LTC5100
R
T
50Ω
TYP
C
T
10nF
I
MPP
= 2 • I
M
3.2Gbps
MODULATOR
14
Figure 13. Components of the LTC5100 Source and
Modulation Currents (The Laser Bias Current is Also Shown)
0
IM
ISIM
IB
IMPP
5100 F13
The relationships between the source, bias, and modula-
tion currents are as follows.
I
B
= I
S
– I
M
(1)
I
MPP
= 2 • I
M
(2)
IR
RR I
MOD T
TLD
MPP
=+
()
•
(3)
where
R
T
is the termination resistor value.
R
LD
is the dynamic resistance of the laser, defined in
Figure 15.
The expression for I
B
in Equation 1 shows that the maxi-
mum achievable laser bias current is a function of the
maximum source current, I
S
, and the average modulation

LTC5100
18
sn5100 5100fs
current, I
M
. The maximum value of I
S
is given in the
Electrical Characteristics and the value of I
M
depends on
thelasercharacteristicsandtheterminationresistorvalue.
The logic “1” and “0” current levels in the laser are given
by:
III
BMOD
12 =+
(4)
III
BMOD
02 =–
(5)
OPERATIO
U
Figure 14. Components of the Laser Bias
and Modulation Currents
0
I
B
I
TH
I
MOD
5100 F14
ThepowerlevelscorrespondingtoI1andI0areP1andP0,
as shown in Figure 16.
P1 = η(I1 – I
TH
) (6)
P0 = η(I0 – I
TH
) (7)
whereηistheslopeefficiencyandIthisthelaserthreshold
current, defined in Figure 16.
The average optical power and extinction ratio are given
by:
PPP
AVG
=+10
2
(8)
ER P
P
=1
0
(9)
The average voltage on the laser diode relative to ground
is V
LD
(see Figure 12 and Figure 15). The voltage on the
SRC pin is:
V
S
= V
LD
+ I
S
• R
T
(10)
= V
LD
+ (I
B
+ I
M
) • R
T
The value V
S
is important because V
S
must not exceed the
limits given in the Electrical Characteristics.
V
LD
V
I0 I
B
I
LD
5100 F15
I1
R
LD
Figure 15. Approximate VI Curve for a Laser Diode
Figure 16. Approximate LI Curve for a Laser Diode
P1
P
AVG
P0
L
I0I
TH
I
B
I
LD
I
MOD
5100 F15
I1
η
The voltage across the termination resistor is:
V
TERM
= V
SRC
– V
MODA
(11)
= Is • R
T
The LTC5100 can digitize the voltage across the termina-
tionresistor usingtheon-chipADC,which cangiveamore
accurate measurement of Is than that given by digitizing
thecurrentinternally. See theElectricalCharacteristicsfor
details.
Temperature Compensation
The LTC5100 digitally compensates the temperature drift
of the laser bias current, laser modulation current and

LTC5100
19
sn5100 5100fs
monitorphotodiode current.In eachcase thefundamental
calculation is the same. The LTC5100’s digital controller
multiplies the nominal value of the quantity (I
B
, I
M
or I
MD
)
byaquadratic function oftemperature.Temperature mea-
surements are supplied either by an on-chip temperature
sensor or by an external microprocessor, according to the
setting of Ext_temp_en. The general temperature com-
pensation formula is:
I = I_nom • (TC2 • 2
–18
• ∆T
2
+ TC1 • 2
–13
• ∆T + 1) (12)
where I is the digital representation of the laser bias
current, modulation current or monitor diode current (I
B
,
I
M
or I
MD
).
Whenusingtheinternaltemperaturesensor(Ext_temp_en
= 0), the temperature measurements are taken by the on-
chip ADC, and ∆T is the change in the LTC5100 die tem-
perature relative to a user defined nominal temperature:
∆T = T_int_adc – T_nom (13)
Whenusinganexternaltemperaturesource(Ext_temp_en
= 1), the temperature measurements are provided in
digitalformby a microprocessororhostcomputer and ∆T
is the change in temperature relative to a user defined
nominal temperature:
∆T = T_ext –T_nom (14)
T_int_adc,T_ext,andT_nomare10-bit,unsignednumbers
scaledat0.5K/LSB.Themaximumtemperaturethatcanbe
represented is therefore 2
10
• 0.5°K = 512°K or 239°C.
TC1 and TC2 are the first and second order temperature
coefficients. They correspond to the registers Im_tc1 and
Im_tc2 for modulation current, Ib_tc1 and Ib_tc2 for bias
current and Imd_tc1 and Imd_tc2 for monitor diode
current. In each case TC1 and TC2 are 8-bit signed
numbers in two’s complement format. The range of the
temperature coefficients is therefore –128 to +127. When
TC1 is multiplied by its weighting coefficient of 2
–13
in
Equation 12, the effective value of the first order tempera-
ture coefficient is 122ppm/°C per LSB. The full-scale
range is approximately ±15500 ppm/°C. When TC2 is
multiplied by its weighting coefficient of 2
–18
in Equation
12, the effective value of the second order temperature
coefficientis3.81ppm/°C
2
perLSB.The full-scale range is
approximately ±484 ppm/°C
2
.
Note that Equation 12 is applied to the digital representa-
tion of the currents, not the physical current themselves.
This is a particularly important point where monitor diode
currentis concerned,because thedigital representationof
the monitor diode current is the logarithm of the current.
Thus the temperature compensation is of the logarithm of
the monitor diode current and not the current itself.
Notation Used for Registers and Bit Fields
The LTC5100 has a large set of registers, many of which
aresubdividedinto fieldsofbits. Register namesaregiven
in all capitals (SYS_CONFIG) and bit fields are given in
mixed case (Apc_en). For example, the bit that enables
AutomaticPowerControlmodeiscontainedintheSystem
Configuration register. This bit is denoted by:
SYS_CONFIG.Apc_en
In many cases this bit field will simply be referred to as
“Apc_en.”
The functional diagrams of Figure 3 and Figure 4 show
registers and bit fields within registers between horizontal
bars. For example, the “Data” field in the ADC register is
shown as:
USER_ADC.Data
A write operation to this register is shown as:
USER_ADC.Data
A register read operation is shown as:
Peaking
Range Selection for the Source
and Modulation Currents
Thesourceandmodulationcurrentseachhavefourranges
of operation to optimize ADC and DAC resolution as well
as high frequency performance. The source current range
iscontrolledbytwobitscalledIs_rng.Similarly,themodu-
lationcurrentrangeiscontrolledbytwobitscalledIm_rng.
Themaximumcurrentthatcanbedeliveredisproportional
to the range, so the current output is 1, 2, 3 or 4 times the
typical base value of 9mA for the source current and
4.5mA for the average modulation current or 9mA peak-
to-peak.
OPERATIO
U

LTC5100
20
sn5100 5100fs
Figure 17 depicts the current ranges for the source cur-
rent. The guaranteed full scale is 6mA per range. The
minimum operating level should be limited to 1/16 of full
scale to avoid the coarse relative quantization seen in any
ADC or DAC when operated at low levels. The source
range, Is_rng, should be selected as low as possible such
that the source current, I
S
, stays within the guaranteed
current limits over temperature, considering the laser
temperature characteristics. From Equation 1 we can see
that the source current is the sum of the laser bias and the
average modulation currents:
I
S
= I
B
+ I
M
(15)
Is_rng should be chosen to support the total current
requiredforlaserbiasandmodulation,takingtemperature
changes in I
B
and I
M
into account.
Figure 18 depicts the current ranges for the average
modulation current. This is the average modulation cur-
rentattheMODAandMODBpinsofthechip(recallthatthe
MODA and MODB pins are connected on-chip). The peak-
to-peak modulation at the pins of the chip is twice the
average. Guaranteed full scale is 3mA average or 6mA pp
per range. The minimum operating level should be limited
to 1/8 of full scale to preserve the quality of the eye
diagram. Operating below 1/8 full scale causes increased
overshootandundershoot.Themodulationrange,Im_rng,
should be selected as low as possible such that the
modulation current, I
M
, stays within the guaranteed cur-
rent limits over temperature. The modulation current
varies over temperature to compensate the loss in slope
efficiencytypical ofmost VCSELs.Therefore, thechoice of
Im_rng should take temperature changes into account.
High Speed Aspects of the Modulation Output
TheLTC5100modulationoutput presents a resistive drive
impedancewithverylowreflectioncoefficient.Thisoutput
design suppresses ringing and reflections to maintain the
quality of the eye diagrams in spite of laser impedance
variations.Thereflection coefficient issufficientlylow that
the LTC5100 can drive the laser over an arbitrary length of
transmission line, as shown in Figure 19. A well designed
transmission line stretching the entire length of a typical
transceiver module goes virtually unnoticed in this sys-
tem.The onlypracticallimitation oninterconnectlengthto
the laser is high frequency line loss.
OPERATIO
U
Figure 17. Ranges for the Source Current
Figure 18. Ranges for the Modulation Current Figure 19. High Speed Details of the Modulation Output
0
9
Is_rng = 0
5100 F17
4.5
18
27
36
Is_rng = 1 RECOMMENDED
MINIMUM IS 1/16
OF FULL SCALE
Is_rng = 2
Is_rng = 3
I
S
(mA)
0
4.5
Im_rng = 0
5100 F18
9
13.5
18
Im_rng = 1 RECOMMENDED
MINIMUM IS 1/8
OF FULL SCALE
Im_rng = 2
Im_rng = 3
I
M
(mA)
V
SS
I
M
L
BWB
M1
I
S
= I
B
+ I
M
Z
O
= R
T
I
B
I
S
V
DD
SRC
MODA
MODB
LTC5100
R
T
50Ω
TYP
C
T
10nF
3.2Gbps
MODULATOR TRANSMISSION
LINE
14
11
10
C1 L
BWA