Linear ANALOG DEVICES EVAL-LTC6563-TQFN Quick setup guide

1
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
DESCRIPTION
LTC6563
Four-Channel Differential-Output Transimpedance
Amplifier with Output Multiplexing
Demonstration circuit EVAL-LTC6563-TQFN features
the LT C
®
6563 four-channel transimpedance amplifier
(TIA) with output multiplexing. This demo kit, EVAL-
LTC6563TQFN-EZKIT shipped along with the SDP-K1
controller board, has 4 installed single APD’s which allows
optical testing of the TIA functionality. Electrical testing
using an external lab pulse generator, as the input current
pulse, is also possible with small board modifications.
With its 20kΩ transimpedance gain and 90µA linear input
current range, the LTC6563 is ideal for LIDAR receivers
using Avalanche Photodiodes (APD). The LTC6563 oper-
ates from 3.3V single supply and consumes only 194mW
(depending on output mode) for 4 channels. Utilizing the
LTC6563’s output MUX, multiple LTC6563 devices can
be combined to a single output. The LTC6563’s fast over-
load recovery makes it well-suited for LIDAR receivers.
The LTC6563’s differential output can swing 2VP-P into
a 100Ω load, ideal for driving a high-speed ADC directly. All registered trademarks and trademarks are the property of their respective owners.
The LTC6563 is packaged in a compact 3mm × 5mm
24-pin leadless QFN package with an exposed pad for
thermal management and low inductance.
The EVAL-LTC6563-TQFN utilizes four installed 400-
1100nm APD sensors feeding the LTC6563 for current-
to-voltage conversion and amplification. The APDs are
DC-coupled to the TIAs to facilitate fast output multi-
plexing and channel switching. Alternatively, with small
board modifications, it is possible to electrically excite the
LTC6563 using a lab generator tied to SMA connectors
provided on the board and voltage-to-current resistors on
the board. The EVAL-LTC6563-TQFN is intended to dem-
onstrate time-domain measurements into 50Ω systems.
NOTE:This document applies to EVAL/Demo boards
which have Rev. A3 label attached to the bottom side.
Design files for this circuit board are available.
Figure1. Connection Diagram (IN1 to IN4 Optional for Electrical Testing Only)

2
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
DESCRIPTION
Figure2. LTC6563 EVAL Board Top Side
Figure3. LTC6563 EVAL Board Back Side

3
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
QUICK START PROCEDURE
Use with SDP-K1 Controller Board
The DEMO kit is supplied with the SDP-K1 controller
board plugged-in directly below the EVAL board. The
SDP-K1, when connected to a PC, using the supplied
USB cable, with an installed serial port terminal program
like Coolterm, allows the user to power the EVAL board
and also to control and save the LTC6563 operating state
and analog control voltages. The only other power supply
needed is the HV (–120V) DC power for APD biasing.
For optical pulse testing, an external laser source is
needed to excite the on-board APDs. The TIA differential
output voltage can then be monitored by driving an ADC
(tied to output SMAs) analog input(s), or by using a dual
channel oscilloscope. With the laser pulses illuminating
the selected APD (one of four), the optical response will
be displayed on the oscilloscope and Coolterm can be
used to manipulate and save (nonvolatile) the LTC6563
operating conditions and control voltages.
The pre-programmed SDP-K1 controller board performs
the following functions:
1. Power the EVAL-LTC6563-TQFN EVAL board. NOTE:
TheAPDhigh-voltagebiasmustbeprovidedseparately
through P7.
2. Control the LTC6563 analog control functions (Offset,
HI, CM, and Tilt) using the on-board DAC.
3. Control the I/O States (CHSEL0, CHSEL1, OMUX,
PWRMD (also called SHDN on the board silkscreen
and schematic), ADJ1, ADJ0).
4. Write the values/states of these same functions into
the on-board EEPROM to be retrieved automatically
upon power-up.
5. Store the settings in the EEPROM.
6. Return the device to the default factory state/DAC
values.
Quick Setup with SDP-K1 Controller Board
To allow the operation of EVAL-LTC6563-TQFN using
SDP-K1:
1. DownloadCooltermorothersimilarUSB-serialterminal
applicationprogramoffthe web (ifnotalreadyinstalled)
using the link shown under the Equipment List.
2. Launch Coolterm.
3. Plug the SDP-K1 onto the bottom of EVAL-LTC6563-
TQFN as shown in Figure4 (if not already).
4. Go to the Default Factory hardware Settings listed in
Figure7 (if not already):
a. Move EVAL-LTC6563-TQFN S1 switch to the right
(towards connector P11, see Figure4) to power
the EVAL board using the SDP-K1 if not already.
Figure4. SDP-K1 Connection (WARNING: HIGH VOLTAGE PRESENT!)

4
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
QUICK START PROCEDURE
Figure6. Coolterm Options Setting
Figure7. Coolterm Screen after Successful Linkage to SDP-K1
Figure5. USB Serial Port Assignment Verification
b. Move the miniature shorting jumpers (10 places)
near P8, and P9 towards P8, and P9 (towards the
top side of the board) if not already.
5. Plug the USB cable into the PC and to the SDP-K1.
6. Launch Coolterm.
7. One Time Setup/Setting:
a. In Windows Device Manager look for the USB Se-
rial Device port used. COM7 is used in this case
as shown:
b. In Coolterm, click Options and set the Port pull-
down to the COM port found earlier (e.g. COM7).
Furthermore, set the baud rate to 115200 as show
below. Click OK to close. See Figure6.
c. In Coolterm, click Connect, Disconnect, Connect in
succession until the following screen is displayed.
The register values may differ on your setup from
the values shown in Figure7.

5
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
QUICK START PROCEDURE
LTC6563 ADJUSTMENTS AND CONTROLS
Figure8. OUT and OUTBAR Typical Waveforms
Now the board(s) are connected and the commands in the
Coolterm Command Summary can be executed.
7. Apply the external –120V DC power supply to P7 (pin
2) with pin 1 tied to power supply ground. This is the
appropriate bias voltage for the APDs installed on
the board. The connector and passives are rated up
to 300V. See Figure4 for the proper P7 high voltage
polarity connection.
8. Using a coax cable, tie OUT SMA to the oscilloscope
Ch1 set to 50Ω termination, 0.2V/div.
9. Usingacoaxcable,tieOUTBAR SMA totheoscilloscope
Ch2 set to 50Ω termination, 0.2V/div.
10. Usinganexternal400nm to 1100nm wavelength pulsed
laser, similar to the one identified in the Equipment
List as the ST micro light source, illuminate the APDs,
which are identified in Figure1. With the default board
setting which selects IN1 or Ch1 (CHSEL0 = CHSEL1 =
0), position the laser to illuminate the Ch1 APD (D1).
11. With a 5ns duration laser pulse width from this light
source, the Figure8 typical scope waveforms can be
expected at OUT and OUTBAR SMAs (Ch1: OUT, Ch2:
OUTBAR):
Setting DAC Voltages
With the Set DAC command in Coolterm (invoked by enter-
ing 2 and Enter), each of the 4 DAC outputs (4 places)
can be varied from 0V to 2.5V (or using decimal equiva-
lent from 0 to 65,536). Once the voltages are set, Store
Settings to EEPROM (command 3, and Enter) will save
the modified DAC values (and I/O pin states described
further below) to the EEPROM. These voltages, along with
I/O pin states, will be automatically recalled and written
to the DAC and I/O states upon the next power cycle for
easy return to last saved operating conditions. CAUTION:
To avoid getting the wrong DAC voltage, do not exceed
2.5V (0xFFFF) when entering a DAC voltage.
The Current State in Coolterm shows the current settings
of all the registers for easy reference.
The LTC6563 EVAL board is now setup and under the
SDP-K1 control for adjustment and control (if needed).
Here is a summary of these default conditions set at the
factory:
•IN1 selected (CHSEL0 = CHSEL1 = 0)
•OMUX = Logic HI (output MUX active)
•PWRMD =Logic HI (Inactive channels/inputs pow -
ered up)
• Maximum output current (ADJ0 = ADJ1 = 1)
• Offset correction off ((offset) = 0V)
• Output Clamp not used ((HI) = 2.5V)
• CM set to 1V ((CM) = 1V)
• Tilt set to 0V ((Tilt) = 0V)
• RL_EXT (external differential load) = 100Ω (oscillo-
scope inputs set to 50Ω)

6
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
LTC6563 ADJUSTMENTS AND CONTROLS
OPERATING THE BOARD IN STAND-ALONE MODE (WITHOUT SDP-K1)
Table1. Operation Modes Summary
CONDITION/SETUP STAND-ALONE OPERATION
(See Figure2)
OPERATION WITH SDP-K1
(See Figure4)
NOTES
Switch S1 Slide to the left Slide to the right S1 used to switch between external 5V power sources or
5V from SDP-K1.
External +5V power to
VIN and GND turrets
Required. >0.5A capable Not required. Remove any external
power supply connections
SDP-K1 (if present) provides the 5V power for the 3.3V
LDO on-board and no external power supply is needed.
Jumpers P1-P4
(4 places, near P8)
Move to lowest positions on
the board (towards P11),
3-pin connector. Need external
voltage to drive turrets
Move to highest positions on the
board (towards P8), 3-pin connector.
SDP-K1 will set these voltages
Device analog control inputs (4 places) controlled by SDP-
K1 (if present). Otherwise, control voltages (turrets next to
these 3-pin jumpers) must be tied to appropriate external
voltage sources/DACs for control with P1 to P4 shorting
jumpers moved towards these turrets.
Jumpers P13 to P15
and P19 to P21
(6 places, near P9)
Move to lowest positions on
the board (towards P10), 3-pin
connector to select 1 or 0
Move to highest positions on the
board (towards P9), 2-pin connector.
SDP-K1 will set these voltages
Device I/O control inputs (6 places) controlled by SDP-K1
(if present). Otherwise, control voltages can be set by
placing the shorting jumper in the A silkscreen location for
1, or B silkscreen position for 0.
•TERM and TERMBAR shorted to OUT and OUTBAR
respectively (through R47, R48 0Ω resistors on the
board)
Setting I/O Pin States
With the Set IO command, activated by entering 1 and
Enter, the following device pin states can be set to either
0 or 1.
Select I/O Pin:
1 - CHSEL0 Pin
2 - CHSEL1 Pin
3 - OMUX Pin
4 - PWRMD Pin
5 - ADJ1 Pin
6 - ADJ0 Pin
If necessary or desired, the LTC6563 EVAL board can be
operated without the SDP-K1. For this mode of operation,
the board should be powered externally (5V DC power
supply) and switch S1 positioned per Table1. The I/O pins
and analog control voltage shorting jumpers on the board
(10 places total) need to be moved per Table1. These
shorting jumpers allow setting the I/O pins (6 places) to
either 0 or 1. With the analog control voltage jumpers (4
Once in Set IO command mode in Coolterm, enter a num-
ber between 1-6 (followed by Enter) corresponding to the
pin state to be changed.
Next, enter either 0 or 1, and SDP-K1 will set the selected
pin to the state specified.
NOTE: The board silkscreen and schematic calls PWRMD
pin as SHDN.
Saving Default State
To save the DAC voltages and I/O pin states onto the
EEPROM, enter command 3 and Return. To return the
board to the default factory settings, enter command 4
followed by Enter.
places) moved, the required DC voltage (from 0V to 2.5V)
should be supplied to all 4 turrets/posts on the board
externally using any of the following:
•DACs.
• DC control voltages such as lab power supplies.
• Potentiometers placed between ground and VCC.

7
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
OPERATING THE BOARD IN STAND-ALONE MODE (WITHOUT SDP-K1)
Figure9. OUT and OUTBAR Typical Waveforms
1. Power:
a. Stand-aloneOperation:MoveswitchS1slidertothe
left (towards VIN test point), connect a low-noise
5V power supply between VIN and GND test points
to power the board.
2. Apply the external -120V DC power supply to P7 (pin
2) with pin 1 tied to power supply ground. This is
the appropriate bias volage for the APDs installed on
the board. The connector and passives are rated up
to 300V. See Figure4 for the proper P7 high voltage
polarity connection.
3. Connect OUT and OUTBAR SMAs to an oscilloscope
with at least two channels that is 50Ω terminated on
each input. The output(s) are DC coupled. With the
deviceinternal50Ω terminations(TERMandTERMBAR
pinstiedto OUT andOUTBARrespectively),eachoutput
will then see a net 25Ω load or 50Ω diff load.
4. Move the board jumpers to the positions stated in
Table1 for stand-alone operation.
5. Analog Controls: The following are analog controls
which can be varied by applying the voltage desired
to the turrets (test points) on the board (see Table1):
CM, Tilt, Offset, HI.
The allowable voltage range on these four turrets are
0V – 2.5V. Alternatively, SDP-K1 (if present) controller
board can vary these via a DAC (U2) on-board.
Move the miniature 3-pin shorting jumpers next to
each of these four turrets to the bottom (away from
P8) for external voltage control, or alternatively to the
top (towards P8) for SDP-K1 (if present) control.
6. Digital Controls: The following device pins can take on
either 0 or 1 state (3.3V):
CHSEL0, CHSEL1, MUX, SHDN (or PWRMD), ADJ1,
ADJ0.
Move the miniature 3-pin shorting jumpers next to
each turret to the bottom (away from P8, silkscreen
A) for state 1, or to the top (towards P8, silkscreen B)
for state 0.
Alternatively, remove the shorting jumpers from these
6 jumpers and move to the top 2 pin headers next to
each control, in order to enable SDP-K1 (if present)
control instead.
7. Apply a 400nm to 1100nm wavelength pulsed laser,
similar to the one identified in the Equipment List as
the ST micro light source, to the APDs, which are
identified in Figure1. With a 5ns duration laser pulse
width from this light source, the Figure9 typical scope
waveformscanbe expected at OUT andOUTBAR SMAs
(Ch1: OUT, Ch2: OUTBAR):
TheLTC6563 EVAL boardisnow setupinstand-alonemode.

8
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
GENERAL DESCRIPTION
Power supply
3.3V power is generated on-board using LT3045 (U3) low
noise LDO at either VCCI or VCCO test point. Input power
is either applied externally at VIN test point and ground,
or, alternatively, the 5V from the SDP-K1 board (if pres-
ent) is used as the raw input power source. Move switch
S1 to the left (away from P11 to use an external power
supply and to the right (towards P11) to use the SDP-K1
(if present) 5V power.
U3 powers both LTC6563 supply rails (VCCI and VCCO)
which are tied together at one point on the board through
a 0Ω resistor (R49). VCCI and VCCO both should read
close to 3.3V when powered properly.
APD Negative Bias
To be applied between P7-1 (GND), and P7-2 (APD bias).
Range is –70V to –200V depending on the temperature.
–120V is used for this board testing at the factory. Use
caution when handling the board because of this high
voltage.
Figure10. Shorting Blocks Position to Switch between DAC Control vs External Voltage Control
Board ID EEPROM
Mounted on the board bottom (U5). Used to identify
the board when SDP-K1 (if present) is plugged onto the
board. In addition, the EEPROM will restore the device to
the last saved state and DAC settings at power up.
CM, Tilt, Offset, HI Controls
These LTC6563 control voltages can be externally applied
to the board test points designated as such on the board
silkscreen. Alternatively, there is a 4-channel 10-bit DAC
(LTC2634, U2) on the EVAL board which can be used
to control these 4 pins with the SDP-K1 board (if pres-
ent). To use the DAC for control, move the corresponding
shorting jumper (1P1 to 1P4, 3 pins select, 4 jumpers)
towards the board top edge (toward P8), as highlighted in
Figure10. For information about these control voltages,
consult the LTC6563 data sheet.

9
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
INPUT CIRCUIT DESCRIPTION
OUTPUT CIRCUIT DESCRIPTION
Figure11. Input Stage Configuration Schematic
Input to the LTC6563 can be provided either optically
(APD, D1 to D4 with appropriate negative bias applied
to P7 pin 2 and pin 1 ground) the way the EVAL board
is configured at the factory, or electrically using a lab
generator tied to SMA’s (IN1 to IN4) once the board is
modified for electrical testing. The default board setting is
for using APD’s with R39 to R42 set to 0Ω; the resistors
feeding the IN1 to IN4 SMA inputs (R64 to R67) are set
to DNI (Do not install) which can be added to the board
The output SMAs (OUT and OUTBAR) are configured to
drive the differential analog inputs of appropriate ADCs
directly. For testing purposes, these SMAs are to be tied to
an oscilloscope terminated in 50Ω. The LTC6563 provides
current output;an appropriate load resistor is required to
create the voltage signal. TERM and TERMBAR pins have
internal 50Ω resistors and also allow CM control of the
outputs. These pins are tied to OUT and OUTBAR current
outputs respectively on the board (through R47, and R48
0Ω resistors) to create the differential output voltage sig-
nals. With 50Ω scope inputs tied to OUT and OUTBAR,
each LTC6563 output is loaded with 50Ω equivalent exter-
nal load to ground or 100Ω external differentially.
(e.g. 2kΩ) for voltage-to-current conversion. With electri-
cal testing, the APD’s can be disconnected by removing
R39-R42 (4 places).
For electrical testing purposes, follow these steps:
1. Install R64- R67 (2kΩ).
2. Remove R39-R42 (0Ω) optical coupling resistors.
3. Apply the electrical inputs to IN1 – IN4 SMAs.
Output common-mode voltage can be controlled by apply-
ing a voltage to the CM turret/test point or alternatively
using SDP-K1 (if present) and proper board jumper set-
tings. If the CM pin is not driven, it will float to a default
voltage of 0.9V on a 3.3V supply. The VCM pin should be
bypassed with a high-quality ceramic bypass capacitor
(C2 = 680pF on the current board).
Additional differential-mode filtering and ADC (if used at
OUT and OUTBAR) charge kick-back storage is offered by
using the R51, C24, R52 positions, if necessary, for the
ADC being considered.

10
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
OUTPUT CIRCUIT DESCRIPTION
Figure12. Output Configuration Schematic
Selecting Channels
The LTC6563’s multiplexing capability allows compact
multichannel designs without external multiplexers,
using the CHSEL1 (MSB) and CHSEL0 (LSB) device pins
to select 1:4 channels. To select the active channel, the
jumpers shown in Figure13 can be used. With the jumper
in the 1 position (side farthest from P9, silkscreen A), the
channel select pin will be tied to VCCI. In the 0 position
(side closest to P8, silkscreen B), the channel select pin
is grounded. Refer to Table2 below for channel selection.
Alternatively, channel selection may be provided by SDP-
K1 (if present) with the manual channel selection jump-
ers lifted out and instead moved to the 2 pin headers
just above, as shown schematically in Figure13 (from
DC2026C which refers to the SDP-K1 board).
Table2. Channel Selection
CHSEL1 CHSEL0 ACTIVE CHANNEL
001
012
103
114
To evaluate the LTC6563 channel-to-channel switching
times, the center pin of the channel selection 3-pin jump-
ers can be tied to a high-speed pattern/pulse generator
(with the plastic shorting block(s)/jumpers not used).
These connections may need additional 50Ω termination
resistors for best signal integrity.

11
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
OUTPUT CIRCUIT DESCRIPTION
Figure13. Channel Select Options
EQUIPMENT LIST
A. Demo Board Kit Contents:
1. LTC6563 EVAL Board.
2. SDP-K1 Microcontroller (plugged onto the bottom of the LTC6563 EVAL board): Find information here.
3. USB Cable
B. Dual-channel oscilloscope (e.g. Keysight MSO-X 6004A, or equivalent).
C. 905nm optical light source such as:
• Light Source (ST Micro): https://www.st.com/content/st_com/en/products/ecosystems/stm32-open-
development-environment/stm32-nucleo-expansion-boards/stm32-ode-sense-hw/x-nucleo-53l0a1.html
• Controller (requires programming): https://www.st.com/content/st_com/en/products/evaluation-tools/product-
evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-f401re.html
D. Windows PC (WIN 10)
E. Coolterm (or equivalent) serial port terminal application download:
https://download.cnet.com/CoolTerm/3000-2094_4-10915882.html
F. High-Voltage APD Bias DC Power Supply (HP6209B or equivalent) capable of at least 120V.
G. SMA to BNC coax cables (2 each) of similar length.

12
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
SCHEMATIC DIAGRAM
REMOVE FOR ELECTRICAL TESTING REMOVE FOR ELECTRICAL TESTING
REMOVE FOR ELECTRICAL TESTING
REMOVE FOR ELECTRICAL TESTING
0.1 UF CAP FOR R22 0.1 UF CAP FOR R21 DEVICE. TO PWRMD PIN ON THE NOTE: SHDN CORRESPONDS
0.1 UF CAP FOR R24
APD INPUTS
0.1 UF CAP FOR R23
WARNING
SMA INPUTS
INSTALL FOR ELECTRICAL TESTING
INSTALL FOR ELECTRICAL TESTING INSTALL FOR ELECTRICAL TESTING INSTALL FOR ELECTRICAL TESTING
POSSIBLE HIGH VOLTAGE
24-LEAD PLASTIC QFN
OUTPUT TRACE ARE MATCHED LENGTH
23
<DESIGN_VIEW>
: LTC6563
Product(s): LTC6563
HW TYPE : Customer Evaluation Z
1:1
E
02_057283
J VILLANUEVA
FTS-103-01-F-S
10K
33
0 0
49.9
SMA-J-P-H-ST-TH1 SMA-J-P-H-ST-TH1
SMA-J-P-H-ST-TH1
SMA-J-P-H-ST-TH1
100
49.9
FTS-103-01-F-S
DNI
4.7PF
142-0701-801
49.9
DNI
0
0.1UF
0
0
LTC6563
0.1UF
BKH1005LM182-TBKH1005LM182-T
142-0701-801
0
10K
C1206
680PF
0
49.9
0
FTS-102-01-F-S
0.1UF
2K
DNI
0
10K
0
100
DNI
100 100 100
100
FTS-103-01-F-S
BLK BLK
33 33
10K10K
2000V
C1206
R1206
450V450V
2K 2K
R1206
1000PF
MC000046
10UF
10UF
1UF
1UF
501557
33
FTS-103-01-F-S
BLK BLK
C1206H71
0.1UF
33
33 33
10K
R1206
10K
2000V
1000PF
FTS-103-01-F-S
680PF
BLK BLK
33
680PF
680PF
DNI
SD101CWS-7-F
2K
33
C1206H71
0.1UF
100
680PF
FTS-103-01-F-S
10K
DNI
DNI
DNI DNI
100
680PF
0
0.1UF
FTS-102-01-F-S
FTS-103-01-F-S
FTS-102-01-F-S
R1206
501557
R1206
C1206H71
450V
0.1UF
49.9
0
C1206H71
450V
0.1UF
501557
BLK
FTS-103-01-F-S
FTS-102-01-F-S
FTS-102-01-F-S
0.1UF
FTS-103-01-F-S
0.1UF
FTS-103-01-F-S
33
FTS-102-01-F-S
501557
49.9
R1206
0
R17
R32
D2
IN4
P14
SHDN
C28
R47
R50
E2
U4
C3
R52
C17
C21
C1
C20
R56
OUTBAR
MUX
R64
R54 R53
D5
C19
OUT
R49
C29
C25
R4
R8
R3
R67
R7
R66
R2
R6
R65
R1
C7
C8
R29
C12
R34
C11
R33
R30
C9
P7
D4
C10
R11 R10
R9
R13
C4
R16
R12
R25
P2 P1 P3 P4
P13
P21
P19
VCCI
TILT CM HI
VCCO
IN1 IN3
R14
C2
OFFSET
R55
IN2
R5
CHSEL0
ADJ0
R15
C18
R46
C22
E1
R48
R23
R26 R19
ADJ1
P20
D1 D3
R31 R39
R40 R41
GND1
R20
R24
CHSEL1
R27 R28
P15
R21
R22
R18
R51
R42
VCCI
DC2026C_CHSEL0
VCCI
LTC6563_HI LTC6563_ADJ0 LTC6563_ADJ1
VCCI
LTC6563_O_MUX
DAC_TILT
LTC6563_SHDN
IN3 IN2
LTC6563_TILT
LTC6563_CHSEL1
IN2
LTC6563_OFFSET
VCCIVCCO
IN4
VCCI
DC2026C_CHSEL1
IN4 IN1
LTC6563_CHSEL1
LTC6563_CHSEL0
LTC6563_OFFSET
LTC6563_HI
DAC_CM
LTC6563_CM
IN1
IN3
DAC_HI DAC_OFFSET
DC2026C_ADJ0
VCCI
LTC6563_ADJ1 DC2026C_ADJ1
LTC6563_ADJ0
IN1 IN3 IN2
LTC6563_CM LTC6563_TILT
VCCI
LTC6563_CHSEL0
DC2026C_SHDN
LTC6563_O_MUX
VCCI
DC2026C_O_MUX
LTC6563_SHDN
VCCO
IN4
2
1 3
1 2
1 2
1
13
5
4
1
14
2
2
5
1
CA
1
345
1
234
1
2
PAD 1
1
1 2 3 1 2 3 1 2 3 1 2 3
1 3 1 2 3 2 2
1 2
2
1 2
1
3
18
20
PAD
15
1
1
1
3
16
3
PAD 1 PAD
PAD
2
2 1 3
GND
GND GND GND
GND
GND
GND
GNDGND
GND
GND
GND GND
GND GND GND
GNDGNDGND
GND
GND
GND
GND GND
CHSEL0 CHSEL1
TERM_N
OUT_N
OMUX
VCCI
PWRMD
GND
IN3
ADJ1 ADJ0
IN2
GND
IN1
GND
TILT
OFFSET
VCCO
OUT
TERM
HI
CM
GND
IN4
GND
GND
GNDGND GNDGND GNDGND GNDGND
GND GND
GND GND
GND GND GND GND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC. IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS, OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
A
C
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE OR
DRAWING NO.
2
SCALE
D
D
D
SIZE
D
REV
SHEET
1
1
A
2
3
4
3
5
8
D
7
67
8
A
B
CC
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL G
E
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
E
AN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER DESIGN VIEW
REV DATE

13
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
SCHEMATIC DIAGRAM
DC2026C SDP-K1 INTERFACE
LTC2634 DAC
BOARD ID EEPROM
THE LTC2634-L WITH 3.3V SUPPLY DEVELOPS AN INTERNAL VREF OF 2.5V. A 0V TO 2.5V DAC OUTPUT IS SUFFICIENT TO EXERCISE THE LTC6563 ANALOG INPUTS
8-LEAD SOIC_N
POWER SUPPLY
8-LEAD SOIC_N
33
<DESIGN_VIEW>
: LTC6563
Product(s): LTC6563
HW TYPE : Customer Evaluation Z
1:1
E
02_057283
J VILLANUEVA
10K
LTC2634IMSE-LMI10#PBF
0.1UF
10K
33.2K
RED
BLK
150
4.7UF
MSOP12_PAD2_845X1_651 LT3045HMSE#PBF
110
SML-LX0603GW-TR
10K
0.1UF
10K
10UF
ADT7311WTRZ
0.1UF
DNI
10K
10K
10K
SSQ-106-03-G-S
0.47UF
SSQ-108-03-G-S BLK
JS202011JAQN
BLK
10UF
0
0
SSQ-108-03-G-S SSQ-110-03-G-S
DNI
0.1UF
DNI
10K
DNI
DNI
24AA256-I/SN
10K
SML-LX0603GW-TR
R44
P8
P10
P11
U3
R45
C15
C14
C16
C26
C27
U5
C5
R57
R60
R58R59
R62
DS2 R63
DS1 R61
C13
R68
R69
R70
R71
TP4
U2
GND
REF
P9
VIN
C6
R43
U1
S1
DC2026C_VIN
EEPROM_SCL
+5V_DC2026C_VOUT
TEMP_CS
VCCI VCCI
EEPROM_SDA
SPI_MOSI
SPI_SCK
VCCI
DAC_CS
VCCISPI_MISO
EEPROM_SCL
SPI_SCK SPI_MOSI TEMP_CS DC2026C_CHSEL0 DC2026C_CHSEL1 DC2026C_ADJ0 DC2026C_ADJ1 DC2026C_O_MUX DC2026C_SHDN
DC2026C_VIN
EEPROM_SDA
+5V_DC2026C_VOUT
VCCI
DAC_OFFSET
DAC_HI DAC_CS
SPI_SCK SPI_MOSI
DAC_CM DAC_TILT
SPI_MISO
6
1
1 2 3 4 5 6 7 8
1
2
3 4 5 6 7 8
9
10
1 2 3 4 5 6 1 2 3 4 5 6 7 8
4
PAD
9
6 1 2 3
11 12 10
5 7 8
4 3 2 7
5
1 2 3 6
5
8 4
7
2 6
1 5 3 7
8
OUTIN
EPAD
OUT
OUTS
GND
SET PGFB ILIM PG EN/UV IN IN
PAD
GND
VOUTD VOUTC
REF
SDISCK
CS_N/LD VOUTB VOUTA VCC
GND
GND
GND
VSS
VCC
WP A2 A1 A0 SCL
SDA
GND
GND
GND
GND
DGND
VDD
GND
CT
INTCS_N
DIN DOUT SCLK
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC. IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS, OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
A
C
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE OR
DRAWING NO.
2
SCALE
D
D
D
SIZE
D
REV
SHEET
1
1
A
2
3
4
3
5
8
D
7
67
8
A
B
CC
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL G
E
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
E
AN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER DESIGN VIEW
REV DATE

14
DEMO MANUAL
EVAL-LTC6563-TQFN
Rev. 0
 ANALOG DEVICES, INC. 2022
03/22
www.analog.com
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and
conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation
Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”)
and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to
Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and
agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted
is expressly made subject to the following additional limitations:Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board;and (ii) permit any Third
Party to access the Evaluation Board. As used herein, the term “Third Party”includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is
NOT sold to Customer;all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all
be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of
use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile
or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited
to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS
Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF
LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS”AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY
DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS
LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING
BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE
HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States
federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts
(excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits
to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.