MagnaChip MC80F0424 User manual
Version 0.2
Published by
MCU Application Team
2005 MagnaChip Semiconductor Ltd. All right reserved.
Additional information of this manual may be served by MagnaChip semiconductor offices in Korea or Distributors and Representatives.
MagnaChip semiconductor reserves the right to make changes to any information here in at any time without notice.
The information, diagrams and other data in this manual are correct and reliable; however, MagnaChip semiconductor is in no way re-
sponsible for any violations of patents or other rights of the third party generated by the use of this manual.
Version History
Ver 0.2 (MAR, 2005) this book
FLASH memory feature is included.
Ver 0.1 (MAR, 2005)
First release version.
Preliminary MC80F0424/0432/0448
MAR. 2005 Ver 0.2
CONTENTS
1. OVERVIEW .................................................................................................................................................... 1
1.1 Description .............................................................................................................................................. 1
1.2 Features .................................................................................................................................................. 1
1.3 Development Tools ................................................................................................................................. 2
1.4 Ordering Information .........................................................................................................................3
2. BLOCK DIAGRAM ........................................................................................................................................ 4
3. PIN ASSIGNMENT ........................................................................................................................................ 5
4. PACKAGE DIAGRAM ................................................................................................................................... 7
5. PIN FUNCTION .............................................................................................................................................. 9
5.1 MC80F0424/0432/0448 Pin Description ............................................................................................... 10
6. PORT STRUCTURES .................................................................................................................................. 13
7. ELECTRICAL CHARACTERISTICS ........................................................................................................... 17
7.1 Absolute Maximum Ratings .................................................................................................................. 17
7.2 Recommended Operating Conditions ................................................................................................... 17
7.3 A/D Converter Characteristics .............................................................................................................. 17
7.4 DC Electrical Characteristics ................................................................................................................ 18
7.5 AC Characteristics ................................................................................................................................ 19
7.6 Serial Interface Timing Characteristics ................................................................................................. 20
7.7 Typical Characteristic Curves ............................................................................................................... 21
8. MEMORY ORGANIZATION ........................................................................................................................ 24
8.1 Registers ............................................................................................................................................... 24
8.2 Program Memory .................................................................................................................................. 26
8.3 Data Memory ........................................................................................................................................ 30
8.4 Addressing Mode .................................................................................................................................. 36
9. I/O PORTS ................................................................................................................................................... 40
10. CLOCK GENERATOR .............................................................................................................................. 44
11. BASIC INTERVAL TIMER ......................................................................................................................... 46
12. WATCHDOG TIMER ................................................................................................................................. 48
13. WATCH TIMER .......................................................................................................................................... 51
14. TIMER/EVENT COUNTER ........................................................................................................................ 52
14.1 8-bit Timer / Counter Mode ................................................................................................................. 56
14.2 16-bit Timer / Counter Mode ............................................................................................................... 62
14.3 8-bit Compare Output (16-bit) ............................................................................................................. 63
14.4 8-bit Capture Mode ............................................................................................................................. 64
14.5 16-bit Capture Mode ........................................................................................................................... 68
14.6 PWM Mode ......................................................................................................................................... 71
15. ANALOG TO DIGITAL CONVERTER ....................................................................................................... 75
MC80F0424/0432/0448 Preliminary
MAR. 2005 Ver 0.2
16. SERIAL INPUT/OUTPUT (SIO) ................................................................................................................. 78
16.1 Transmission/Receiving Timing .......................................................................................................... 79
16.2 The method of Serial I/O ..................................................................................................................... 81
16.3 The Method to Test Correct Transmission .......................................................................................... 81
17. UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART) ................................................... 82
17.1 UART Serial Interface Functions ........................................................................................................ 82
17.2 Serial Interface Configuration ............................................................................................................. 83
17.3 Communication operation ................................................................................................................... 85
17.4 Relationship between main clock and baud rate ................................................................................ 86
17.5 Communication operation ................................................................................................................... 87
18. BUZZER FUNCTION ................................................................................................................................. 88
19. INTERRUPTS ............................................................................................................................................ 90
19.1 Interrupt Sequence ............................................................................................................................. 92
19.2 BRK Interrupt ...................................................................................................................................... 94
19.3 Shared Interrupt Vector ....................................................................................................................... 94
19.4 Multi Interrupt ...................................................................................................................................... 95
19.5 External Interrupt ................................................................................................................................ 96
20. OPERATION MODE .................................................................................................................................. 98
20.1 Operation Mode Switching .................................................................................................................. 99
21. POWER SAVING OPERATION .............................................................................................................. 101
21.1 Sleep Mode ....................................................................................................................................... 101
21.2 Stop Mode ......................................................................................................................................... 102
21.3 Stop Mode at Internal RC-Oscillated Watchdog Timer Mode ........................................................... 105
21.4 Minimizing Current Consumption ...................................................................................................... 107
22. OSCILLATOR CIRCUIT .......................................................................................................................... 109
23. RESET ..................................................................................................................................................... 110
24. POWER FAIL PROCESSOR ................................................................................................................... 111
25. FLASH PROGRAMMING ........................................................................................................................ 113
25.1 Lock bit .............................................................................................................................................. 113
25.2 Power Fail Detection level ................................................................................................................ 113
26. Emulator EVA. Board Setting .............................................................................................................. 114
27. IN-SYSTEM PROGRAMMING (ISP) ....................................................................................................... 117
27.1 Getting Started / Installation .............................................................................................................. 117
27.2 Basic ISP S/W Information ................................................................................................................ 117
27.3 Hardware Conditions to Enter the ISP Mode .................................................................................... 119
27.4 Reference ISP Circuit Diagram and MagnaChip Supplied ISP Board .............................................. 120
INSTRUCTION MAP........................................................................................................................................... i
INSTRUCTION SET........................................................................................................................................... ii
MASK ORDER SHEET................................................................................................................................... viii
Preliminary MC80F0424/0432/0448
MAR. 2005 Ver 0.2 1
MC80F0424/0432/0448
MC80C0424/0432/0448
CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
WITH 10-BIT A/D CONVERTER AND UART
1. OVERVIEW
1.1 Description
The MC80F0424/0432/0448 is advanced CMOS 8-bit microcontroller with 48K/32K/24K bytes of ROM(FLASH). This is a powerful mi-
crocontroller which provides a highly flexible and cost effective solution to many embedded control applications. This provides the fol-
lowing standard features : 24K/32K/48K bytes of ROM(FLASH), 1.5K bytes of RAM, 8/16-bit timer/counter, watchdog timer, watch
timer, 10-bit A/D converter, 8-bit Serial Input/Output, UART, 6-bit buzzer driving port, 10-bit PWM output and on-chip oscillator and
clock circuitry. It also has 8 high current I/O pins with typical 20mA. In addition, the MC80F0424/0432/0448 supports power saving modes
to reduce power consumption.
1.2 Features
• 24/32K/48K Bytes On-chip ROM
• FLASH memory
- Endurance : 100 cycles
- Data retention time : 10 years
• 1.5K Bytes of On-chip Data RAM
(Included stack memory)
• Minimum Instruction Execution Time
- 333ns at 12MHz (NOP instruction)
• 57 I/O Ports at 64 pin
• One 8-bit Basic Interval Timer
• Four 8-bit and one 16-bit Timer/Event counter
(or three 16-bit Timer/Event counter)
• One Watchdog timer
• One Watch timer
• Two 10-bit PWM
• Three 8-bit Serial Communication Interface
- One SIO and two UART
• One Buzzer Driving port
- 488Hz ~ 250kHz@4MHz
• 16 channel 10-bit A/D converter
• Four External Interrupt input ports
• Fifteen Interrupt sources
- Basic Interval Timer(1), External input(4)
- Timer/Event counter(5), ADC(1)
- Serial Interface(3), WDT and Watch Timer(1)
• Built in Noise Immunity Circuit
- Noise filter
- 3-level Power fail detector [3.0V, 2.7V, 2.4V]
• Power Down Mode
- Stop, Sleep, Sub active, Sub sleep mode
• Wide Operating Voltage Range
- 2.7V to 5.5V @ (0.4~4MHz)
- 4.5V to 5.5V @ (0.4~12MHz)
• 0.4 ~ 12MHz Wide Operating Frequency Range
• 64SDIP, 64MQFP, 64LQFP type
• Operating Temperature : -40°C ~ 85°C
• Oscillator Type
- Crystal, Ceramic resonator, External clock
• Sub-clock : 32.768kHz crystal oscillator
FLASH MCU MASK MCU ROM RAM ADC PWM I/O PORT Package
MC80F0424 MC80C0424 24KB 1.5KB
16 channel 2 channel 57 port 64SDIP, 64MQFP
64LQFP
MC80F0432 MC80C0432 32KB 1.5KB
MC80F0448 MC80C0448 48KB 1.5KB
MC80F0424/0432/0448 Preliminary
2MAR. 2005 Ver 0.2
1.3 Development Tools
The MC80F0424/0432/0448 is supported by a full-featured mac-
ro assembler, an in-circuit emulator CHOICE-Dr.TM and OTP
programmers. There are two different type of programmers such
as single type and gang type. For mode detail, Refer to “25.
FLASH PROGRAMMING” on page 113. Macro assembler op-
erates under the MS-Windows 95 and upversioned Windows OS.
Please contact sales part of MagnaChip semiconductor.
Figure 1-1 Choice-Dr (Emulator)
Figure 1-2 PGM-Plus (Single writer)
Figure 1-3 Standalone GANG4 (Gang writer)
Software - MS-Windows based assembler
- MS-Windows based Debugger
- HMS800 C compiler
Hardware
(Emulator) - CHOICE-Dr.
- CHOICE-Dr. EVA 80C0x B/D
FLASH Writer - CHOICE - SIGMA I/II(Single writer)
- PGM Plus I/II/III(Single writer)
- Standalone GANG4 I/II(Gang writer)
Preliminary MC80F0424/0432/0448
MAR. 2005 Ver 0.2 3
1.4 Ordering Information
Table 1-1 Ordering Information of MC80F0424/0432/0448
Device name ROM Size RAM size Package
Mask version
MC80C0424K
MC80C0424Q
MC80C0424L 24K bytes
1.5K bytes K : 64SDIP
Q : 64QFP
L : 64LQFP
MC80C0432K
MC80C0432Q
MC80C0432L 32K bytes
MC80C0448K
MC80C0448Q
MC80C0448L 48K bytes
FLASH version
MC80F0424K
MC80F0424Q
MC80F0424L 24K bytes
MC80F0432K
MC80F0432Q
MC80F0432L 32K bytes
MC80F0448K
MC80F0448Q
MC80F0448L 48K bytes
MC80F0424/0432/0448 Preliminary
4MAR. 2005 Ver 0.2
2. BLOCK DIAGRAM
ALU
Interrupt Controller
Data
10-bit
ADC
8-bit
Counter
Timer/
Program
Memory
Data Table
PC
Watch/
Timer
Instruction
R1 R4
R2
PSW
System
controller
Timing
Generator
System
Clock Controller
Clock
Generator
RESET
XIN
XOUT
R10 / INT0
R11 / INT1 R40
R20~R23
Power
Supply
8-bit serial
R41
R42 / SCK
R43 / SI
R44 / SO
R45 / ACLK0
R46 / RxD0
R47 / TxD0
R3
Interface
Buzzer
Driver R6
R60 / AN0
R61 / AN1
R62 / AN2
R63 / AN3
R64 / AN4
R65 / AN5
R66 / AN6
R67 / AN7
(1.5K bytes)
10-bit
AVDD
AVSS
ADC Power
Supply
SP
R0
R00~R07
R7
R70 / AN8
R71 / AN9
R72 / AN10
R12 / INT2
R13 / BUZO R73 / AN11
Sub System
Clock Controller
R21 / SXIN
R22 / SXOUT
PWM
AX Y
SIO/UART0
R74 / AN12
R75 / AN13
R76 / AN14
R77 / AN15
R14 / T0O
R15 / EC0
R16
R17
R50 / INT3
R51 / EC1
R52 / T2O
R53 / PWM1O / T1O
R54 / PWM3O / T3O
R5
Watchdog
8-bit Basic
Timer
Interval
VDD
VSS
Decoder
R30
R31 / ACLK1
R32 / RxD1
R33 / TxD1
R34
R35
R36
R37
Memory UART1
Preliminary MC80F0424/0432/0448
MAR. 2005 Ver 0.2 5
3. PIN ASSIGNMENT
AN8 / R70
AN9 / R71
AN10 / R72
AN11 / R73
AN12 / R74
AN13 / R75
AN14 / R76
AN15 / R77
R00
R01
R02
R03
R04
R05
R06
R07
INT0 / R10
INT1 / R11
INT2 / R12
BUZO / R13
T0O /R14
EC0 / R15
R16
R17
R20
SXIN / R21
SXOUT / R22
R23
RESET
XIN
XOUT
VSS
VDD
R67 / AN7
R66 / AN6
R65 / AN5
R64 / AN4
R63 / AN3
R62 / AN2
R61 / AN1
R60 / AN0
AVDD
AVSS
R54 / PWM3O / T3O
R53 / PWM1O / T1O
R52 / T2O
R51 / EC1
R50 / INT3
R47 / TxD0
R46 / RxD0
R45 / ACLK0
R44 / SO
R43 / SI
R42 / SCK
R41
R40
R37
R36
R35
R34
R33 / TxD1
R32 / RxD1
R31 / ACLK1
R30
AN13 / R75
AN2 / R62
AN3 / R63
AN4 / R64
AN5 / R65
AN6 / R66
AN7 / R67
VDD
AN8 / R70
AN9 / R71
AN10 / R72
AN11 / R73
AN12 / R74 R21 / SXIN
R35
R34
R33 / TxD1
R32 / RxD1
R31 / ACLK1
R30
VSS
XOUT
XIN
RESET
R23
R22 / SXOUT
R61 / AN1
AVDD
AVSS
R54 / PWM3O / T3O
R53 / PWM1O / T1O
R52 / T2O
R51 / EC1
R50 / INT3
R47 / Tx0D
R46 / RxD0
R45 / ACLK0
R44 / SO
R43 / SI
R42 / SCK
R41
R40
R60 / AN0
R37
R36
AN14 / R76
R00
R01
R02
R03
R04
R05
R06
R07
INT0 / R10
INT1 / R11
INT2 / R12
BUZO / R13
T0O / R14
EC0 / R15
R16
AN15 / R77
R17
R20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
51
50
49
32
31
30
29
28
27
26
25
24
23
22
21
20
52
53
54
55
56
57
58
59
60
61
62
63
64
64MQFP
64SDIP 1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
MC80F0424/0432/0448K
MC80F0424/0432/0448Q
(Top View)
(Top View)
MC80F0424/0432/0448 Preliminary
6MAR. 2005 Ver 0.2
64LQFP
(Top View)
R37
R36
R35
R34
R33 / TxD1
R32 / RxD1
R31 / ACLK1
R30
VSS
XOUT
XIN
RESET
R23
R22 / SXOUT
R21/ SXIN
R20
R60 / AN0
AVDD
AVSS
R54 / PWM3O / T3O
R53 / PWM1O / T1O
R52 / T2O
R51 / EC0
R50 / INT3
R47 / TxD0
R46 / RxD0
R45 / ACLK0
R44 / SO
R43 / SI
R42 / SCK
R41
R40
R00
R01
R02
R03
R04
R05
R06
R07
NT0 / R10
INT1 / R11
INT2 / R12
BUZO / R13
T0O / R14
EC0 / R15
R16
R17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
AN1 / R61
AN2 / R62
AN3 / R63
AN4 / R64
AN5 / R65
AN7 / R67
AN7 / R67
AN8 / R70
AN9 / R71
AN10 / R72
AN11 / R73
AN12 / R74
AN13 / R75
AN14 / R76
AN15 / R77
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
VDD MC80F0424/0432/0448L
Preliminary MC80F0424/0432/0448
MAR. 2005 Ver 0.2 7
4. PACKAGE DIAGRAM
UNIT: INCH
2.280
2.260
0.022
0.016 0.050
0.030 0.070 BSC
0.140
0.120 min. 0.015
0.680
0.660
0.750 Typ.
0-15°
64SDIP
0.012
0.008
0.205 max.
20.10
19.90
24.15
23.65
18.15
17.65
14.10
13.90
3.18 max.
0.50
0.35 1.00 BSC
SEE DETAIL “A” 1.03
0.73
0-7°
0.36
0.10
0.23
0.13
1.95
REF
DETAIL “A”
UNIT: MM
64MQFP
MC80F0424/0432/0448 Preliminary
8MAR. 2005 Ver 0.2
1.60 max.
SEE DETAIL "A"
0.75
0.45
0-7°
0.15
0.05
1.00
REF
DETAIL "A"
UNIT: MM
10.00 BSC
12.00 BSC
12.00 BSC
10.00 BSC
0.38
0.22 0.50 BSC
1.45
1.35
64LQFP
Preliminary MC80F0424/0432/0448
MAR. 2005 Ver 0.2 9
5. PIN FUNCTION
VDD: Supply voltage.
VSS: Circuit ground.
AVDD: Supply voltage to the ladder resistor of ADC circuit.
AVSS: ADC circuit ground.
RESET: Reset the MCU.
XIN: Input to the inverting oscillator amplifier andinput to the in-
ternal main clock operating circuit.
XOUT: Output from the inverting oscillator amplifier.
R00~R07: R0 is an 8-bit CMOS bidirectional I/O port. R0 pins
with 1 or 0 written to the R0 Port Direction Register R0IO can be
used as outputs or inputs. The internal pull-up resistor can be con-
nected by using the pull-up selection register 0 (PU0).
R10~R17: R1 is an 8-bit CMOS bidirectional I/O port. R1 pins
with 1 or 0 written to the R1 Port Direction Register R1IO can be
used as outputs or inputs. The internal pull-up resistor can be con-
nected by using the pull-up selection register 1 (PU1).
In addition, R1 serves the functions of the various following spe-
cial features such as INT0 (External interrupt 0), INT1 (External
interrupt 1), INT2 (External interrupt 2), BUZO (Buzzer driver
output), T0O (Timer 0 output), EC0 (Event counter input 0).
R20~R23: R2 is an 4-bit CMOS bidirectional I/O port. R2 pins
with 1 or 0 written to the R2 Port Direction Register R2IO can be
used as outputs or inputs.
In addition, R2 serves the functions of the various following spe-
cial features such as SXIN (Sub clock input), SXOUT (Sub clock
output).
R30~R37: R3 is an 8-bit CMOS bidirectional I/O port. R3 pins
with 1 or 0 written to the R3 Port Direction Register R3IO can be
used as outputs or inputs. R3 operates as the high current output
port with typical 20mA at low level output.
In addition, R3 serves the functions of the various following spe-
cial features such as ACLK1 (UART1 Asynchronous serial clock
input), RxD1 (UART1 data input), TxD1 (UART1 data output)
R40~R47: R4 is an 8-bit CMOS bidirectional I/O port. R4 pins
with 1 or 0 written to the R4 Port Direction Register R4IO can be
used as outputs or inputs. The internal pull-up resistor can be con-
nected by using the pull-up selection register 4 (PU4).
In addition, R4 serves the functions of the various following spe-
cial features such as SCK (Serial clock), SI (Serial data input), SO
(Serial data output), ACLK0 (UART0 Asynchronous serial clock
input), RxD0 (UART0 data input), TxD0 (UART0 data output).
R50~R54: R5 is an 5-bit CMOS bidirectional I/O port. R5 pins
with 1 or 0 written to the R5 Port Direction Register R5IO can be
used as outputs or inputs.
In addition, R5 serves the functions of the various following spe-
cial features such as INT3 (External interrupt 3), EC1 (Event
counter input 1), T2O (Timer 2 output), PWM1O (PWM 1 out-
put) / T1O (Timer 1 compare output), PWM3O (PWM 3 output)
/ T3O (Timer 3 compare output).
R60~R67: R6 is an 8-bit CMOS bidirectional I/O port. R6 pins
with 1 or 0 written to the R6 Port Direction Register R6IO can be
used as outputs or inputs.
In addition, R6 serves the functions of the ADC analog input port
AN[7:0].
R70~R77: R7 is an 8-bit CMOS bidirectional I/O port. R7 pins
with 1 or 0 written to the R7 Port Direction Register R7IO can be
used as outputs or inputs. The internal pull-up resistor can be con-
nected by using the pull-up selection register 7 (PU7).
In addition, R7 serves the functions of the ADC analog input port
AN[15:8].
MC80F0424/0432/0448 Preliminary
10 MAR. 2005 Ver 0.2
5.1 MC80F0424/0432/0448 Pin Description
5.1.1 MC80F0424/0432/0448 Pin Description
PIN NAME In/Out Function Initial
state Alternate
Function
R00~R07 I/O
Port 0.
8-bit I/O port.
Can be set as input or output mode in 1-bit units.
Internal pull-up resistor PU0 can be used via software.
Input -
R10
I/O
Port 1.
8-bit I/O port.
Can be set as input or output mode in 1-bit units.
Internal pull-up resistor PU1 can be used via software.
Input
INT0
R11 INT1
R12 INT2
R13 BUZO
R14 T0O
R15 EC0
R16 -
R17 -
R20
I/O
Port 2.
4-bit I/O port.
Can be set in input or output mode in 1-bit units.
Crystal(32.768KHz) connecting pins(R21,R22)
Input
-
R21 SXIN
R22 SXOUT
R23 -
P30
I/O
Port 3.
8-bit I/O port.
Can be set in input or output mode in 1-bit units.
Operates as high current output port with typical 20mA at low level
output.
Input
P31 ACLK1
P32 RxD1
P33 TxD1
P34
P35
P36
P37 -
R40
I/O
Port 4.
8-bit I/O port.
Can be set in input or output mode in 1-bit units.
Internal pull-up resistor PU4 can be used via software.
Input
-
R41 -
R42 SCK
R43 SI
R44 SO
R45 ACLK0
R46 RxD0
R47 TxD0
R50
I/O Port 5.
5-bit I/O port.
Can be set in input or output mode in 1-bit units. Input
INT3
R51 EC1
R52 T2O
R53 PWM1O/T1O
R54 PWM3O/T3O
Table 5-1 MC80F0424/0432/0448 Pin Description
Preliminary MC80F0424/0432/0448
MAR. 2005 Ver 0.2 11
R60~R67 I/O Port 6.
8-bit I/O port.
Can be set in input or output mode in 1-bit units. Input AN0~AN7
R70~R77 I/O
Port 7.
8-bit I/O port.
Can be set in input or output mode in 1-bit units.
Internal pull-up resistor PU7 can be used via software.
Input AN8~AN15
RESET I System reset input. Input -
XIN ICrystal connection for main system clock oscillation. Input -
XOUT OOutput -
AVDD -Analog power/reference voltage input to A/D converter.
Set the same potential as VDD. --
AVSS -Ground potential for A/D converter. Set the same potential as VSS.--
VDD - Positive power supply. - -
VSS - Ground potential. - -
PIN NAME In/Out Function Initial
state Alternate
Function
Table 5-1 MC80F0424/0432/0448 Pin Description
MC80F0424/0432/0448 Preliminary
12 MAR. 2005 Ver 0.2
5.1.2 MC80F0424/0432/0448 Alternate Function Pin Description
PIN NAME In/Out Function Initial
state Shared
Pin
INT0
IValid edges(rising, falling, or both rising and falling) can be spec-
ified. External Interrupt request Input. Input
R10
INT1 R11
INT2 R12
INT3 R50
BUZO O Buzzer Output Input R13
T0O O Timer0 Output Input R14
T2O O Timer2 Output Input R52
EC0 I Timer0 Event Counter Input Input R15
EC1 I Timer2 Event Counter Input Input R51
SXIN IResonator connecting pins (32.768KHz) Input R21
SXOUT OInput R22
ACLK1 I UART1 Asynchronous serial interface serial clock input. Input R31
RxD1 I UART1 Asynchronous serial interface serial data input. Input R32
TxD1 O UART1 Asynchronous serial interface serial data output. Input R33
SCK I/O Serial clock input/output of serial interface. Input R42
SI I Serial data input of serial interface. Input R43
SO O Serial data output of serial interface. Input R44
ACLK0 I UART0 Asynchronous serial interface serial clock input. Input R45
RxD0 I UART0 Asynchronous serial interface serial data input. Input R46
TxD0 O UART0 Asynchronous serial interface serial data output. Input R47
PWM1O/T1O O Timer1 PWM Output / Timer 1 Compare Output Input R53
PWM3O/T3O O Timer3 PWM Output / Timer 1 Compare Output Input R54
AN0~AN7 I Analog input Channel 0 ~ 7 for A/D converter. Input R60~R67
AN8~AN15 I Analog input Channel 8 ~ 15 for A/D converter. Input R70~R77
Table 5-2 MC80F0424/0432/0448 Alternate Function Pin Description
Preliminary MC80F0424/0432/0448
MAR. 2005 Ver 0.2 13
6. PORT STRUCTURES
R00~R07, R16, R17, R40, R41
R10(INT0), R11(INT1), R12(INT2), R15(EC0),
R43(SI),R45(ACLK0),R46(RxD0)
R50(INT3),R51(EC1)
R33(TxD1)
VDD
VSS
Pin
Data Reg.
Direction
Reg.
Pull-up
Tr.
Pull-up
Reg.
VDD
RD
Data Bus
VDD
VSS
MUX
VDD
VSS
Pin
Data Reg.
Direction
Reg.
RD
INT,EC,SI,
INT_EN,SI_EN,ACLK0_EN,
Pull-up
Tr.
Pull-up
Reg.
VDD
Noise
Filter
Data Bus
VDD
VSS
MUX
ACLK0,RxD0
EC_EN,RxD_EN
VDD
VSS
Pin
Data Reg.
Direction
Reg.
RD
Data Bus
VDD
INT3,EC1
INT3_EN,EC1_EN
Noise
Filter
MUX
VDD
VSS
Pin
Data Reg.
Direction
Reg.
TxD1_EN
Data Bus
TxD1
VDD
VSS
MUX
MUX
RD
MC80F0424/0432/0448 Preliminary
14 MAR. 2005 Ver 0.2
R31(ACLK1), R32(RxD1)
R13(BUZO), R14(T0O), R47(TxD0)
R52(T2O), R53(PWM1O), R54(PWM3O)
R20, R23, R30~R37
VDD
VSS
Pin
Data Reg.
Direction
Reg.
RD
Data Bus
VDD
ACLK1,RxD1
ACLK1_EN, RxD1_EN
Noise
Filter
MUX
VDD
VSS
Pin
Data Reg.
Direction
Reg.
Pull-up
Tr.
Pull-up
Reg.
VDD
BUZO_EN, T0O_EN
Data Bus
BUZO,T0O,TxD0 VDD
VSS
MUX
MUX
RD
TxD0_EN
VDD
VSS
Pin
Data Reg.
Direction
Reg.
RD
PWM1_EN,T2O_EN
Data Bus
T2O,PWM1O,PWM3O
VDD
VSS
MUX
MUX
PWM3_EN
VDD
VSS
Pin
Data Reg.
Direction
Reg.
Data Bus
VDD
VSS
MUX
RD
Preliminary MC80F0424/0432/0448
MAR. 2005 Ver 0.2 15
R42(SCK)
R44(SO, IOSWIN(SI))
R60~R67(AN0~AN7)
R70~R77(AN8~AN15)
VDD
VSS
Pin
Data Reg.
Direction
Reg.
RD
SCK
SCKI_EN
Pull-up
Tr.
Pull-up
Reg.
VDD
Noise
Filter
Data Bus
SCK
SCKO_EN
VDD
VSS
MUX
MUX
VDD
VSS
Pin
Data Reg.
Direction
Reg.
RD
SI
Pull-up
Tr.
Pull-up
Reg.
VDD
Noise
Filter
Data Bus
SO
SO_EN
IOSWIN_EN
IOSWIN_EN(SI)
VDD
VSS
MUX
MUX
VDD
VSS
Pin
Data Reg.
Direction
Reg.
RD
AN[7:0]
ADC_EN & CH_SEL
Data Bus
VDD
VSS
MUX
VDD
VSS
Pin
Data Reg.
Direction
Reg.
RD
AN[15:0]
ADC_EN & CH_SEL
Pull-up
Tr.
Pull-up
Reg.
VDD
Data Bus
VDD
VSS
MUX
MC80F0424/0432/0448 Preliminary
16 MAR. 2005 Ver 0.2
RESET
R21(SXIN), R22(SXOUT)
XIN, XOUT
Pin
VDD
VSS
Internal Reset
Mask only
VDD
VSS
SXIN
Data Reg.
Direction
Reg.
RD
Data Bus
VDD
VSS
VDD
VSS
SXOUT
Data Reg.
Direction
Reg.
RD
Data Bus
VDD
VSS
XT_EN
MUX
MUX
XOUT
VDD
VSS
XIN
VDD
VSS
VSS
STOP
MAIN
CLOCK
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