SONIX SN8P1700 Series User manual

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Revision 1.93
SN8P1700 Series
USER’S MANUAL
General Release Specification
SN8P1702
SN8P1704
SN8P1706
SN8P1707
SN8P1708
S
SO ON Ni iX X 8 8- -B Bi it t M Mi ic cr ro o- -C Co on nt tr ro ol ll le er r
SONIX reserves the right to make change without further notice to any products herein to improve reliability, function or design. SONIX does not
assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent
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the part.

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page2
Revision 1.93
AMENDENT HISTORY
Version Date Description
VER 1.90 Sep. 2002 V1.90 first issue
VER 1.93 Feb. 2003 1. Extend chip operating temperature from “0°C ~ +70°C” to “-20°C ~ +70°C”.
2. Change the description of ADD M,A instruction from “M M+A” to “M A+M”
3. Add ADC grade table. P11
4. Remove “Support hardware multiplier (MUL)” in SN8P1702 FEATURES section. P12
5. Change “Four internal interrupts” to “Three internal interrupts” in SN8P1704
FEATURES section. P13
6. Change “ACC can’t be access by “B0MOV” instruction” to “ACC can’t be access by
“B0MOV” instruction during the instant addressing mode”. P38
7. Correct the description of STKnH. P40
8. Change “special register is located at 08h~FFh” to “special register is located at
80h~FFh”. P47
9. Correct the bit definition of INTEN register. P77, P78, P79
10. Correct the description of “TC0 CLOCK FREQUENCY OUTPUT” section. P122
11. Correct the description of “TC1 CLOCK FREQUENCY OUTPUT” section. P131
12. SCKMD = 1 means SIO is in SLAVE mode. SCKMD = 0 means SIO is in MASTER
mode. P146
13. Remove “SIO clock and SPI clock are compatible”. P148, P152
14. Modify ADB’s output data table. P167
15. Correct an error of template code: “b0bclr FWDRST” “b0bset FWDRST”. P180
16. Add a notice about OSCM register access cycle. P185
17. SN8P1702/SN8A1702 don’t provide “MUL, PUSH, POP” instruction. P185
18. Add a notice about OSCM register access cycle. P185

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page3
Revision 1.93
Table of Contents
AMENDENT HISTORY................................................................................................................. 2
1
1
1PRODUCT OVERVIEW ................................................................................................... 11
GENERAL DESCRIPTION ......................................................................................................... 11
FEATURES SELECTION TABLE ............................................................................................... 11
ADC GRADE TABLE .................................................................................................................. 11
SN8P1702 FEATURES...............................................................................................................12
SN8P1704 FEATURES...............................................................................................................13
SN8P1707/SN8P1708 FEATURES ............................................................................................ 15
SYSTEM BLOCK DIAGRAM ...................................................................................................... 16
PIN ASSIGNMENT ..................................................................................................................... 17
PIN DESCRIPTIONS.................................................................................................................. 22
PIN CIRCUIT DIAGRAMS .......................................................................................................... 22
2
2
2ADDRESS SPACES........................................................................................................ 23
PROGRAM MEMORY (ROM)..................................................................................................... 23
OVERVIEW............................................................................................................................. 23
USER RESET VECTOR ADDRESS (0000H).......................................................................... 25
INTERRUPT VECTOR ADDRESS (0008H)............................................................................ 25
GENERAL PURPOSE PROGRAM MEMORY AREA.............................................................. 27
LOOKUP TABLE DESCRIPTION............................................................................................ 27
JUMP TABLE DESCRIPTION................................................................................................. 29
DATA MEMORY (RAM).............................................................................................................. 31
OVERVIEW............................................................................................................................. 31
RAM BANK SELECTION ........................................................................................................ 33
WORKING REGISTERS............................................................................................................. 34
H, L REGISTERS.................................................................................................................... 34
Y, Z REGISTERS.................................................................................................................... 35
X REGISTERS........................................................................................................................ 36
R REGISTERS........................................................................................................................ 36

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page4
Revision 1.93
PROGRAM FLAG....................................................................................................................... 37
CARRY FLAG ......................................................................................................................... 37
DECIMAL CARRY FLAG......................................................................................................... 37
ZERO FLAG............................................................................................................................ 37
ACCUMULATOR ........................................................................................................................ 38
STACK OPERATIONS................................................................................................................39
OVERVIEW............................................................................................................................. 39
STACK REGISTERS............................................................................................................... 40
STACK OPERATION EXAMPLE............................................................................................. 41
PROGRAM COUNTER............................................................................................................... 42
ONE ADDRESS SKIPPING .................................................................................................... 43
MULTI-ADDRESS JUMPING.................................................................................................. 44
3
3
3ADDRESSING MODE...................................................................................................... 45
OVERVIEW................................................................................................................................. 45
IMMEDIATE ADDRESSING MODE........................................................................................ 45
DIRECTLY ADDRESSING MODE .......................................................................................... 45
INDIRECTLY ADDRESSING MODE....................................................................................... 45
TO ACCESS DATA in RAM BANK 0....................................................................................... 46
TO ACCESS DATA in RAM BANK 1....................................................................................... 46
4
4
4SYSTEM REGISTER....................................................................................................... 47
OVERVIEW................................................................................................................................. 47
SYSTEM REGISTER ARRANGEMENT (BANK 0)..................................................................... 47
BYTES of SYSTEM REGISTER.............................................................................................. 47
BITS of SYSTEM REGISTER ................................................................................................. 49
SYSTEM REGISTER DESCRIPTION......................................................................................... 53
L – Working Register............................................................................................................... 53
H – Working Register .............................................................................................................. 54
R – Working Register .............................................................................................................. 55
Z – Working Register............................................................................................................... 56
Y – Working Register............................................................................................................... 57
X – Working Register............................................................................................................... 58
PFLAG – Working Register..................................................................................................... 59

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8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page5
Revision 1.93
RBANK – RAM Bank Selection ............................................................................................... 60
DAM – DAC Converter Register.............................................................................................. 61
ADM – ADC Converter Mode Register.................................................................................... 62
SN8P1702 --- 4 channel ADC ................................................................................................. 62
ADM – ADC Converter Mode Register.................................................................................... 63
SN8P1704 --- 5 channel ADC ................................................................................................. 63
SN801706/SN801707/SN801708 --- 8 channel ADC.............................................................. 63
ADB – ADC Data Buffer (bit4~bit11) ....................................................................................... 64
ADR – ADC Converter Register .............................................................................................. 65
SIOM – SIO Transceiver Mode Register................................................................................. 66
SIOR – SIO Clock Counter Reload Value ............................................................................... 67
SIOB – SIO’s Data Buffer........................................................................................................68
P1W – Port 1 Wakeup Function Register................................................................................ 69
P1M – Port 1 Input/Output Direction Register ......................................................................... 70
P2M – Port 2 Input/Output Direction Register ......................................................................... 71
P4M – Port 4 Input/Output Direction Register ......................................................................... 72
P5M – Port 5 Input/Output Direction Register ......................................................................... 73
INTRQ – Interrupt Request Flag Register ............................................................................... 74
INTRQ – Interrupt Request Flag Register ............................................................................... 75
INTRQ – Interrupt Request Flag Register ............................................................................... 76
INTEN – Interrupt Request Control Register........................................................................... 77
INTEN – Interrupt Request Control Register........................................................................... 78
INTEN – Interrupt Request Control Register........................................................................... 79
OSCM – Oscillator Register .................................................................................................... 80
TC0R – TC0 Reload Data Register......................................................................................... 81
PCL – Program Counter Low Byte Register............................................................................ 82
PCH – Program Counter High Byte Register........................................................................... 83
P0 – Port 0 Data Register........................................................................................................ 84
P1 – Port 1 Data Register........................................................................................................ 85
P2 – Port 2 Data Register........................................................................................................ 86
P4 – Port 4 Data Register........................................................................................................ 87
P5 – Port 5 Data Register........................................................................................................ 88
T0M – T0 Basic Timer Register............................................................................................... 89
T0C – T0 Timer’s Counting Register....................................................................................... 90
TC0M – TC0 Timer Counter Register...................................................................................... 91
TC0C – TC0 Timer’s Counting Register.................................................................................. 92
TC1M – TC1 Timer Counter Register...................................................................................... 93
TC1C – TC1 Timer’s Counting Register.................................................................................. 94
TC1R – TC1 Reload Data Register......................................................................................... 95
STKP – Stack Pointer Register ............................................................................................... 96

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8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page6
Revision 1.93
@HL – Index Data Buffer Register.......................................................................................... 97
@YZ – Index Data Buffer Register.......................................................................................... 98
5
5
5POWER ON RESET ........................................................................................................ 99
OVERVIEW................................................................................................................................. 99
EXTERNAL RESET DESCRIPTION......................................................................................... 100
LOW VOLTAGE DETECTOR (LVD) DESCRIPTION................................................................ 101
6
6
6OSCILLATORS.............................................................................................................. 102
OVERVIEW............................................................................................................................... 102
CLOCK BLOCK DIAGRAM................................................................................................... 102
OSCM REGISTER DESCRIPTION....................................................................................... 103
EXTERNAL HIGH-SPEED OSCILLATOR............................................................................. 104
OSCILLATOR MODE CODE OPTION.................................................................................. 104
OSCILLATOR DEVIDE BY 2 CODE OPTION....................................................................... 104
OSCILLATOR SAFE GUARD CODE OPTION ..................................................................... 104
SYSTEM OSCILLATOR CIRCUITS...................................................................................... 105
External RC Oscillator Frequency Measurement .................................................................. 106
INTERNAL LOW-SPEED OSCILLATOR.................................................................................. 107
SYSTEM MODE DESCRIPTION.............................................................................................. 108
OVERVIEW........................................................................................................................... 108
NORMAL MODE................................................................................................................... 108
SLOW MODE........................................................................................................................ 108
POWER DOWN MODE......................................................................................................... 108
SYSTEM MODE CONTROL..................................................................................................... 109
SN8P1700 SYSTEM MODE BLOCK DIAGRAM................................................................... 109
SYSTEM MODE SWITCHING .............................................................................................. 110
WAKEUP TIME......................................................................................................................... 111
OVERVIEW........................................................................................................................... 111
HARDWARE WAKEUP......................................................................................................... 111
7
7
7TIMERS COUNTERS..................................................................................................... 112

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8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page7
Revision 1.93
WATCHDOG TIMER (WDT)..................................................................................................... 112
BASIC TIMER 0 (T0) ................................................................................................................ 113
OVERVIEW........................................................................................................................... 113
T0M REGISTER DESCRIPTION .......................................................................................... 113
T0C COUNTING REGISTER................................................................................................ 114
T0 BASIC TIMER OPERATION SEQUENCE....................................................................... 115
TIMER COUNTER 0 (TC0)....................................................................................................... 116
OVERVIEW........................................................................................................................... 116
TC0M MODE REGISTER...................................................................................................... 117
TC0C COUNTING REGISTER.............................................................................................. 118
TC0R AUTO-LOAD REGISTER............................................................................................ 119
TC0 TIMER COUNTER OPERATION SEQUENCE.............................................................. 120
TC0 CLOCK FREQUENCY OUTPUT (BUZZER).................................................................. 122
TC0OUT FREQUENCY TABLE................................................................................................ 123
TIMER COUNTER 1 (TC1)....................................................................................................... 125
OVERVIEW........................................................................................................................... 125
TC1M MODE REGISTER...................................................................................................... 126
TC1C COUNTING REGISTER.............................................................................................. 127
TC1R AUTO-LOAD REGISTER............................................................................................ 128
TC1 TIMER COUNTER OPERATION SEQUENCE.............................................................. 129
TC1 CLOCK FREQUENCY OUTPUT (BUZZER).................................................................. 131
PWM FUNCTION DESCRIPTION............................................................................................ 132
OVERVIEW........................................................................................................................... 132
PWM PROGRAM DESCRIPTION......................................................................................... 133
8
8
8INTERRUPT................................................................................................................... 134
OVERVIEW............................................................................................................................... 134
INTEN INTERRUPT ENABLE REGISTER ............................................................................... 135
INTRQ INTERRUPT REQUEST REGISTER............................................................................ 135
INTERRUPT OPERATION DESCRIPTION.............................................................................. 136
GIE GLOBAL INTERRUPT OPERATION ............................................................................. 136
INT0 (P0.0) INTERRUPT OPERATION ................................................................................ 137
INT1 (P0.1) INTERRUPT OPERATION ................................................................................ 137
INT2 (P0.2) INTERRUPT OPERATION ................................................................................ 138
T0 INTERRUPT OPERATION............................................................................................... 139
TC0 INTERRUPT OPERATION............................................................................................ 140
TC1 INTERRUPT OPERATION............................................................................................ 141

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page8
Revision 1.93
SIO INTERRUPT OPERATION............................................................................................. 142
MULTI-INTERRUPT OPERATION........................................................................................ 143
9
9
9SERIAL INPUT/OUTPUT TRANSCEIVER (SIO)........................................................... 145
OVERVIEW............................................................................................................................... 145
SIOM MODE REGISTER.......................................................................................................... 146
SIOB DATA BUFFER................................................................................................................147
SIOR REGISTER DESCRIPTION ............................................................................................ 147
SIO MASTER OPERATING DESCRIPTION ............................................................................ 148
RISING EDGE TRANSMITTER/RECEIVER MODE.............................................................. 148
FALLING EDGE TRANSMITTER/RECEIVER MODE........................................................... 149
RISING EDGE RECEIVER MODE........................................................................................ 150
FALLING EDGE RECEIVER MODE ..................................................................................... 151
SIO SLAVE OPERATING DESCRIPTION................................................................................ 152
RISING EDGE TRANSMITTER/RECEIVER MODE.............................................................. 153
FALLING EDGE TRANSMITTER/RECEIVER MODE........................................................... 154
RISING EDGE RECEIVER MODE........................................................................................ 155
FALLING EDGE RECEIVER MODE ..................................................................................... 156
SIO INTERRUPT OPERATION DESCRIPTION....................................................................... 157
1
1
10
0
0I/O PORT............................................................................................................. 158
OVERVIEW............................................................................................................................... 158
I/O PORT FUNCTION TABLE .................................................................................................. 159
PULL-UP RESISTERS.............................................................................................................. 160
I/O PORT DATA REGISTER .................................................................................................... 163
1
1
11
1
18-CHANNEL ANALOG TO DIGITAL CONVERTER........................................... 165
OVERVIEW............................................................................................................................... 165
ADM REGISTER....................................................................................................................... 166
ADR REGISTERS..................................................................................................................... 166
ADB REGISTERS..................................................................................................................... 166

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8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page9
Revision 1.93
ADC CONVERTING TIME........................................................................................................ 168
ADC CIRCUIT........................................................................................................................... 169
1
1
12
2
27-BIT DIGITAL TO ANALOG CONVERTER ...................................................... 170
OVERVIEW............................................................................................................................... 170
DAM REGISTER....................................................................................................................... 170
D/A CONVERTER OPERATION .............................................................................................. 171
1
1
13
3
3PCB LAYOUT NOTICE....................................................................................... 172
POWER CIRCUIT..................................................................................................................... 172
The right placement of bypass capacitors in single VDD case.............................................. 172
The right placement of bypass capacitors in multiple VDD case........................................... 173
GENERAL PCB POWER LAYOUT....................................................................................... 174
EXTERNAL OSCILLATOR CIRCUIT........................................................................................ 175
Crystal/Ceramic Resonator Oscillator Circuit ........................................................................ 175
RC Type Oscillator Circuit..................................................................................................... 176
EXTERNAL RESET CIRCUIT................................................................................................... 177
1
1
14
4
4CODE OPTION TABLE....................................................................................... 178
1
1
15
5
5CODING ISSUE .................................................................................................. 179
TEMPLATE CODE.................................................................................................................... 179
CHIP DECLARATION IN ASSEMBLER.................................................................................... 184
PROGRAM CHECK LIST ......................................................................................................... 184
1
1
16
6
6INSTRUCTION SET TABLE ............................................................................... 185

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8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page10
Revision 1.93
1
1
17
7
7ELECTRICAL CHARACTERISTIC..................................................................... 186
ABSOLUTE MAXIMUM RATING.............................................................................................. 186
STANDARD ELECTRICAL CHARACTERISTIC....................................................................... 186
1
1
18
8
8PACKAGE INFORMATION ................................................................................ 187
P-DIP18 PIN ............................................................................................................................. 187
SOP18 PIN ............................................................................................................................... 188
SSOP20 PIN............................................................................................................................. 189
S-DIP28 PIN ............................................................................................................................. 190
SOP28 PIN ............................................................................................................................... 191
QFP 44 PIN............................................................................................................................... 192
SSOP 48 PIN............................................................................................................................ 193
P-DIP 48 PIN ............................................................................................................................ 194
P-DIP 40 PIN ............................................................................................................................ 195

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8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page11
Revision 1.93
1
1
1
PRODUCT OVERVIEW
GENERAL DESCRIPTION
The SN8P1700 is a series of 8-bit micro-controller including SN8P1702, SN8P1704, SN8P1706, SN8P1707 and
SN8P1708. This series is utilized with CMOS technology fabrication and featured with low power consumption and
high performance by its unique electronic structure.
These chips are designed with the excellent IC structure including the large program memory OTP ROM, the massive
data memory RAM, one 8-bit basic timer (T0), two 8-bit timer counters (TC0, TC1), a watchdog timer, up to seven
interrupt sources (T0, TC0, TC1, SIO, INT0, INT1, INT2), a 7-bit DAC converter, an 8-channel ADC converter with
8-bit/12-bit resolution, two channel PWM output (PWM0, PWM1), tw0 channel buzzer output (BZ0, BZ1) and 8-level
stack buffers.
Besides, the user can choose desired oscillator configurations for the controller. There are four oscillator configurations
to select for generating system clock, including High/Low Speed crystal, ceramic resonator or cost-saving RC.
SN8P1700 series also includes an internal RC oscillator for slow mode controlled by programming.
FEATURES SELECTION TABLE
Timer PWM Wakeup
CHIP ROM RAM Stack T0 TC0 TC1 I/O ADC DAC Buzzer SIO Pin no. Package
SN8P1702 1K*16 64 - V - 12 4ch - 1 - 3 DIP18/SOP18/SSOP20
SN8P1704 2K*16 128 - V V 18 5ch 1ch 2 1 8 SKDIP28/SOP28
SN8P1706 V V V 30 8ch 1ch 2 1 9 DIP40
SN8P1707 V V V 33 8ch 1ch 2 1 9 QFP44
SN8P1708
4K*16 256
8
V V V 33 8ch 1ch 2 1 9 DIP48/SSOP48
Table 1-1. Selection Table of SN8P1700
ADC GRADE TABLE
CHIP PARAMETER MIN TYP MAX UNITS REMARK
Resolution 12 Bits
No Mission Code 8 12 Bits
SN8P170X
Differential Nonlinearity (DNL) 16 LSB
170X:
1702~1708
Resolution 12 Bits
No Mission Code 10 12 Bits
SN8P170X-12
Differential Nonlinearity (DNL) 4 LSB
170X:
1702~1708
Table 1-2. ADC Grade Table

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page12
Revision 1.93
SN8P1702 FEATURES
♦Memory configuration ♦Two interrupt sources
OTP ROM size: 1K * 16 bits. One internal interrupts: TC0.
RAM size: 64 * 8 bits. One external interrupts: INT0.
♦I/O pin configuration (Total 12 pins) ♦An 4-channel ADC with 8-bit/12-bit resolution
Input only: P0
Bi-directional: P1, P4, P5 ♦One channel PWM output. (PWM0)
Wakeup: P0, P1 ♦One channel Buzzer output. (BZ0)
Pull-up resisters: P0, P1, P4, P5
External interrupt: P0 ♦Dual clock system offers three operating modes
P4 pins shared with ADC inputs. External high clock: RC type up to 10 MHz
External high clock: Crystal type up to 16 MHz
♦One 8-bit timer counters. (TC0). Internal low clock: RC type 16KHz(3V), 32KHz(5V)
♦On chip watchdog timer. Normal mode: Both high and low clock active
♦Eight levels stack buffer. Slow mode: Low clock only
Sleep mode: Both high and low clock stop
♦59 powerful instructions
Four clocks per instruction cycle
All of instructions are one word length. ♦Package (Chip form support)
Most of instructions are one cycle only. PDIP 18 pins
All ROM area lookup table function (MOVC) SOP 18 pins / SSOP20 (MASK type only)
Notice:
1. Declare “CHIP SN8P1702” in assembler.
2. Use @SET_PUR macro to control pull-up resister. Refer I/O chapter for detailed information
3. Call @SET_PUR macro at least one time to avoid sleep mode fail.

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page13
Revision 1.93
SN8P1704 FEATURES
♦Memory configuration ♦Six interrupt sources
OTP ROM size: 2K * 16 bits. Three internal interrupts: TC0, TC1, SIO.
RAM size: 128 * 8 bits. Three external interrupts: INT0, INT1, INT2.
♦I/O pin configuration (Total 18 pins) ♦A 5-channel ADC with 8-bit/12-bit resolution.
Input only: P0
Bi-directional: P1, P4, P5 ♦One channel DAC with 7-bit resolution.
Wakeup: P0, P1
Pull-up resisters: P0, P1, P4, P5 ♦SIO function.
External interrupt: P0 ♦Two channel PWM output. (PWM0, PWM1)
P4 pins shared with ADC inputs. ♦Two channel Buzzer output. (BZ0, BZ1)
♦Two 8-bit timer counters. (TC0, TC1). ♦Dual clock system offers three operating modes
♦On chip watchdog timer. External high clock: RC type up to 10 MHz
♦Eight levels stack buffer. External high clock: Crystal type up to 16 MHz
Internal low clock: RC type 16KHz(3V), 32KHz(5V)
♦60 powerful instructions Normal mode: Both high and low clock active
Four clocks per instruction cycle Slow mode: Low clock only
All of instructions are one word length. Sleep mode: Both high and low clock stop
Most of instructions are one cycle only.
All ROM area lookup table function (MOVC) ♦Package (Chip form support)
Support hardware multiplier (MUL). SOP 28 pins
SKDIP 28 pins
Notice:
1. Declare “CHIP SN8P1704” in assembler.
2. Use @SET_PUR macro to control pull-up resister. Refer I/O chapter for detailed information
3. Call @SET_PUR macro at least one time to avoid sleep mode fail.

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page14
Revision 1.93
SN8P1706 FEATURES
♦Memory configuration ♦Seven interrupt sources
OTP ROM size: 4K * 16 bits. Four internal interrupts: T0, TC0, TC1, SIO.
RAM size: 256 * 8 bits (bank 0 and bank 1). Three external interrupts: INT0, INT1, INT2.
♦I/O pin configuration (Total 30 pins) ♦An 8-channel ADC with 8-bit/12-bit resolution.
Input only: P0
Bi-directional: P1, P2, P4, P5 ♦One channel DAC 7bit resolution.
Wakeup: P0, P1
Pull-up resisters: P0, P1, P2, P4, P5
External interrupt: P0 ♦SIO function.
P4 pins shared with ADC inputs. ♦Two channel PWM output. (PWM0, PWM1)
♦Two channel Buzzer output. (BZ0, BZ1)
♦An 8-bit basic timer. (T0).
♦Two 8-bit timer counters. (TC0, TC1). ♦Dual clock system offers three operating modes
♦On chip watchdog timer. External high clock: RC type up to 10 MHz
♦Eight levels stack buffer. External high clock: Crystal type up to 16 MHz
Internal low clock: RC type 16KHz(3V), 32KHz(5V)
♦60 powerful instructions Normal mode: Both high and low clock active
Four clocks per instruction cycle Slow mode: Low clock only
All of instructions are one word length. Sleep mode: Both high and low clock stop
Most of instructions are one cycle only.
All ROM area lookup table function (MOVC)
Support hardware multiplier (MUL). ♦Package (Chip form support)
P-DIP 40 pins
Notice:
1. Declare “CHIP SN8P1706” in assembler.
2. Use @SET_PUR macro to control pull-up resister. Refer I/O chapter for detailed information

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page15
Revision 1.93
SN8P1707/SN8P1708 FEATURES
♦Memory configuration ♦Seven interrupt sources
OTP ROM size: 4K * 16 bits. Four internal interrupts: T0, TC0, TC1, SIO.
RAM size: 256 * 8 bits (bank 0 and bank 1). Three external interrupts: INT0, INT1, INT2.
♦I/O pin configuration (Total 33 pins) ♦An 8-channel ADC with 8-bit/12-bit resolution.
Input only: P0
Bi-directional: P1, P2, P4, P5 ♦One channel DAC with 7-bit resolution.
Wakeup: P0, P1
Pull-up resisters: P0, P1, P2, P4, P5
External interrupt: P0 ♦SIO function.
P4 pins shared with ADC inputs. ♦Two channel PWM output. (PWM0, PWM1)
♦Two channel Buzzer output. (BZ0, BZ1)
♦An 8-bit basic timer. (T0).
♦Two 8-bit timer counters. (TC0, TC1). ♦Dual clock system offers three operating modes
♦On chip watchdog timer. External high clock: RC type up to 10 MHz
♦Eight levels stack buffer. External high clock: Crystal type up to 16 MHz
Internal low clock: RC type 16KHz(3V), 32KHz(5V)
♦60 powerful instructions Normal mode: Both high and low clock active
Four clocks per instruction cycle Slow mode: Low clock only
All of instructions are one word length. Sleep mode: Both high and low clock stop
Most of instructions are one cycle only.
All ROM area lookup table function (MOVC)
Support hardware multiplier (MUL). ♦Package (Chip form support)
QPF 44 pins (SN8P1707)
SSOP 48 pins (SN8P1708)
PDIP 48 pins (SN8P1708)
Notice:
1. Declare “CHIP SN8P1707” for SN8P1707 in assembler.
2. Declare “CHIP SN8P1708” for SN8P1708 in assembler.
3. Use @SET_PUR macro to control pull-up resister. Refer I/O chapter for detailed information

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page16
Revision 1.93
SYSTEM BLOCK DIAGRAM
Figure 1-1.Simplified System Block Diagram
PC
IR OTP
ROM
H-OSC
TIMING GENERATOR
RAM
SYSTEM REGISTER
ALU
ACC
INTERRUPT
CONTROL TIMER & COUNTER
PORT 0
PORT 2PORT 1 PORT 4 PORT 5
FLAGS
DAC
ADC
DAO
AIN0~AIN7
SIO
TX/RX
Internal
CLK
PWM1
PWM0 PWM0/Buzzer0
PWM1/Buzzer1
Low Volt
Detector
Watch-Dog
Timer
PC
IR OTP
ROM
H-OSC
TIMING GENERATOR
RAM
SYSTEM REGISTER
ALU
ACC
INTERRUPT
CONTROL TIMER & COUNTER
PORT 0
PORT 2PORT 1 PORT 4 PORT 5
FLAGS
DAC
ADC
DAO
AIN0~AIN7
SIO
TX/RX
Internal
CLK
PWM1
PWM0 PWM0/Buzzer0
PWM1/Buzzer1
Low Volt
Detector
Watch-Dog
Timer

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page17
Revision 1.93
PIN ASSIGNMENT
Format Description：SN8P17XXY
Y= Q > QFP，P > PDIP，K > SKDIP，S > SOP，X> SSOP
OTP Type:
SN8P1702 (SOP 18PIN)
SN8P1702 (PDIP 18PIN)
P0.0/INT0 1 U 18 VDD/VPP
RST 2 17 XIN
P1.1 3 16 XOUT
P1.0 4 15 P5.0
VSS 5 14 P5.1
P4.3/AIN3 6 13 P5.2
P4.2/AIN2 7 12 P5.3
P4.1/AIN1 8 11 P5.4/BZ0/PWM0
P4.0/AIN0 9 10 VDD
SN8P1702P
SN8P1702S
MASK Type:
SN8A1702A (SOP 18PIN)
SN8A1702A (PDIP 18PIN)
SN8A1702A (SSOP 20PIN)
P0.0/INT0 1 U 18VDD
RST 2 17 XIN
P1.1 3 16XOUT
P1.0 4 15P5.0
VSS 5 14P5.1
P4.3/AIN3 6 13P5.2
P4.2/AIN2 7 12P5.3
P4.1/AIN1 8 11P5.4/BZ0/PWM0
P4.0/AIN0 9 10VDD
SN8A1702AP
SN8A1702AS
VSS 1 U 20P1.0
VSS 2 19P1.1
P4.3/AIN3 3 18RST
P4.2/AIN2 4 17P0.0/INT0
P4.1/AIN1 5 16VDD
P4.0/AIN0 6 15XIN
AVREFH 7 14XOUT
VDD 8 13 P5.0
P5.3 9 12P5.1
P5.2 10 11P5.4/TC0/PWM0
SN8A1702AX
 Only MASK type support SSOP20 package

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page18
Revision 1.93
OTP Type:
SN8P1704 (SOP 28PIN)
SN8P1704 (SKDIP 28PIN)
P1.4 1 U 28 RST
P1.3 2 27 P0.2/INT2
VDD 3 26 P0.1/INT1
P1.2 4 25 P0.0/INT0
P1.1 5 24 VDD/VPP
P1.0 6 23 XIN
VSS 7 22 XOUT
P4.4/AIN4 8 21 VSS
P4.3/AIN3 9 20 P5.0/SCK
P4.2/AIN2 10 19 P5.1/SI
P4.1/AIN1 11 18 P5.2/SO
P4.0/AIN0 12 17 P5.3/BZ1/PWM1
AVREFH 13 16 P5.4/BZ0/PWM0
VDD 14 15 DAO
SN8P1704K
SN8P1704S
MASK Type:
SN8A1704A (SOP 28PIN)
SN8A1704A (SKDIP 28PIN)
P1.4 1 U 28 RST
P1.3 2 27 P0.2/INT2
VDD 3 26 P0.1/INT1
P1.2 4 25 P0.0/INT0
P1.1 5 24 VDD
P1.0 6 23 XIN
VSS 7 22 XOUT
P4.4/AIN4 8 21 VSS
P4.3/AIN3 9 20 P5.0/SCK
P4.2/AIN2 10 19 P5.1/SI
P4.1/AIN1 11 18 P5.2/SO
P4.0/AIN0 12 17 P5.3/BZ1/PWM1
AVREFH 13 16 P5.4/BZ0/PWM0
VDD 14 15 DAO
SN8A1704AK
SN8A1704AS

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page19
Revision 1.93
OTP Type:
SN8P1706 (P-DIP 40PIN)
P1.5 1 U 40 RST
P1.4 2 39 P0.2/INT2
P1.3 3 38 P0.1/INT1
VDD 4 37 P0.0/INT0
P1.2 5 36 VDD/VPP
P1.1 6 35 XIN
P1.0 7 34 XOUT
P2.0 8 33 VSS
P2.1 9 32 P2.4
P2.2 10 31 P5.0/SCK
P2.3 11 30 P5.1/SI
VSS 12 29 P5.2/SO
P4.7/AIN7 13 28 P5.3/BZ1/PWM1
P4.6/AIN6 14 27 P5.4/BZ0/PWM0
P4.5/AIN5 15 26 P5.5
P4.4/AIN4 16 25 P5.6
P4.3/AIN3 17 24 P5.7
P4.2/AIN2 18 23 DAO
P4.1/AIN1 19 22 VDD
P4.0/AIN0 20 21 AVREFH
SN8P1706P
MASK Type:
SN8A1706A (P-DIP 40PIN)
P1.5 1 U 40 RST
P1.4 2 39 P0.2/INT2
P1.3 3 38 P0.1/INT1
VDD 4 37 P0.0/INT0
P1.2 5 36 NC
P1.1 6 35 XIN
P1.0 7 34 XOUT
P2.0 8 33 VSS
P2.1 9 32 P2.4
P2.2 10 31 P5.0/SCK
P2.3 11 30 P5.1/SI
AVREFL 12 29 P5.2/SO
P4.7/AIN7 13 28 P5.3/BZ1/PWM1
P4.6/AIN6 14 27 P5.4/BZ0/PWM0
P4.5/AIN5 15 26 P5.5
P4.4/AIN4 16 25 P5.6
P4.3/AIN3 17 24 P5.7
P4.2/AIN2 18 23 DAO
P4.1/AIN1 19 22 VDD
P4.0/AIN0 20 21 AVREFH
SN8A1706AP
 For OTP type (SN8P1706) compatible issue, please connect AVREFL pin of MASK type (SN8A1706A) to
the analog ground of PCB. The voltage level of AVREFL pin is the valid lowest ADC input voltage. By the
way, the AVREFH is the valid highest ADC input voltage.

SN8P1700
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD Page20
Revision 1.93
OTP Type:
SN8P1707 (QFP 44PIN)
XIN XOUT VSS P2.7 P2.6 P2.5 P2.4 P5.0/SCK P5.1/SI P5.2/SO P5.3/BZ1/PWM1
44 43 42 41 40 39 38 37 36 35 34
VPP/VDD 1 O 33P5.4/BZ0/PWM0
P0.0/INT02 32P5.5
P0.1/INT13 31P5.6
P0.2/INT24 30P5.7
RST5 29DAO
P1.5 6 SN8P1707Q 28 VDD
P1.47 27AVREFH
P1.38 26P4.0/AIN0
VDD9 25P4.1/AIN1
P1.210 24P4.2/AIN2
P1.111 23P4.3/AIN3
12 13 14 15 16 17 18 19 20 21 22
P1.0 P2.0 P2.1 P2.2 P2.3
VSS
AVSS
P4.7/AIN7 P4.6/AIN6 P4.5/AIN5 P4.4/AIN4
MASK Type:
SN8A1707A (QFP 44PIN)
XIN XOUT VSS P2.7 P2.6 P2.5 P2.4 P5.0/SCK P5.1/SI P5.2/SO P5.3/BZ1/PWM1
44 43 42 41 40 39 38 37 36 35 34
NC 1 O 33P5.4/BZ0/PWM0
P0.0/INT02 32P5.5
P0.1/INT13 31P5.6
P0.2/INT24 30P5.7
RST5 29DAO
P1.5 6 SN8A1707AQ 28 VDD
P1.47 27AVREFH
P1.38 26P4.0/AIN0
VDD9 25P4.1/AIN1
P1.210 24P4.2/AIN2
P1.111 23P4.3/AIN3
12 13 14 15 16 17 18 19 20 21 22
P1.0 P2.0 P2.1 P2.2 P2.3
VSS
AVREFL
P4.7/AIN7 P4.6/AIN6 P4.5/AIN5 P4.4/AIN4
 For OTP type (SN8P1707) compatible issue, please connect AVREFL pin of MASK type (SN8A1707A) to
the analog ground of PCB. The voltage level of AVREFL pin is the valid lowest ADC input voltage. By the
way, the AVREFH is the valid highest ADC input voltage.