Microchip Technology dsPIC30F User manual

dsPIC30F Quadrature Encoder Interface Module
© 2005 Microchip Technology Inc. Page 1
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dsPIC30F Quadrature Encoder
Interface Module
DS
Digital Signal Controller
Welcome to the dsPIC30F Quadrature Encoder Interface Module web seminar.

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Session Agenda
OWhat is a Quadrature Encoder?
OGeneral Features Overview
OProgrammable digital noise filters
OQuadrature Decoder
OThe QEI as a Timer/Counter
These are the main topics we will address during this seminar.
First of all, we will see the purpose of the QEI module is. Then we will go
through all the main functional blocks, the digital noise filters, the decoder, and
the position counter. Finally we will see that this peripheral, if not used as an
encoder, can behave as an up/down counter/timer.

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What is a Quadrature Encoder?
slotted wheel
light source
sensing device
logic
A Quadrature Encoder (or incremental encoder, or optical encoder) is used to
detect the position and speed of rotors, enabling closed loop control in many
motor control applications like switched reluctance and induction motors.
Typically, an encoder includes a slotted wheel attached to the motor shaft, a
light source, a light sensing device and some logic. During the rotation of the
shaft, the light passes through the slots and hits the sensing element,
generating electric signals.
The three digital outputs are called Phase A, Phabe B and Index. With some
decoding performed by the dsPIC quadrature encoder interface, these signals
can tell us the speed and position of the rotor.

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What is a Quadrature Encoder?
Phase A leads Phase B
Phase B leads Phase A
An example of the encoder output waveform is illustrated here.
In the upper plot we see the Phase A and Phase B signals coming in on the
QEA and QEB pins respectively. In this case, Phase A leads Phase B: the shaft
is spinning forward. If we reverse the rotor rotation, like in the lower part of the
figure, Phase B will lead Phase A: so by detecting which rising edge comes
first, we are able to detect the direction of rotation.
The encoder outputs can only have four different states as indicated in the
figure: 01, 00, 10, 11. Note that if we reverse the direction the sequence is
reversed as well.
The index occurs only once per revolution and is used to establish an absolute
position.
The quadrature decoder, which is part of the interface circuitry, will read these
signals and converts them into a numeric count of the position pulses. The
count will increment when the shaft is rotating in one direction and will
decrement when the rotation is reversed.

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dsPIC QEI Features
OQEI Features
OQEI decodes signals and accumulates count
OLogically swap A and B inputs
OProgrammable noise filters on inputs
Ox2 and x4 counting modes
O16-bit Position count register
OReset on index pulse (if enabled)
OReset on rollover/underflow
OCount error status bit
The QEI will perform all the operations needed to effectively use the information
coming from the encoder.
Since these signals are heavily affected by noise, a digital filter is available on
each input. The filtered phase edges are counted by a dedicated 16 bit up/down
counter, also referred to as the Position Counter. To establish a reference point
for position and speed measurements, the counter can be reset either by the
index signal or by a counter period match. The hardware can also perform
some error checking on on the accumulated count.

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Block Diagram
Clock
Divider
INDEX
1
0
TQCS
Tcy
Digital Filter
Logic
Digital Filter
Logic
Digital Filter
Logic
QEB
QEA
Prescaler and
Sync. Logic
Tcy
UPDN
16-Bit Up/Down
Counter
DIR
Quadrature
Decoder
Logic
Clock
Reset
Max. Count
Register
Timer Mode
Timer Mode
Comparator
This block diagram depicts the internal architecture of the QEI modules. We
can see the input pins and the associated digital filters. There is also an
up/down input pin that is mainly used when the unit operates as a counter. The
quadratrute decoder logic is responsible for analysing which edge comes first
and the counter accumulates the edge count and is compared with the internal
Max Count Register.

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Digital Filters
OMultiple clock options to digital filter
OTcy, 2Tcy, 4Tcy, 8Tcy, 16Tcy, …, 256Tcy
OSignal must be stable for 3 clock cycles
OAdjust clock divide bits to change noise
filtering characteristics
OUse of digital filter generates latency
The digital filters are responsible for rejecting noise from the three inputs. The
instruction cycle clock can be divided down by 2 , 4, 16, 32, 64, 128, 256 before
being used in the filter. The lower the clock frequency the lower frequencies are
rejected by the filter.
The prescaled clock is used to sample the input signal: if and only if three
consecutive samples have the same value the input is considered stable and
the value is output from the filter. One of the effects of this sampling is an
added latency, because there is a “propagation delay” of the input signal
through the filter.

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Digital Filters
TCY
QEA/B
Filter
Here we can see that the input signal at the QEA or QEB pin is sampled using
the selected clock, in this case the instruction cycle period Tcy. If at least three
samples having the same value are detected the output is updated, otherwise
the input signal changes are disregarded. Glitches and spikes can be efficiently
filtered out by the digital filters.

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Quadrature Decoder
OFour basic modes
Ox 2 mode with Index Pulse reset
OX 2 mode with reset by match
OX 4 mode Index Pulse reset
OX 4 mode with reset by match
As we have already seen, the quadrature decoder must determine the direction
of rotation looking at the two incoming phase signals, and generate the clock
that will be used by the position counter.
We can select between two modes: in the first one (x2) the decoder only
generates a clock impulse at the rising and falling edges of Phase A signal; in
the other mode (x4), the clock pulses are generate at each edge of phase A
and Phase B. The position counter can be reset either by the index pulse
coming from the encoder or by the matching of the current position counter
value with the number in the Maximum Count Register.

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Timing Diagram
+1 +1+1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 [phone] -1
COUNT
PHASE A
PHASE B
UPDN
This is an example of how the decoder works. We are using the x4 mode,
where the clock pulse is at each edge of both phases. In the first part of the
timing diagram Phase A leads Phase B, so that the counter is counting up.
Then, in the second half, the rotation of the rotor is reversed, Phase B now
leads Phase A and the counter is counting down. This is why an up/down
counter is required in this application.
The count direction can be determined by reading the UPDN bit in the QEI
control register, but the UPDN pin can also be used to indicate the count
direction status.
With the x4 mode we can get a very high angular resolution, but we also get a
relatively high output clock frequency. With the x2 mode, the resolution is twice
as fine, but the frequncy is lower.
The maximum allowed quadrature frequency is one-third of the instruction cycle
frequency Fcy.

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Position Counter
OUp/down counter
OCounts pulses generated by the decoder
OCount is accumulated in POSCNT register
OPOSCNT can be accessed, both for read
and write
OIts value can be compared to MAXCNT
register
The position counter can be used either for position or speed measurement.
To measure motor position, we must know the relationship between the
displacement and the number of phase pulses we get from the encoder. This
relation can be known in advance, or can be measured during initialization by
accumulating the total count for the maximum allowed displacement. We can
set a constant value in the Maximum Count register, which is typically the
number of pulse edges generated by one encoder revolution. As soon as we
have a match between the Position Count and the Maximum Count, an interrupt
is generated. In the Interrupt Service Routine, the user software can increment
or decrerment a software counter containing the most significant bits of the
position count.
For speed measurement application, the time interval between two index pulses
or count match events gives a measure of the angular velocity.

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QEI as a 16 bit Timer/Counter
If the quadrature decoder functionality is not needed, the QEI peripheral module
can be configured as an additional 16 bit counter/timer.
In this mode, the Position Counter register has the same functionality as the
Timer registers in general-purpose timers, while the Maximum Count register
serves as a period register. An additional feature compared to the general-
purpose timers is that the QEI counter is able to both increment and decrement
its count, thus providing up-down counter functionality.
The timer clock can be either internal or external; in the latter case the input pin
is the QEA pin and the input clock, after digital filtering, will be synchronized
with the instruction cycle. As in the general-purpose timers, gated time
accumulation is also possible.
The counting direction can be selected either with the UPDN bit in register
QEICON, or with the QEB pin.
An interrupt is generated when the value in the Position Counter register
maches the value in the Maximum Count register.

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Key Support Documents
Device Selection Reference Document #
General Purpose and Sensor Family Data Sheet DS70083
Motor Control and Power Conv. Data Sheet DS70082
dsPIC30F Family Overview DS70043
Base Design Reference Document #
dsPIC30F Family Reference Manual DS70046
dsPIC30F Programmer’s Reference Manual DS70030
MPLAB MPLAB® C30 C Compiler User User’s Guide DS51284
MPLAB ASM30, LINK30 & Utilities User DS51317
dsPIC® Language Tools Libraries DS51456
For more information, here are references to some important documents that
contain a lot of information about the dsPIC30F family of devices.
The Family Reference Manual contains detailed information about the
architecture and peripherals, whereas the Programmer’s Reference Manual
contains a thorough description of the instruction set.

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Key Support Documents
Device Specific Reference Document #
OdsPIC30F2010 Data Sheet DS70118
OdsPIC30F3010/3011 Data Sheet DS70141
OdsPIC30F4011/4012 Data Sheet DS70135
OdsPIC30F6010 Data Sheet DS70119
Microchip Web Site: www.microchip.com
For device-specific information such as pinout diagrams, packaging and
electrical characteristics, the device datasheets listed here are the best source
of information.

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Related Material
OApps Notes on Motor Control
AN901 Using the dsPIC30F for Sensorless BLDC Control
AN908 Using the dsPIC30F for Vector Control of an ACIM
AN957 Sensored BLDC Motor Control Using dsPIC30F2010
We also have some application notes on motor control, in which the peripheral
is used.
All these documents can be obtained from the Microchip web site, by clicking
on the “dsPIC® Digital Signal Controllers” or “Technical Documentation” link.
This wraps up the seminar on dsPIC30F QEI. Thank you for your interest in the
dsPIC30F Family of Digital Signal Controllers.