
3
TC7660S
SUPER CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
© 2001 Microchip Technology Inc. DS21467A TC7660S-14 9/16/96
Figure 1. TC7660S Test Circuit
Figure 2. Idealized Charge Pump Inverter
V+
GND S3
S1S2
S4C2
VOUT = – VIN
C1
The voltage regulator portion of the TC7660S is an
integralpart of the anti-latch-upcircuitry.Its inherent voltage
drop can, however, degrade operation at low voltages. To
improve low-voltage operation, the “LV” pin should be
connected to GND, disabling the regulator. For supply
voltages greater than 3.5V, the LV terminal must be left
opento ensure latch-up-proof operation and prevent device
damage.
Theoretical Power Efficiency
Considerations
In theory, a capacitive charge pump can approach
100% efficiency if certain conditions are met:
(1) The drive circuitry consumes minimal power.
(2) The output switches have extremely low ON
resistance and virtually no offset.
(3) The impedances of the pump and reservoir
capacitors are negligible at the pump frequency.
The TC7660S approaches these conditions for nega-
tive voltage multiplication if large values of C1and C2are
used. Energy is lost only in the transfer of charge
between capacitors if a change in voltage occurs. The
energy lost is defined by:
E = 1/2 C1(V12– V22)
V1and V2are the voltages on C1during the pump and
transfercycles.IftheimpedancesofC1andC2arerelatively
high at the pump frequency (refer to Figure 2) compared to
the value of RL, there will be a substantial difference in
voltages V1and V2. Therefore, it is desirable not only to
make C2as large as possible to eliminate output voltage
ripple, but also to employ a correspondingly large value for
C1in order to achieve maximum efficiency of operation.
1
2
3
4
8
7
6
5
TC7660S
+
V+
(+5V)
VO
C1
10µFCOSC
*
+
C2
10µF
IL
RL
IS
V+
NOTE: For large values of COSC (>1000pF), the values
of C1and C2should be increased to 100 F.
Detailed Description
The TC7660S contains all the necessary circuitry to
implement a voltage inverter, with the exception of two
externalcapacitors,whichmaybeinexpensive10µF polar-
izedelectrolyticcapacitors.Operationisbestunderstoodby
considering Figure 2, which shows an idealized voltage
inverter. Capacitor C1is charged to a voltage V+for the half
cyclewhen switches S1and S3areclosed. (Note: Switches
S2andS4areopenduringthishalfcycle.)Duringthesecond
half cycle of operation, switches S2and S4are closed, with
S1and S3open, thereby shifting capacitor C1negatively by
V+volts.ChargeisthentransferredfromC1negativelybyV+
volts.ChargeisthentransferredfromC1toC2,suchthatthe
voltageonC2isexactlyV+,assumingideal switchesand no
load on C2.
Thefour switches in Figure 2 areMOSpower switches;
S1is a P-channel device, and S2, S3and S4are N-channel
devices. The main difficulty with this approach is that in
integrating the switches, the substrates of S3and S4must
alwaysremainreverse-biasedwithrespecttotheirsources,
but not so much as to degrade their ON resistances. In
addition, at circuit start-up, and under output short circuit
conditions (VOUT = V+), the output voltage must be sensed
and the substrate bias adjusted accordingly. Failure to
accomplishthiswillresultinhighpowerlossesandprobable
device latch-up.
This problem is eliminated in the TC7660S by a logic
network which senses the output voltage (VOUT) together
with the level translators, and switches the substrates of S3
and S4to the correct level to maintain necessary reverse
bias.