Microchip Technology PIC16F716 User manual

2003 Microchip Technology Inc. Preliminary DS41206A
PIC16F716
Data Sheet
8-bit Flash-based Microcontroller
with A/D Converter and
Enhanced Capture/Compare/PWM

DS41206A-page ii Preliminary 2003 Microchip Technology Inc.
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2003 Microchip Technology Inc. Preliminary DS41206A-page 1
PIC16F716
Microcontroller Core Features:
• High-performance RISC CPU
•Only 35 single-word instructions to learn
-All single-cycle instructions except for
program branches which are two-cycle
• Operating speed: DC - 20 MHz clock input
DC - 200 ns instruction cycle
• Interrupt capability
(up to 7 internal/external interrupt sources)
• 8-level deep hardware stack
• Direct, Indirect and Relative Addressing modes
Special Microcontroller Features
• Power-on Reset (POR)
• Power-up Timer (PWRT) and
Oscillator Start-up Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC
oscillator for reliable operation
• Dual level Brown-out Reset circuitry
- 2.5 VBOR (Typical)
- 4.0 VBOR (Typical)
• Programmable code protection
• Power saving Sleep mode
• Selectable oscillator options
• Fully static design
• In-Circuit Serial Programming(ICSP™)
CMOS Technology
• Wide operating voltage range:
- Industrial: 2.0V to 5.5V
- Extended: 3.0V to 5.5V
• High Sink/Source Current 25/25 mA
• Wide temperature range:
- Industrial: -40°C to 85°C
- Extended: -40°C to 125°C
Low-Power Features:
• Standby Current:
- 100 nA @ 2.0V, typical
• Operating Current:
-14µA @ 32 kHz, 2.0V, typical
-120µA @ 1 MHz, 2.0V, typical
• Watchdog Timer Circuit:
-1µA @ 2.0V, typical
• Timer1 Oscillator Current:
-3.0µA @ 32 kHz, 2.0V, typical
Peripheral Features:
• Timer0: 8-bit timer/counter with 8-bit prescaler
• Timer1: 16-bit timer/counter with prescaler
can be incremented during Sleep via external
crystal/clock
• Timer2: 8-bit timer/counter with 8-bit period
register, prescaler and postscaler
• Enhanced Capture, Compare, PWM module:
- Capture is 16-bit, max. resolution is 12.5 ns
- Compare is 16-bit, max. resolution is 200 ns
- PWM maximum resolution is 10-bit
- Enhanced PWM:
- Single, Half-Bridge and Full-Bridge modes
- Digitally programmable dead-band delay
- Auto-shutdown/restart
• 8-bit multi-channel Analog-to-Digital converter
• 13 I/O pins with individual direction control
• Programmable weak pull-ups on PORTB
Device Memory I/O 8-bit A/D
(ch) Timers 8/16 PWM
(outputs) VDD Range
Flash Data
PIC16F716 2048 x 14 128 x 8 13 4 2/1 1/2/4 2.0V - 5.5V
8-bit Flash-based Microcontroller with A/D Controller and
Enhanced Capture/Compare PWM

PIC16F716
DS41206A-page 2 Preliminary 2003 Microchip Technology Inc.
Pin Diagrams
RA2/AN2
RA4/T0CKI
RB0/INT/ECCPAS2
RB1/T1OSO/T1CKI
RA0/AN0
OSC1/CLKIN
RB7/P1D
RB6/P1C
1
2
3
4
5
6
7
18
17
16
15
14
13
12
8
911
10
18-pin PDIP, SOIC
MCLR/VPP
RA3/AN3/VREF
RB2/T1OSI
RB3/CCP1/P1A RB4/ECCPAS0
RB5/P1B
RA1/AN1
VDD
OSC2/CLKOUT
VSS
RA2/AN2
RA4/T0CKI
RB0/INT/ECCPAS2
RB1/T1OSO/T1CKI
RA0/AN0
OSC1/CLKIN
RB7/P1D
RB6/P1C
1
2
3
4
5
6
7
20
19
18
17
16
15
14
8
913
12
20-pin SSOP
MCLR/VPP
RA3/AN3/VREF
RB2/T1OSI
RB3/CCP1/P1A RB4/ECCPAS0
RB5/P1B
RA1/AN1
VDD
OSC2/CLKOUT
VSS
10
VSS VDD
11
PIC16F716 PIC16F716

2003 Microchip Technology Inc. Preliminary DS41206A-page 3
PIC16F716
Table of Contents
1.0 Device Overview .......................................................................................................................................................................... 5
2.0 Memory Organization................................................................................................................................................................... 7
3.0 I/O Ports ..................................................................................................................................................................................... 19
4.0 Timer0 Module ........................................................................................................................................................................... 27
5.0 Timer1 Module ........................................................................................................................................................................... 29
6.0 Timer2 Module ........................................................................................................................................................................... 31
7.0 Enhanced Capture/Compare/PWM (ECCP) Module.................................................................................................................. 33
8.0 Analog-to-Digital Converter (A/D) Module.................................................................................................................................. 49
9.0 Special Features of the CPU...................................................................................................................................................... 55
10.0 Instruction Set Summary............................................................................................................................................................ 71
11.0 Development Support................................................................................................................................................................. 85
12.0 Electrical Characteristics............................................................................................................................................................ 91
13.0 DC and AC Characteristics Graphs and Tables....................................................................................................................... 107
14.0 Packaging Information.............................................................................................................................................................. 109
Appendix A: Revision History............................................................................................................................................................. 113
Appendix B: Conversion Considerations ........................................................................................................................................... 113
Appendix C: Migration from Base-line to MID-RANGE Devices........................................................................................................ 114
On-Line Support................................................................................................................................................................................. 115
Systems Information and Upgrade Hot Line...................................................................................................................................... 115
Reader Response.............................................................................................................................................................................. 116
Index .................................................................................................................................................................................................. 117
Product Identification System ............................................................................................................................................................ 123
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Errata

PIC16F716
DS41206A-page 4 Preliminary 2003 Microchip Technology Inc.
NOTES:

2003 Microchip Technology Inc. Preliminary DS41206A-page 5
PIC16F716
1.0 DEVICE OVERVIEW
This document contains device specific information for
the PIC16F716. Additional information may be found in
the PICmicro®Mid-Range Reference Manual,
(DS33023), which may be obtained from your local
Microchip Sales Representative or downloaded from
the Microchip web site (www.microchip.com). The
Reference Manual should be considered a
complementary document to this data sheet, and is
highly recommended reading for a better
understanding of the device architecture and operation
of the peripheral modules.
Figure 1-1 is the block diagram for the PIC16F716
device. The pinouts are listed in Table 1-1.
FIGURE 1-1: PIC16F716 BLOCK DIAGRAM
Flash
Program
Memory
13 Data Bus 8
14
Program
Bus
Instruction reg
Program Counter
8 Level Stack
(13-bit)
RAM
File
Registers
Direct Addr 7
RAM Addr(1) 9
Addr MUX
Indirect
Addr
FSR reg
Status reg
MUX
ALU
W reg
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Instruction
Decode and
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
MCLR VDD, VSS
PORTA
PORTB
RB0/INT/ECCPAS2
RB1/T1OSO/T1CKI
RB2/T1OSI
RB3/CCP1/P1A
RB4/ECCPAS0
RB5/P1B
RB6/P1C
RB7/P1D
8
8
Brown-out
Reset
Note 1: Higher order bits are from the Status register.
A/D
Timer0 Timer1 Timer2
RA4/T0CKI
RA3/AN3/VREF
RA2/AN2
RA1/AN1
RA0/AN0
8
3
128 x 8
2K x 14
Enhanced CCP
(ECCP)

PIC16F716
DS41206A-page 6 Preliminary 2003 Microchip Technology Inc.
TABLE 1-1: PIC16F716 PINOUT DESCRIPTION
Name Function Input Type Output Type Description
MCLR/VPP MCLR ST — Master clear (Reset) input. This pin is an active low Reset to
the device.
VPP P — Programming voltage input
OSC1/CLKIN OSC1 XTAL — Oscillator crystal input
CLKIN CMOS — External clock source input
CLKIN ST — RC Oscillator mode
OSC2/CLKOUT OSC2 XTAL — Oscillator crystal output. Connects to crystal or resonator in
Crystal Oscillator mode.
CLKOUT — CMOS In RC mode, OSC2 pin outputs CLKOUT which has 1/4 the
frequency of OSC1, and denotes the instruction cycle rate.
RA0/AN0 RA0 TTL CMOS Bidirectional I/O
AN0 AN — Analog Channel 0 input
RA1/AN1 RA1 TTL CMOS Bidirectional I/O
AN1 AN — Analog Channel 1 input
RA2/AN2 RA2 TTL CMOS Bidirectional I/O
AN2 AN — Analog Channel 2 input
RA3/AN3/VREF RA3 TTL CMOS Bidirectional I/O
AN3 AN — Analog Channel 3 input
VREF AN — A/D reference voltage input
RA4/T0CKI RA4 ST OD Bidirectional I/O. Open drain when configured as output.
T0CKI ST — Timer0 external clock input
RB0/INT/ECCPAS2 RB0 TTL CMOS Bidirectional I/O. Programmable weak pull-up.
INT ST — External Interrupt
ECCPAS2 ST — ECCP Auto-Shutdown pin
RB1/T1OSO/T1CKI RB1 TTL CMOS Bidirectional I/O. Programmable weak pull-up.
T1OSO — XTAL Timer1 oscillator output. Connects to crystal in Oscillator
mode.
T1CKI ST — Timer1 external clock input
RB2/T1OSI RB2 TTL CMOS Bidirectional I/O. Programmable weak pull-up.
T1OSI XTAL — Timer1 oscillator input. Connects to crystal in Oscillator mode.
RB3/CCP1/P1A RB3 TTL CMOS Bidirectional I/O. Programmable weak pull-up.
CCP1 ST CMOS Capture1 input, Compare1 output, PWM1 output.
P1A — CMOS PWM P1A output
RB4/ECCPAS0 RB4 TTL CMOS Bidirectional I/O. Programmable weak pull-up. Interrupt-on-
change.
ECCPAS0 ST — ECCP Auto-Shutdown pin
RB5/P1B RB5 TTL CMOS Bidirectional I/O. Programmable weak pull-up. Interrupt-on-
change.
P1B — CMOS PWM P1B output
RB6/P1C RB6 TTL CMOS Bidirectional I/O. Programmable weak pull-up. Interrupt-on-
change. ST input when used as ICSP programming clock.
P1C — CMOS PWM P1C output
RB7/P1D RB7 TTL CMOS Bidirectional I/O. Programmable weak pull-up. Interrupt-on-
change. ST input when used as ICSP programming data.
P1D — CMOS PWM P1D output
VSS VSS P — Ground reference for logic and I/O pins.
VDD VDD P — Positive supply for logic and I/O pins.
Legend: I = Input AN = Analog input or output OD = Open drain
O = Output TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels
P = Power XTAL = Crystal CMOS = CMOS compatible input or output

2003 Microchip Technology Inc. Preliminary DS41206A-page 7
PIC16F716
2.0 MEMORY ORGANIZATION
There are two memory blocks in the PIC16F716
PICmicro®microcontroller device. Each block
(program memory and data memory) has its own bus
so that concurrent access can occur.
Additional information on device memory may be found
in the PICmicro®Mid-Range Reference Manual,
(DS33023).
2.1 Program Memory Organization
The PIC16F716 has a 13-bit program counter capable
of addressing an 8K x 14 program memory space. The
PIC16F716 has 2K x 14 words of program memory.
Accessing a location above the physically implemented
address will cause a wrap-around.
The Reset vector is at 0000h and the interrupt vector is
at 0004h.
FIGURE 2-1: PROGRAM MEMORY MAP
AND STACK OF
PIC16F716
2.2 Data Memory Organization
The data memory is partitioned into multiple banks
which contain the General Purpose Registers (GPR)
and the Special Function Registers (SFR). Bits RP1
and RP0 of the Status register are the bank select bits.
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the Special
Function Registers. Above the Special Function
Registers are General Purpose Registers,
implemented as static RAM. All implemented banks
contain Special Function Registers. The upper 16
bytes of GPR space and some “high use” Special
Function Registers in Bank 0 are mirrored in Bank 1 for
code reduction and quicker access.
PC<12:0>
13
0000h
0004h
0005h
07FFh
0800h
1FFFh
Stack Level 1
Stack Level 8
Reset Vector
Interrupt Vector
On-chip Program
Memory
CALL, RETURN
RETFIE, RETLW
User Memory
Space
RP1:RP0(1)
(status<6:5>) Bank
00 0
01 1
10 2(2)
11 3(2)
Note 1: Maintain Status bit 6 clear to ensure
upward compatibility with future products.
2: Not implemented

PIC16F716
DS41206A-page 8 Preliminary 2003 Microchip Technology Inc.
2.2.1 GENERAL PURPOSE REGISTER
FILE
The register file can be accessed either directly or
indirectly through the File Select Register FSR
(Section 2.5 “Indirect Addressing, INDF and FSR
Registers”).
FIGURE 2-2: REGISTER FILE MAP
Unimplemented data memory locations,
read as '0'.
Note 1: Not a physical register.
File
Address File Address
00h INDF(1) INDF(1) 80h
01h TMR0 OPTION_REG 81h
02h PCL PCL 82h
03h STATUS STATUS 83h
04h FSR FSR 84h
05h PORTA TRISA 85h
06h PORTB TRISB 86h
07h 87h
08h 88h
09h 89h
0Ah PCLATH PCLATH 8Ah
0Bh INTCON INTCON 8Bh
0Ch PIR1 PIE1 8Ch
0Dh 8Dh
0Eh TMR1L PCON 8Eh
0Fh TMR1H 8Fh
10h T1CON 90h
11h TMR2 91h
12h T2CON PR2 92h
13h 93h
14h 94h
15h CCPR1L 95h
16h CCPR1H 96h
17h CCP1CON 97h
18h PWM1CON 98h
19h ECCPAS 99h
1Ah 9Ah
1Bh 9Bh
1Ch 9Ch
1Dh 9Dh
1Eh ADRES 9Eh
1Fh ADCON0 ADCON1 9Fh
20h General
Purpose
Registers
80 Bytes
General
Purpose
Registers
32 Bytes
A0h
BFh
C0h
6Fh EFh
70h
7Fh 16 Bytes Accesses 70-7Fh F0h FFh
Bank 0 Bank 1