Motorola DSP56362 User manual

MOTOROLA
SEMICONDUCTOR PRODUCT INFORMATION DSP56362
Order this document by:
DSP56362P/D
REV. 2
©1999 MOTOROLA, INC.
DSP56362 Product Brief
Product Brief
This document contains information on a new product. Specifications and information herein are subject to change without notice.
24-BIT AUDIO DIGITAL SIGNAL PROCESSOR
The DSP56362 is a high performance DSP optimized for cost-sensative consumer audio
applications. A general purpose DSP56362 is available as well as a multimode, multichannel audio
decoder for consumer applications such as Audio/Video (A/V) receivers, surround sound decoders,
Digital Versatile Disk (DVD) players, digital TV, and other audio applications. The DSP56362
supports all of the popular multichannel audio decoding formats, including Dolby Digital Surround,
Moving Picture Experts Group Standard 2 (MPEG2), and Digital Theater Systems (DTS), in a single
device with sufficient MIPS resources for customer defined post-processing features such as bass
management, 3D virtual surround, Lucasfilm THX5.1, soundfield processing, and advanced
equalization.
The DSP56362, Figure 1,is member of the 56300 Motorola Symphony™ DSP Family. The
DSP56362 utilizes the single-instruction-per-clock-cycle DSP56300 core, while retaining code
compatibility with the DSP56000 core family. The DSP56362 contains audio-specific peripherals and
an on-board software architecture as shown in Figure 2 and is offered in a 100/120 MHz/MIPS
version at a nominal 3.3 V.
Figure 1 DSP56362 Block Diagram
PLL OnCE™
Clock
Generator
Internal
Data
Bus
Switch
YAB
XAB
PAB
YDB
XDB
PDB
GDB
MODB/IRQB
MODC/IRQC
External
Data Bus
Switch
11
MODD/IRQD
DSP56300
1216
24-BIT
24
18
DDB
DAB
Peripheral
Core
YM_EB
XM_EB
PM_EB
PIO_EB
Expansion Area
SHI
JTAG
6
5
RESET
MODA/IRQA
PINIT/NMI
EXTAL
Address
Control
Data
Triple
Timer Host
Interface ESAI
Address
Generation
Unit
Six Channel
DMA Unit
Program
Interrupt
Controller
Program
Decode
Controller
Program
Address
Generator
DataALU
24
× 24 +56
→
56-bit MAC
Two 56-bit Accumulators
56-bit Barrel Shifter
Power
Mgmt.
DRAM/SRAM
Bus
Interface
&
I - Cache
Control
External
Address
Bus
Switch
AA0456G
Memory
Expansion
Area
Program RAM/
Instruction
Cache
3072 ×24
Program ROM
30K ×24
Bootstrap ROM
X Data
RAM
5632 ×24
ROM
6144 ×24
Y Data
RAM
5632 ×24
ROM
6144 ×24
CLKOUT
DAX
(SPDIF)
2
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2 DSP56362 Product Brief MOTOROLA
DSP56362
24-Bit Audio Digital Signal Processor
Figure 2 DSP56362 Surround Decoder Functionality
Features
•Multimode, multichannel decoder software functionality
–Dolby Digital and Pro Logic
–MPEG2 5.1
–DTS
•Digital audio post-processing capabilities
–Bass management
–3D Virtual surround sound
–Lucasfilm THX5.1
–Soundfield processing
–Equalization
•Digital Signal Processing Core
–100/120 Million Instructions Per Second (MIPS) with an 100/120 MHz clock at a
nominal 3.3 V
–Object code compatible with the DSP56000 core with highly parallel instruction set
–Data Arithmetic Logic Unit (Data ALU)
–Program Control Unit (PCU)
–Direct Memory Access (DMA)
–Software programmable PLL-based frequency synthesizer for the core clock
Select
IEC958
Tx
Sr/Sl
I
2
S
Tx
C/Sub
I
2
S
Tx
L/R
I
2
S
Tx
Serial
Host
Interface
General
Purpose
I/O
System
Clock
PLL
DSP Clock
JTAG/OnCE™
Interface
SPI/I
2
C
Protocol
User
Programmable
I/O
Dedicated
Debugging
Port
External
Host CPU/
AA0565G
User
Select
Dolby
Digital
MPEG2
5.1/7.1
DTS
Dolby
Noise
Sequencer
8-bit DataInterface
Left/Right
Stereo Out
Center/
Subwoofer
Out
Right/Left
Surround
Sound Out
I
2
S
Rx
Input
Buffer
Parallel
Host/Data
Interface
DSP56362
Auto
Detector
Defined
Processing:
—
Bass mgt
— 3DVirtual
Surround
— Lucasfilm
— Soundfields
— Equalization
Pro Logic
THX5.1
L/R
I
2
S
Tx Headphone
Mix Down/
Aux. Sur-
Output Delay Buffer
round
PCM or
Compresse
d Data
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DSP56362
24-Bit Audio Digital Signal Processor
MOTOROLA DSP56362 Product Brief 3
–Hardware debugging support: On-Chip Emulation (OnCE™) module, Joint Test
Action Group (JTAG) Test Access Port (TAP), and Address Trace mode
•On-Chip Memories
–Modified Harvard architecture allows simultaneous access to program and data
memories
–Program ROMs that may be factory programmed with data/program provided by the
application developer
–3K x 24 Bit Program RAM
–30K x 24 Bit Program ROM
–5.5K x 24 Bit X-dataRAM
–6K x 24 Bit X-data ROM
–5.5K x 24 Bit Y-data RAM
–6K x 24 Bit Y-data ROM
–192 x 24-bit bootstrap ROM
•Off-Chip Memory Expansion
–Memory expansion up to 4-256K x 24-bit word memory for P, X, and Y memory when
using SRAM
–Memory expansion up to 4-16M x 24-bit word memory for P, X, and Y memory when
using DRAM
–Twenty-four data pin external memory expansion port ( for high speed external
memory access allowing for a large number of external accesses per sample)
–Chip Select Logic for glueless interface to SRAMs
–On-chip DRAM Controller for glueless interface to DRAMs
•Peripheral and Support Circuits
–Enhanced Serial Audio Interface (ESAI) includes:
•6 serial data lines, 4 selectable as receive or transmitt and 2 transmitt only.
•Master or slave capability
• I2S, Sony, AC97, and other audio protocol implementations
•Asynchronous and synchronous operation
–Serial Host Interface (SHI) features:
•SPI and I2C protocols
•Ten-word receive FIFO
•Support for 8-, 16-, and 24-bit words.
–Byte-wide parallel Host Interface (HDI08) with DMA support
–DAX features one serial transmitter capable of supporting S/PDIF, IEC958, IEC1937,
CP-340, and AES/EBU digital audio formats
–Triple Timer module
–On-chip peripheral registers memory mapped in data memory space
•Reduced Power Dissipation
–Very low power (3.3 V) CMOS design
–Wait and Stop low-power standby modes
–Fully-static logic, operation frequency down to 0 Hz (DC)
–Optimized power management circuitry
PACKAGE
–144-pin plastic Thin Quad Flat Pack (TQFP) surface-mount package
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Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no
warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does
Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims
any and all liability, including without limitation consequential or incidental damages. “Typical”parameters which may
be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals”must be validated for each customer
application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights
of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support life, or for any other application in which the
failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer
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hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs,
damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury
or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent
regarding the design or manufacture of the part. Motorola and are registeredtrademarksof Motorola, Inc. Motorola,
Inc. is an Equal Opportunity/Affirmative Action Employer.
How to reach us:
USA/Europe/Locations Not Listed:
Motorola Literature Distribution
P.O. Box 5405
Denver, Colorado 80217
303-675-2140
1 [phone]
Mfax™:
[e-mail]
TOUCHTONE [phone]
US & Canada ONLY [phone]
Asia/Pacific:
Motorola Semiconductors H.K. Ltd.
8B Tai Ping Industrial Park
51 Ting Kok Road
Tai Po, N.T., Hong Kong
852-26629298
Technical Resource Center:
1 [phone]
DSP Helpline
[e-mail]
Japan:
Nippon Motorola Ltd.
SPD, Strategic Planning Office, 141
4-32-1, Nishi-Gotanda
Shinagawa-ku, Tokyo, Japan
81-3-5487-8488
Internet:
http://www.motorola-dsp.com
or
http://www.dspaudio.motorola.com
OnCE and Mfax are trademarks of Motorola, Inc.
DOCUMENTATION
Table 1 lists the documents that provide a complete description of the DSP56362 and are
required to design properly with the part. Documentation is available from a local Motorola
distributor, a Motorola semiconductor sales office, a Motorola Literature Distribution Center, or
(for the latest information) through the Motorola DSP home page on the Internet. (See address
below).
Table 1 DSP56362 Chip Documentation
Topic Description Order Number
DSP56300
Family Manual Detailed description of the DSP56800 family architecture and the 24-bit core processor and instruction set DSP56300FM/AD
DSP56362
User’s Manual Detailed description of memory, peripherals, and interfaces DSP56362UM/AD
DSP56362
Technical Data
Sheet
Electrical and timing specifications and pin and package
descriptions DSP56362/D
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