Nokia RH-17 Series User manual

CCS Technical Documentation
RH-17 Series Transceivers
Issue 1 04/2003 Confidential Nokia Corporation
Troubleshooting — BB

RH-17
Troubleshooting — BB CCS Technical Documentation
Page 2 Nokia Corporation Confidential Issue 1 04/2003

CCS Technical Documentation Troubleshooting — BB
RH-17
Issue 1 04/2003 Nokia Corporation Confidential Page 3
Contents Page No
Troubleshooting - Baseband .......................................................................................... 5
Overview ......................................................................................................................5
BB and RF Architecture ..............................................................................................6
Power Up and Reset .....................................................................................................6
Power up with PWR key ..............................................................................................9
Power up when charger is connected ...........................................................................9
RTC alarm power up ...................................................................................................9
Power off .....................................................................................................................9
Power Consumption and Operation modes ...............................................................10
Power Distribution .....................................................................................................11
Clock Distribution .....................................................................................................12
RFClk (19.2 MHz Analog)...................................................................................... 12
RFConvClk (19.2 MHz digital) .............................................................................. 13
CBUSClk Interface ................................................................................................. 13
DBUSClk Interface ................................................................................................. 14
SLEEPClk (Digital)................................................................................................. 14
SLEEPClk (Analog)................................................................................................ 15
Flash programming ....................................................................................................16
Connections to Baseband........................................................................................ 16
Baseband Power Up ................................................................................................ 16
Flash Programming Indication................................................................................ 16
Flashing ......................................................................................................................17
Charging operation ....................................................................................................18
Battery..................................................................................................................... 18
Charging circuitry ................................................................................................... 19
Charger Detection ................................................................................................... 20
Charge Control........................................................................................................ 21
Audio .........................................................................................................................21
Display and Keyboard ...............................................................................................21
Accessory ...................................................................................................................22
Charging.................................................................................................................. 23
Tomahawk headset detection .................................................................................. 24
Accessory detection though ACI............................................................................. 26
RUIM (SIM Car)..................................................................................................... 27
Test Points .................................................................................................................29
Top view.................................................................................................................. 29
Bottom View........................................................................................................... 31
Troubleshooting .........................................................................................................31
Top troubleshooting map ...........................................................................................32
Phone is totally dead ............................................................................................... 34
Flash programming doesn‘t work ........................................................................... 35
Power doesn‘t stay on or the phone is jammed....................................................... 37
Charger.................................................................................................................... 39
Audio faults............................................................................................................. 40
Display faults........................................................................................................... 44
Keypad faults........................................................................................................... 47

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Troubleshooting — BB CCS Technical Documentation
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Troubleshooting - Baseband
Overview
The Baseband module of RH-17 transceiver is a CDMA single band engine. The Baseband
architecture is based on the DCT4 Apollo engine.
RH-17 Baseband consists of three ASICs: Universal Energy Management (UEM), Universal
Phone Processor (UPP), and a 64-megabit Flash.
The Baseband architecture supports a power-saving function called “sleep mode”. This
sleep mode shuts off the VCTCXO, which is used as system clock source for both RF and
Baseband. During the sleep mode, the system runs from a 32kHz crystal. The phone
awakes by a timer running from this 32kHz clock. The sleep is determined by network
parameters. Sleep mode is entered when both the MC and the DSP are in standby mode
and the normal VCTCXO clock is switched off.
RH-17 supports both 2- and 3-wire DCT3-type wire chargers. However, the 3-wire
chargers are treated as 2-type wire chargers. Charging is controlled by UEM ASIC and EM
SW.
BL-5C Li-ion battery is used as main power source for RH-17. BL-5C has nominal capac-
ity of 850 mAh.

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BB and RF Architecture
Figure 1: RH-17 Power Distribution
Power Up and Reset
Power up and reset is controlled by the UEM ASIC. RH-17 baseband can be powered up
in the following ways:
1 By the Power button, which means grounding the PWRONX pin of the UEM
2 By connecting the charger to the charger input
Bottom
Conn.
Flash
Robin Batman
Core
UPP
Charger
Battery
LCD/Key
VCTCXO
19.2 MHz
Sleep Clk
32 KHz
CBus
DBus
MBus
ExtBusC
FBus
MBus
RF
Bus
VBatt
VIO
Vflash1
Vflash2
VR2
UEM
VR1B
VR6
VR5
VR1A
VR4
VR3
VR7
VPPPRODTP
VANA
PA
VBatt
Front
End UHF
SYNTH
FBusRx
FBusTx
VCORE

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3 By the RTC Alarm, when the RTC logic has been programmed to give an alarm
After receiving one of the above signals, the UEM counts a 20ms delay and then enters in
reset mode. The watchdog starts up, and if the battery voltage is greater than Vcoff+, a
200ms delay is started to allow references etc. to settle. After this delay elapses the
VFLASH1 regulator is enabled. Then, 500us later VR3, VANA, VIO and VCORE are enabled.
Finally the PURX (Power Up Reset) line is held low for 20 ms. This reset, PURX, is fed to
the baseband ASIC UPP, resets are generated for the MCU and the DSP. During this reset
phase, the UEM forces the VCTCXO regulator on — regardless of the status of the sleep
control input signal to the UEM. The FLSRSTx from the ASIC is used to reset the flash
during power-up and to put the flash in power-down during sleep.
All baseband regulators are switched on when the UEM powers on. The UEM internal
watchdogs are running during the UEM reset state, with the longest watchdog time
selected. If the watchdog expires, the UEM returns to power-off state. The UEM watch-
dogs are internally acknowledged at the rising edge of the PURX signal in order to always
give the same watchdog response time to the MCU.
The following timing diagram represents UEM start-up sequence from reset to power-on
mode.

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Reference signal
PwrOnX
Charger Detection
RTC
UEMRSTX
VFlash1
VIO
VCORE
VANA
VR3
19.2MHz Clk
PURX
t1 t2 t4t3
32kHz XTAL
t1 = 20ms
t2 = 200ms
t3 = 500us
t4 = 20ms

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Power up with PWR key
When the Power on key is pressed, the UEM enters the power-up sequence. Pressing the
power key causes the PWRONX pin on the UEM to be grounded. The UEM PWRONX sig-
nal is not part of the keypad matrix. The power key is only connected to the UEM. This
means that when pressing the Power key, an interrupt is generated to the UPP that starts
the MCU. The MCU then reads the UEM interrupt register and notices that it is a
PWRONX interrupt. The MCU now reads the status of the PWRONX signal using the UEM
control bus, CBUS. If the PWRONX signal stays low for a certain time, the MCU accepts
this as a valid power-on state and continues with the SW initialization of the baseband.
If the Power on key does not indicate a valid power on situation, the MCU powers off the
baseband.
Power up when charger is connected
In order to be able to detect and start charging in the case where the main battery is
fully discharged (empty) and hence UEM has no supply (NO_SUPPLY or BACKUP mode of
UEM), charging is controlled by START-UP CHARGING circuitry.
Whenever VBAT level is detected to be below master reset threshold (VMSTR-), charging
starts and is controlled by START_UP charge circuitry. Connecting a charger forces
VCHAR input to rise above the charger detection threshold, VCHDET+, and by detection
charging is started. UEM generates 100mA constant output current from the connected
charger’s output voltage. As battery charges, its voltage rises and when VBAT voltage
level is detected to be higher than the master reset threshold limit (VMSTR+), START_UP
charge is terminated.
Monitoring the VBAT voltage level is done by charge control block (CHACON). MSTRX=‘1’
output reset signal (internal to UEM) is given to UEM’s RESET block when VBAT>VMSTR+
and UEM enters into reset sequence.
If VBAT is detected to fall below VMSTR- during start-up charging, charging is
cancelled. It will restart if new rising edge on VCHAR input is detected
(VCHAR rising above VCHDET+).
RTC alarm power up
If phone is in POWER_OFF mode when RTC alarm occurs, a wake-up procedure occurs.
After baseband is powered ON, an interrupt is given to MCU. When RTC alarm occurs
during ACTIVE mode, an interrupt to MCU is generated.
Power off
The Baseband switches into power off mode if any of following statements is true
• Power key is pressed
• Battery voltage is too low (VBATT < 3.2 V)
• Or if Watchdog timer register expires

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The Power-down procedure is controlled by the UEM.
Power Consumption and Operation modes
During power off mode, power (VBAT) is supplied to UEM, BUZZER, VIBRA, LED, PA and
PA drivers (Tomcat and Hornet). During this mode, the current consumption on this mode
is approximately 35uA.
In sleep mode, both processors, MCU and DSP, are in stand-by mode. Phone will go to
sleep mode only when both processors made this request. When SLEEPX signal is
detected low by the UEM, the phone enters SLEEP mode. VIO and VFLASH1 regulators are
put into low quiescent current mode, VCORE enters LDO mode and VANA and VFLASH2
regulators are disabled. All RF regulators are disabled during SLEEP mode. When SLEEPX
signal is detected high by the UEM, the phone enters ACTIVE mode and all functions are
activated.
The sleep mode is exited either by the expiration of a sleep clock counter in the UEM or
by some external interrupt, generated by a charger connection, key press, headset con-
nection, etc.
In sleep mode, the VCTCXO is shut down and the 32 kHz sleep clock oscillator is used as
reference clock for the baseband.
The average current consumption of the phone can vary depending mainly on SW state
like slot cycle 0, 1, or 2 and if the phone is working on IS95 or IS2000 for CDMA; how-
ever, on average is about 6 mA in slot cycle 0 on IS95.
In the ACTIVE mode, the phone is in normal operation, scanning for channels, listening
to a base station, transmitting and processing information. There are several sub-states
in the active mode depending on the phone present state such as: burst reception, burst
transmission, if DSP is working, etc.
In active mode, SW controls the UEM RF regulators: VR1A and VR1B can be enabled or
disabled. VSIM can be enabled or disabled and its output voltage can be programmed to
be 1.8V or 3.3V. VR2 and VR4 -VR7 can be enabled or disabled or forced into low quies-
cent current mode. VR3 is always enabled in active mode and disabled during Sleep
mode and cannot be control by SW in the same way as the other regulators. VR3 will
only turn off if both processors request to be in sleep mode.
CHARGING mode can be performed in parallel with any other operating mode. A BSI
resistor inside the battery indicates the battery type/size. The resistor value corresponds
to a specific battery type and capacity. This capacity value is related to the battery tech-
nology.
The battery voltage, temperature, size and charging current are measured by the UEM,
and the EM charging algorithm controls it.
The charging control circuitry (CHACON) inside the UEM controls the charging current
delivered from the charger to the battery. The battery voltage rise is limited by turning

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the UEM switch off, when the battery voltage has reached 4.2 V. Charging current is
monitored by measuring the voltage drop across a 220 mOhm resistor.
Power Distribution
In normal operation the baseband is powered from the phone‘s battery. The battery con-
sists of one Lithium-Ion cell. In the case of RH-17, the battery capacity is 850 mAh.
The UEM ASIC controls the power distribution to whole phone through the BB and RF
regulators excluding the power amplifier (PA), which has a continuous power rail directly
from the battery. The battery feeds power directly to following parts of the system: UEM,
PA, buzzer, Vibra, display- and keyboard lights.
The heart of the power distribution to the phone is the power control ASIC, called UEM.
It includes all the voltage regulators and feeds power to the whole system. UEM handles
hardware functions of power up so that regulators are not powered and power up reset
(PURX) is not released if the battery voltage is less than 3 V.
RH-17 Baseband is powered from five different UEM regulators: VANA, VIO, VFLASH1,
VFLASH2, and VCORE. See Table 1.
UEM voltage regulators: VR1A, VR1B, VR2, VR3, VR4, VR5, VR6 and VR7 are used by RF.
See Table 2.
Table 1: RH-17 Baseband Regulators
Regulator Maximum
current Vout [V] Notes
VCORE 300 1.5 Output voltage selectable 1.0V/
1.3V/1.5V/1.8V
Default power at power-up is 1.5V
VIO 150 1.8 Enabled always except during
power-off mode
VFLASH1 70 2.78 Enabled always except during
power-off mode
VFLASH2 40 2.78 Enabled only when data cable is
connected
VANA 80 2.78 Enabled only when the system is
awake (Off during sleep and
power-off modes)
VSIM 25 3.0 Not used

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A charge pump used by VR1A is constructed around UEM. The charge pump works with
Cbus (1.2 MHz Clk) and gives a 4.75 V regulated output voltage to RF.
Clock Distribution
RFClk (19.2 MHz Analog)
The main clock signal for the baseband is generated from the voltage and temperature
controlled crystal oscillator VCTCXO (G501). This 19.2 MHz clock signal is generated at
the RF and fed to RFCLK pin of UPP.
Table 2: RH-17 RF Regulators
Regulator Maximum
current [mA] Vout [V] Notes
VR1A 10 4.75 Enabled when the receiver is on
VR1B 10 4.75 Enabled when the transmitter is on
VR2 100 2.78 Enabled when the transmitter is on
VR3 20 2.78 Enabled when SleepX is high
VR4 50 2.78 Enabled when the receiver is on
VR5 50 2.78 Enabled when the receiver is on
VR6 50 2.78 Enabled when the transmitter is on
VR7 45 2.78 Enabled when the receiver is on

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RFConvClk (19.2 MHz digital)
The UPP distributes the 19.2MHz Clk to the internal processors, the DSP and MCU, where
SW multiplies this clock by seven for the DSP and by two for the MCU.
CBUSClk Interface
A 1.2 MHz clock signal is use for CBUS, which is used by the MCU to transfer data
between UEM and UPP.

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DBUSClk Interface
A 9.6 MHz clock signal is use for DBUS, which is used by the DSP to transfer data
between UEM and UPP.
The system clock can stopped during sleep mode by disabling the VCTCXO power supply
from the UEM regulator output (VR3) by turning off the controlled output signal SleepX
from UPP.
SLEEPClk (Digital)
The UEM provides a 32kHz sleep clock for internal use and to UPP, where it is used for
the sleep mode timing.

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SLEEPClk (Analog)
However, when the system enters sleep mode or power-off mode, the external 32KHz
crystal provides a reference to the UEM RTC circuit to turn on the phone during
power-off or sleep mode.

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Flash programming
Connections to Baseband
The Flash programming equipment is connected to the baseband using test pads for gal-
vanic connection. The test pads are allocated in such a way that they can be accessed
when the phone is assembled. The flash programming interface consist of the VPP,
FBUSTX, FBUSRX, MBUS, and BSI signals and use by the FPS8 to flash. The connection is
through the UEM which means that the logic voltage levels are corresponding to 2.78V.
Power is supplied to the phone using the battery contacts.
Baseband Power Up
The Baseband power is controller by the flash prommer in production and in reprogram-
ming situations. Applying supply voltage to the battery terminals will cause the Base-
band to power-up. Once the baseband is powered, flash-programming indication is done
as described in the following section.
Flash Programming Indication
Flash programming is indicated to the UPP using MBUSRX signal between UPP and UEM.
The MBUS signal from the baseband to the flash prommer is used as clock for the syn-
chronous communication. The flash prommer keeps the MBUS line low during UPP boot
to indicate that the flash prommer is connected. If the UPP MBUSRX signal is low on UPP
the MCU enters flash programming mode. In order to avoid accidental entry to the flash-
programming mode the MCU only waits for a specified time to get input data from the
flash prommer. If the timer expires without any data being received the MCU will con-
tinue the boot sequence. The MBUS signal from UEM to the external connection is used
as clock during flash programming. This means that flash-programming clock is supplied
to UPP on the MBUSRX signal.
The flash prommer indicates the UEM that flash programming/reprogramming by writing
an 8-bit password to the UEM. The data is transmitted on the FBUSRX line and the UEM
clocks the data on the FBUSRX line into a shift register. When the 8 bits have been
shifted in the register, the flash prommer generates a falling edge on the BSI line. This
loads the shift register content in the UEM into a compare register. If the 8-bits in the
compare registers matches with the default value preset in the UEM, programming
starts. At this point the flash prommer shall pull the MBUS signal to UEM low in order to
indicate to the MCU that the flash prommer is connected. The UEM reset state machine
performs a reset to the system, PURX low for 20 ms. The UEM flash programming mode is
valid until MCU sets a bit in the UEM register that indicates the end of flash program-
ming. Setting this bit also clears the compare register in the UEM previously loaded at
the falling edge of the BSI signal. During the flash programming mode the UEM watch-
dogs are disabled. Setting the bit indicating end of flash programming enables and resets
the UEM watchdog timer to its default value. Clearing the flash programming bit also
causes the UEM to generate a reset to the UPP.
The BSI signal is used to load the value into the compare register. In order to avoid spuri-
ous loading of the register the BSI signal will be gated during UEM master reset and dur-
ing power on when PURX is active. The BSI signal should not change state during normal
operation unless the battery is extracted, in this case the BSI signal will be pulled high,

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note a falling edge is required to load the compare register.
Flashing
• Flash programming is done through VPP, FBUSTX, FBUSRX, MBUS
and BSI signals.
• When phone has entered to flash programming mode, prommer will
indicate to UEM that flash programming will take place by writing 8-bit
password to UEM. Prommer will first set BSI to "1" and then uses
FBUSRX for writing and MBUS for clocking. After that BSI is set back to
"0”.
• -MCU will indicate to prommer that it has been noticed, by using
FBUSTX signal. After this it reports UPP type ID and is ready to receive
secondary boot code to it's internal SRAM.
• This boot code asks MCU to report prommer phone’s configuration
information, including flash device type. Now prommer can select and
send algorithm code to MCU SRAM (and SRAM/Flash self-tests can be
executed).
CH1 = BSI
CH2 = MBUS
CH3 = FBUSTX
CH4 = FBUSR
X
Measure points
Production test patte
rn
(J396)
FLASH_1

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Charging operation
Battery
In RH-17, a Lithium-Ion cell battery with a capacity of 850 mAh is used. Reading a resis-
tor inside the battery pack on the BSI line indicates the battery size. With an NTC-resis-
tor on PWB, the phone measures the approximate temperature of the battery on the
CH1 = PURX
CH2 = MBUS
CH3 = FBUSTX
CH4 = FBUSRX
Measure points
Production test patter
n
(J396)
FLASH_2
CH1 = PURX
CH2 = MBUS
CH3 = FBUSTX
CH4 = FBUSRX
Measure points
Production test pattern
(J396)
FLASH_3
Data transfer has
started (Fbus_Rx)

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BTEMP line.
Temperature and capacity information are needed for charge control. These resistors are
connected to BSI pin of the battery connectore and BTEMP of the phone. Phone has
100 kΩpull-up resistors for these lines so that they can be read by A/D inputs in the
phone.
Figure 2: BL-5C battery pack pin order
Figure 3: Interconnection diagram inside the battery pack
Charging circuitry
The UEM ASIC controls charging depending on the charger being used and the battery
size. External components are needed for EMC, reverse polarity and transient protection
of the input to the baseband module. The charger connection is through the system con-
nector interface. The HDb81 baseband is designed to support DCT3 chargers from an
electrical point of view. Both 2- and 3-wire type chargers are supported. However, as
mention, 3-wire chargers are treated as two.
VBAT
B
SI
G
ND
Li-Ion
OVERCHARGE/
OVERDISCHARGE
PROTECTION
B
TEMP

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Figure 4: Charging circuitry
Charger Detection
Connecting a charger creates voltage on VCHAR input of the UEM. When VCHAR input
voltage level is detected to rise above 2 V (VCHdet+ threshold) by UEM charging starts.
VCHARDET signal is generated to indicate the presence of the charger for the SW. The
charger identification/acceptance is controlled by EM SW.
The charger recognition is initiated when the EM SW receives a ”charger connected”
interrupt. The algorithm basically consists of the following three steps:
1. Check that the charger output (voltage and current) is within safety limits.
2. Identify the charger as a two-wire or three-wire charger.
3. Check that the charger is within the charger window (voltage and current).
If the charger is accepted and identified, the appropriate charging algorithm is initiated.
Figure 5: Charging circuit
R200
V100
battery
________
F100 0
2
1.5A
L1002
X102
1
42R/100MHz
"VCHARIN"
CHARGER(4:0)
V100
C106
1n0