Nokia RH-9 Guide

CCS Technical Documentation
RH-9 Series Transceivers
Issue 1 11/02 ãNokia Corporation
System Module & UI

RH-9
System Module & UI CCS Technical Documentation
Page 2 ãNokia Corporation Issue 1 11/02
Table of Contents
Abbreviations................................................................................................................. 4
........................................................................................................................................ 4
Transceiver RH-9 - Baseband Module........................................................................... 5
Hardware characteristics in brief .................................................................................5
Technical Summary .....................................................................................................6
Technical Specifications ..............................................................................................7
Operating conditions ................................................................................................. 7
DC Characteristics.................................................................................................... 8
Internal Signals and Connections.............................................................................. 9
Current consumption during sleep .......................................................................... 15
External Signals and Connections........................................................................... 16
Functional Description ...............................................................................................18
Modes of Operation................................................................................................. 18
Charging................................................................................................................. 21
Charging Circuitry Electrical Characteristics ......................................................... 23
Power Up and Reset................................................................................................ 24
A/D Channels.......................................................................................................... 26
LCD & Keyboard Backlight ................................................................................... 28
................................................................................................................................. 28
LCD cell.................................................................................................................. 30
SIM Interface........................................................................................................... 31
Internal Audio ......................................................................................................... 33
Accessories.............................................................................................................. 36
Keyboard................................................................................................................. 41
RF Interface Block .................................................................................................. 42
................................................................................................................................. 43
Memory Module...................................................................................................... 44
Flash Programming................................................................................................. 59
EMC Strategy ............................................................................................................62
PWB strategy........................................................................................................... 62
LCD metal frame..................................................................................................... 64
Bottom connector.................................................................................................... 64
Mechanical shielding............................................................................................... 65
Security ......................................................................................................................65
Test Interfaces ............................................................................................................65
Production / After Sales Interface........................................................................... 65
FLASH Interface..................................................................................................... 66
FBUS Interface........................................................................................................ 67
MBUS Interface ...................................................................................................... 67
JTAG & Ostrich Interface....................................................................................... 67
DAI.......................................................................................................................... 67
Test modes (SW dependant) ................................................................................... 67
Test points............................................................................................................... 69
List of unused UEM pins ..........................................................................................69
List of unused UPP pins ............................................................................................70
Transceiver RH-9 - RF Module ................................................................................... 72

CCS Technical Documentation System Module & UI
RH-9
Issue 1 11/02 ãNokia Corporation Page 3
Main Technical specifications ...................................................................................73
Temperature conditions........................................................................................... 73
Nominal and maximum ratings............................................................................... 73
RF frequency plan................................................................................................... 73
DC characteristics ................................................................................................... 73
Functional descriptions ..............................................................................................76
RF block diagram.................................................................................................... 76
Frequency synthesizers ........................................................................................... 76
Receiver................................................................................................................... 78
Transmitter.............................................................................................................. 80
Synthesizer and RF Control .................................................................................... 81
RF characteristics .......................................................................................................82
Channel numbers and frequencies........................................................................... 82
Main RF characteristics........................................................................................... 82
Transmitter characteristics ...................................................................................... 82
Receiver characteristics........................................................................................... 86
List of Figures
Page No
Fig 1 RH-9 baseband block diagram ...................................................................................7
Fig 2 UEM charging circuitry..............................................................................................22
Fig 3 Shared LED driver circuit for LCD and Keyboard backlight ....................................30
Fig 4 Complete overview of LCD module ..........................................................................31
Fig 5 RH-9 LCD module .....................................................................................................32
Fig 6 BSI Detection .............................................................................................................33
Fig 7 UEM & UPP SIM connections...................................................................................34
Fig 8 Speaker Interface........................................................................................................34
Fig 9 Internal microphone electrical interface.....................................................................36
Fig 10 Interface between the MIDI-circuit and the UEM....................................................37
Fig 11 Mechanical layout and interconnections of DCT-4 battery......................................38
Fig 12 Headset interface ......................................................................................................39
Fig 13 DC-OUT Interface....................................................................................................41
Fig 14 Keyboard layout .......................................................................................................42
Fig 15 AC characteristics for SRAM...................................................................................46
Fig 16 Timing diagrams of read cycles ...............................................................................47
Fig 17 Intel-AMD signal deviations description .................................................................51
Fig 18 An XOR comparison of the data indicates more equal bits .....................................53
Fig 19 An XOR comparison indicates more unequal bits ...................................................53
Fig 20 Intel Asynchronous Read .........................................................................................56
Fig 21 Intel Synchronous Four-Word Burst Read...............................................................57
Fig 22 Intel Write.................................................................................................................58
Fig 23 AMD Asynchronous Read .......................................................................................59
Fig 24 AMD Synchronous Burst Read................................................................................59
Fig 25 Production/Test/After sales interface .......................................................................67
Fig 26 RF Frequency plan ...................................................................................................74
Fig 27 Power distribution diagram ......................................................................................76
Fig 28 Block Schematic.......................................................................................................77
Fig 29 Simplified Synthesizer..............................................................................................79

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System Module & UI CCS Technical Documentation
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Fig 30 Simplified Mjoelner BB, either I or Q channel........................................................79
Fig 31 Gain control..............................................................................................................80
Fig 32 DC compensation principle......................................................................................81
Fig 33 Power Loop ..............................................................................................................82

CCS Technical Documentation System Module & UI
RH-9
Issue 1 11/02 ãNokia Corporation Page 5
Abbreviations
DCT4 Digital Core Technology, 4th Generation
DSP Digital Signal Processor
MCU MicroController Unit
PDM Pulse Density Modulation
RESET UEM state where regulators are enabled
RTC UEM internal Real Time Clock
SIM Subscriber Identity Module
SLEEP UEM power saving state controlled by UPP
SLEEPX SLEEP control signal from UPP
TBSF Through the Board Side Firing
UEM Universal Energy Management
UPP Universal Phone Processor
CSTN Colour Super Twisted NematicCharger detection threshold level
DBEF Double Brightness Enhancement Foil
t-BEF thin Brightness Enhancement Foil
ESR Enhanced Specular Reflector

RH-9
System Module & UI CCS Technical Documentation
Page 6 ãNokia Corporation Issue 1 11/02
Transceiver RH-9 - Baseband Module
This section specifies the baseband module for the RH-9 transceiver. The transceiver
board is named ey1a, and all board references used refer to the board version ey1a_03.
The baseband module includes the baseband engine chipset, the UI components and the
acoustical parts for the transceiver.
RH-9 is a hand-portable dualband EGSM900/GSM1800 phone, with GPRS (Class-4) for
the high-end Basic/Expression segment, having the DCT4 generation baseband (UEM/
UPP) and RF(MJOELNER) circuitry. The key drivers for this product are colour display,
short time to market, low field failure, low cost and high performance.
RH-9 is to be used in high volume production, which puts a very high focus on second
and third suppliers, and the verification of the different mix of components.
The baseband module is developed, as part of the DCT4 common Baseband. It is based
very much upon the NPE-4 and NHM-7 products, main difference being colour display,
white leds, external SRAM and SW/Feature upgrade.
The mechanical construction is based on the NHM-5 phone, with an A/B cover update
for an APAC region.
The baseband engine consists basically of two major ASICs. The UEM is the universal
energy management IC, having audio, charge control and voltage regulators included,
and the UPP having DSP, MCU and SRAM memory included. These two ASICs are tested
and delivered bu the Gemini AD project.
RH-9 will use a high resolution (98*67, 4096 colours, 485M042) display from Philips,
Seiko Epson and Samsung.
Hardware characteristics in brief
• High resolution (98*67) , 12 -bit colour display
•4TBSFWhiteLEDs
• Charge pump IC with constant current generator for driving the white LEDs
• 4Mbit external SRAM)
• No shielding can above the memory ICs

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Issue 1 11/02 ãNokia Corporation Page 7
Technical Summary
The baseband module contains 2 main ASICs named the UEM and UPP. The baseband
module furthermore contains an audio amplifier LM4890 for MIDI support, a LED driver
LM2795, a 64Mbit Flash IC and a 4Mbit SRAM. The baseband is based on the DCT4
engine program.
Figure 1: RH-9 baseband block diagram
The UEM supplies both the baseband module as well as the RF module with a series of
voltage regulators. Both the RF and Baseband modules are supplied with regulated volt-
ages of 2.78 V and 1.8V. UEM includes 6 linear LDO (low drop-out) regulators for base-
band and 7 regulators for RF. BB regulator VFLASH2, RF regulators VR1B, VR4 as well as
the current sources IPA1 and IPA2 must be kept disabled by SW, as they are left uncon-
nected on the PWB. The UEM is furthermore supplying the baseband SIM interface with a
programmable voltage of either 1.8 V or 3.0 V. The core of the UPP is supplied with a
programmable voltage of 1.0 V, 1.3 V, 1.5 V or 1.8 V.
UPP operates from a 26MHz clock, coming from the RF ASIC MJOELNER, the 26 MHz
RFBUS
UEM UPP
FLASH
Battery
CBUS/
DBUS
BB
Supplies
RF Supplies
UI
DCT4 Janette connector
RF RX/TX
PA Supply
MBus/FBus
External Audio
Charger connection
Mjoelner
26MHz
SLEEPCLK
32kHz
Baseband
MEMADDA
MVIBRA
HF
EAR
MIC
DLIGHT
SIM
LM4890 SRAM
LM2795

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System Module & UI CCS Technical Documentation
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clock is internally divided by two, to the nominal system clock of 13MHz. DSP and MCU
contain phase locked loop (PLL) clock multipliers, which can multiply the system fre-
quency by factors from 0.25 to 31. Practical speed limitations are depending on memory
configuration and process size (Max. DSP speed for C035 process is ~ 180MHz)
The UEM contains a real-time clock, sliced down from the 32768 Hz crystal oscillator.
The 32768 Hz clock is fed to the UPP as a sleep clock.
The communication between the UEM and the UPP is done via the bi-directional serial
buses CBUS and DBUS. The CBUS is controlled by the MCU and operates at a speed of 1
MHz. The DBUS is controlled by the DSP and operates at a speed of 13 MHz. Both pro-
cessors are located in the UPP.
The interface between the baseband and the RF section is mainly handled by the UEM
ASIC.UEM provides A/D and D/A conversion of the in-phase and quadrature receive and
transmit signal paths and also A/D and D/A conversions of received and transmitted
audio signals to and from the user interface. The UEM supplies the analog signals to RF
section according to the UPP DSP digital control. RF ASIC MJOELNER is controlled
through UPP RFBUS serial interface. There are also separate signals for PDM coded audio.
Digital speech processing is handled by the DSP inside UPP ASIC. UEM is a dual voltage
circuit, the digital parts are running from the baseband supply 1.8V and the analog parts
are running from the analog supply 2.78V also VBAT is directly used by some blocks.
The baseband supports both internal and external microphone inputs and speaker out-
puts. Input and output signal source selection and gain control is done by the UEM
according to control messages from the UPP. Keypad tones, DTMF, and other audio tones
are generated and encoded by the UPP and transmitted to the UEM for decoding. RH-9
has two external serial control interfaces: FBUS and MBUS. These busses can be accessed
only through production test pattern.
RH-9 transceiver module is implemented on 6 layer selective OSP/Gold coated PWB.
Technical Specifications
Operating conditions
Temperature Conditions
Table 1: Temperature conditions for NHM-8
Environmental condition Ambient temperature Remarks
Normal operation -25 °C … +55 °CSpecifications fulfilled
Reduced performance -40 °C ..-25 °C
and +55 °C … +85 °C
No operation and/or storage < -40 °C or > +85 °C No storage or operation. An attempt to
operate may damage the phone perma-
nently

CCS Technical Documentation System Module & UI
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Issue 1 11/02 ãNokia Corporation Page 9
Absolute Maximum Ratings
Table 2: Absolute Maximum Ratings
DC Characteristics
Regulators and Supply Voltage Ranges
Table 3: Battery voltage range
Table 4: BB regulators
Table 5: RF regulators
Signal Rating
Battery Voltage -0.3 ... 5.4V (VBAT LIM2H+))
Charger Input Voltage -0.3 ... 20V
Signal Min Nom Max Note
VBAT 3.1V 3.6V 4.235V 3.1V SW cut off
Signal Min Nom Max Note
VANA 2.70V 2.78V 2.86V Imax = 80mA
VFLASH1 2.70V 2.78V 2.86V Imax = 70mA
ISleep = 1.5mA
VFLASH2 2.70V 2.78V 2.86V Not used
VSIM 1.745V
2.91V
1.8V
3.0V
1.855V
3.09V
Imax = 25mA
ISleep = 0.5mA
VIO 1.72V 1.8V 1.88V Imax = 150mA
ISleep = 0.5mA
VCORE 1.0V
1.235V
1.425V
1.710V
1.053V
1.3V
1.5V
1.8V
1.106V
1.365V
1.575V
1.890V
Imax = 200mA
ISleep = 0.2mA
Used voltages:
(c05) = 1.8V
(c035) = 1.5V
Signal Min Nom Max Note
VR1A 4.6V 4.75V 4.9V Imax = 10mA
VR1B 4.6V 4.75V 4.9V Not used
VR2 2.70V
3.20V
2.78V
3.3V
2.86V
3.40V
Imax = 100mA
VR3 2.70V 2.78V 2.86V Imax = 20mA
VR4 2.70V 2.78V 2.86V Not used

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System Module & UI CCS Technical Documentation
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Table 6: Current sources
Internal Signals and Connections
The tables below describe internal signals. The signal names can be found on the sche-
matic for the ey1a PWB.
Audio
Table 7: Internal microphone
Table 8: Internal speaker (Differential output EARP & EARN)
MIDI
Table 9: Connections between UPP and LM4890
VR5 2.70V 2.78V 2.86V Imax = 50mA
ISleep = 0.1mA
VR6 2.70V 2.78V 2.86V Imax = 50mA
ISleep = 0.1mA
VR7 2.70V 2.78V 2.86V Imax = 45mA
Signal Min Nom Max Note
IPA1 and IPA2 0mA -5mA Not used
Signal Min Nom Max Condition Note
MIC1P (Differential input P) - - 100mVpp G=20dB 1kΩto MIC1B
(RC filtered by 220R/4.7uF)
MIC1N (Differential input N) - - 100mVpp G=20dB 1kΩto GND
MICB1 (Microphone Bias) 2.0 V 2.1 V 2.25 V DC
External loading of MICB1 - - 600uA DC
Signal Min No
mMax Units Note
Output voltage swing 4.0 - - Vpp Differential output
Load Resistance (EARP to EARN)26 32 - W
Load Capacitance (EARP to EARN) - - 50 nF
Signal From To Parameter Min. Max. Unit Notes
Shutdown GENIO[14] Shutdown
(p. 5)
Vih
Vil
1.2
-
-
0.4
V
V
LM4890 detec-
tions treshold
levels

CCS Technical Documentation System Module & UI
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Table 10: Connections between UEM/Battery and LM4890
LCD
Table 11: LCD connector interface
Signal name From To Parameter Min. Max. Unit Notes
XAUDIO[1]
Filtered signal
UEM, HF No
direct con-
nection
between
UEM and
LM4890
LM4890 Output Swing 1.0 - Vpp with 60 dB
signal to total
distortion
ratio
VBAT Battery LM4890
(p. 6)
Supply 3.1 4.2 VLower limit is
SW cut-off
Pin Signal NMP
net Symbol Parameter Min. Ty p. Max. Un it Notes
1/RES XRES Reset 0.3 x VDDI VLogic Low,
active
0.7 x VDDI ns Logic high
2/SCE XCS Chip Select 0.7 x VDDI VLogic High
0.3 x VDDI VLogic Low,
active
3VSS VSS GND Ground 01V
4SDATA SDA Input (writ-
ing to dis-
play)
0.7 x VDDI
0.3 x VDDI
VLogic High
Logic Low
Output
(reading
from display)
IOL = 0.5mA,
IOH = -
0.5mA
0.8 x VDDI
O.2x VDDI
VLogic High
Logic Low
0.3 x VDDI VLogic Low
ts1 100 - - ns Data setup time
tH1 100 - - ns Data hold time
5SCLK SCLK Serial clock
input
0.7 x VDDI VLogic High
0.3 x VDDI VLogic Low

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System Module & UI CCS Technical Documentation
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Baseband – RF interface
Table 12: BB – RF interface description
6VDD1VDDI VDD digital
power supply
1.6 1.8
0
2.02V
7VDD2in VDD Booster
power supply
2.6 2.7
8
2.93V
8VLCD-
out
VOUT Booster out-
put
12 VDecoupled to
GND on main
PWB with 1uF
Signal name From To Parameter Min. Typ. Max. Unit Notes
RFICCNTRL (2:0) MJOELNER control bus
RFBUSEN1X UPP MJOEL-
NER
Logic "1" 1.38 -1.80 VRF Chip select
Logic "0" 0 - 0.4 V
RFBUSDA UPP MJOEL-
NER
Logic "1" 1.38 -1.80 VRF serial control
bus (bi-direc-
tional)
Logic "0" 0 - 0.4 V
RFBUSCLK UPP MJOEL-
NER
Logic "1" 1.38 -1.80 VRF bus clock
Logic "0" 0 - 0.4 V
Clock System clock for phone
RFCLK MJOE
LNER
UPP Frequency -26 -MHz System clock
UPP minimum
recommended
amplitude is
0.3Vpp.
Waveform: Sinus/
triangle
Signal ampli-
tude
0.3 11.37
6
Vpp
Duty cycle
(Mjoelner
spec.)
40 -60 %
RFCONV (9:0) RF / BB analogue signals
RXIINP MJOE
LNER
UEM Voltage swing 1.35 1.4 1.45 VPositive in-phase
Rx signal
DC level 1.3 1.35 1.4 V
I/Q amplitude
mismatch
- - 0.2 dB
I/Q phase mis-
match
-5 - 5 Deg.
Data clock rate - - 13 MHz

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RXIINN MJOE
LNER
UEM Voltage swing 1.35 1.4 1.45 VNegative in-phase
Rx signal
DC level 1.3 1.35 1.4 V
I/Q amplitude
mismatch
- - 0.2 DB
I/Q phase mis-
match
-5 - 5 Deg.
Data clock rate - - 13 MHz
RXQINP MJOE
LNER
UEM Voltage swing 1.35 1.4 1.45 VPositive quadra-
ture phase RX sig-
nal
DC level 1.3 1.35 1.4 V
I/Q amplitude
mismatch
- - 0.2 dB
I/Q phase mis-
match
-5 - 5 Deg.
Data clock rate - - 13 MHz
RXQINN MJOE
LNER
UEM Voltage swing 1.35 1.4 1.45 VNegative quadra-
ture phase RX sig-
nal
DC level 1.3 1.35 1.4 V
I/Q amplitude
mismatch
- - 0.2 dB
I/Q phase mis-
match
-5 - 5 Deg.
Data clock rate - - 13 MHz
TXIOUTP UEM MJOEL-
NER
Diff. Voltage
swing
2.15 2.2 2.25 Vpp Positive TX signal
(program-able
voltage swing)
DC level 1.10 1.20 1.25 V
Source imped-
ance
- - 200 W
Data clock rate - - 13 MHz
TXIOUTN UEM MJOEL-
NER
Differential
voltage swing
2.15 2.2 2.25 Vpp Negative TX sig-
nal (program-able
voltage swing)
DC level 1.17 1.20 1.23 V
Source imped-
ance
- - 200 W
Data clock rate - - 13 MHz

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System Module & UI CCS Technical Documentation
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TXQOUTP UEM MJOEL-
NER
Differential
voltage swing
2.15 2.2 2.25 Vpp Positive TX signal
(program-able
voltage swing)
DC level 1.17 1.20 1.23 V
Source imped-
ance
- - 200 W
Data clock rate - - 13 MHz
TXQOUTN UEM MJOEL-
NER
Differential
voltage swing
2.15 2.2 2.25 Vpp Negative TX sig-
nal (program-able
voltage swing)
DC level 1.17 1.20 1.23 V
Source imped-
ance
- - 200 W
Data clock rate - - 13 MHz
GENIO (28:0) General purpose I/O
GENIO5
(TXP)
UPP MJOEL-
NER
Logic "1" 1.38 -1.80 VTransmitter power
control enable
Logic "0" 0 - 0.4 V
GENIO6
(RESETX_MJO
EL)
UPP MJOEL-
NER
Logic "1" 1.38 -1.80 VReset to RF chip
Logic "0" 0 - 0.4 V
RFAUXCONV(2:0) RF / BB analogue control signals
AUXOUT UEM MJOEL-
NER
Output voltage 0.12 -2.50 VTransmitter power
control
Source imped-
ance
- - 200 W
Resolution -10 -Bits
Regulators RF regulators (currents are max. according to UEM spec.)
VBAT
(VBATREGS)
Bat-
tery
PA / UEM Output voltage 2.9 3.6 4.2 VBattery cut-off is
set by UEM to 2.9
V
VR1A UEM Mjoelner Output voltage 4.6 4.75 4.9 V
Current 0 - 10 mA
VR2 UEM MJOEL-
NER
Output voltage 2.64 2.78 2.86 VSupply to:
TX – chain, Power
Loop Control and
Digital logic
Current 0.1 -100 mA
VR3 UEM MJOEL-
NER
Output voltage 2.64 2.78 2.86 VSupply to:
Ref. Osc.
Current 0.1 -20 mA
VR5 UEM MJOEL-
NER
Output voltage 2.64 2.78 2.86 VSupply to:
PLL, Divider, LO
buffers
Current 0.1 -50 mA

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Issue 1 11/02 ãNokia Corporation Page 15
Table 13: Board Clocks
Connection for regulators active during sleep
Table 14: Connections for regulators active during sleep
VR6 UEM MJOEL-
NER
Output voltage 2.64 2.78 2.86 VSupply to:
LNA's, Pregain
Current 0.1 -50 mA
VR7 UEM VCO Output voltage 2.64 2.78 2.86 VSupply to:
LO buffers, Local
oscillators
Current 0.1 -45 mA
VREFRF01 UEM MJOEL-
NER
Output voltage 1.33
4
1.35 1.36
6
VUsed in MJOEL-
NER (VBEXT) as
1.35V reference
Current --100 µA
Current --100 µA
VIO UEM MJOEL-
NER
Output voltage 1.71 1.8 1.88 VSupply to:
BB buffer
Current 0.1 -150 mA
Signal name From To Min. Typ. Max. Unit Notes
RFCLK MJOELNER UPP -26 -MHz Active when
SLEEPX is high
SLEEPCLK UEM UPP -32.768 -kHz Active when VBAT
is supplied
RFCONVCLK UPP UEM 13 -MHz Active when RF
converters are
active
RFBUSCLK UPP MJOELNER -13 13 MHz Only active when
bus-enable is
active
DBUSCLK UPP (DSP) UEM -13 13 MHz Only active when
bus-enable is
active
CBUSCLK UPP (MCU) UEM - 1 1 MHz Only active when
bus-enable is
active
LCDCAMCLK UPP
(Write)
(Read)
LCD 0.3
3.25
0.650
4MHz Only active when
bus-enable is
active
Regulators UEM UPP FLASH LCD
X387
(SIM
con.)
MJOELNER Externally
circuit

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System Module & UI CCS Technical Documentation
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Current consumption during sleep
Following section state the different regulators current consumption (theoretically
excluding leakage in decoupling capacitors) in sleep mode.
VIO
VIO
[1,8V]
VDD18 VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDA
VDD VDDI VDDDL
SELADDR
VCORE
[1,5V]
VDDSP1
VDDSP2
VDDSP3
VDDMCU
VDDCORE1
VDDCORE2
VDDPDRAM1
VDDPDRAM2
VFLASH1
[2,78V]
VDD28
BSI(pull
up)
PATEMP
(pull up)
VDD
VSIM
[1,8V / 3V]
VSIM
VR2
[2,78V]
VDDDIG
VDDTX
TX section of
MJOELNER
sheet
1,8V PINS Current consumption in sleep (SLEEPX = low)
UEM VDD18 < 5 µA
UPP VDDIO1-4 < 300uA
(depends on I/O config)
VDDA < 5uA
FLASH VDD 20 µA
SRAM VCC <8uA
LCD VDDI <150µA
MJOELNER VDDDL 5 µA
SELADDR 0uA
Totally Specification: Max: 500uA <493uA

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VCORE
VFLASH1
VSIM
VR2
External Signals and Connections
System connector (X102)
Table 15: DC connector
1,5V PINS Current consumption in sleep (SLEEPX = low)
UPP VDDSP1-3, VDDMCU,
VDDCORE1-2
VDDPDRAM1-2
< 9 µA
(Measured value < 120uA)
Totally Specification: Max: 200uA Measured value < 120uA
2,78V PINS Current consumption in sleep (SLEEPX = low)
UEM VDD28 < 5 µA
BSI (pull up) < 30 µA
PATEMP (pull up) < 25 µA
LCD VDD <1100 µA
Totally Specification: Max: 1500uA <1160 µA
1,8V / 3V PINS Current consumption in sleep (SLEEPX = low)
X387 (SIM con) VSIM < 200 µA
Totally Specification: Max: 500uA < 200 µA
2,78V PINS Current consumption in sleep (SLEEPX = low)
MJOELNER VDDDIG 70 µA
VDDTX 0 µA
Totally Specification: Max: 100uA 70uA
Pin Signal Min Nom Max Condition Note
2VCHAR -11.1Vpeak 16.9 Vpeak
7.9 VRMS
1.0 Apeak
Standard
charger
(ACP-7)
Charger positive
input
7.0
VRMS
8.4 VRMS 9.2 VRMS
850 mA
Fast
charger

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Table 16: External microphone
Table 17: External speaker, differential output XEARP(HF) & XEARN (HFCM)
Table 18: Headset detection
DC-OUT (J307,J308 & J309)
Table 19: DC-OUT Connections
SIM (X387)
1CHGND - 0 - Charger ground
Signal Min Nom Max Condition Note
MIC2P (Differential input P) - - 100mVpp G=20dB 1kΩto MIC1B
MIC2N (Differential input N) - - 100mVpp G=20dB 1kΩto GND
MICB2 (Microphone Bias) 2.0 V 2.1 V 2.25 V DC Unloaded
External loading of MICB2 - - 600uA DC
Signal Min No
mMax Units Note
Output voltage swing*
* seen from transducer side
2.0 - - Vpp Differential output, with 60 dB
signal to total distortion ratio
Common voltage level for
HF output (HF & HFCM) VCMHF
0.75 0.8 0.85 V
Load Resistance (HF to HFCM)30 - - W
Load Capacitance (HF to HFCM) - - 10 nF
Signal Min Nom Max Condition Note
HookInt 0V -2.86V (VANA) Headset button call control, connected
to UEM AD-converter
HeadInt 0V -2.86V (VANA) Accessory detection, connected to
UEM AD-converter
Pad Name Parameter Min Typ Max Unit Notes
J307 Power Voltage (open) - - Vbat VOutput power line
Current (short) 56 64 72 mA
J308 CTI(Input) Resistor value 30.9 -750 kΩCover detection
J309 GND - - - - - Ground

CCS Technical Documentation System Module & UI
RH-9
Issue 1 11/02 ãNokia Corporation Page 19
Table 20: SIM Connector
Functional Description
Modes of Operation
RH-9 baseband engine has six different operating modes (in normal mode):
• No supply
•Power_off
•ActingDead
•Active
•Sleep
• Charging
Additionally two modes exist for product verification: 'testmode' and 'local mode'.
No supply
In NO_SUPPLY mode, the phone has no supply voltage. This mode is due to disconnection
of main battery or low battery voltage level.
Pin Name Parameter Min Typ Max Unit Notes
1CLK Frequency -3.25 -MHz SIM clock
Trise/Tfall - - 50 ns
2RST 1.8V SIM
Card
1.62
0
”1”
”0”
VSIM
0.27
VSIM reset
(output)
3V SIM
Card
2.7
0
”1”
”0”
VSIM
0.45
V
3VCC 1.8V SIM
Card
1.6 1.8 2.0 VSupply
voltage
3V SIM
Card
2.8 3.0 3.2 V
4GND GND - 0 - V Ground
5VCC - - - Not con-
nected
6I/O 1.8V Voh
1.8V Vol
1.62
0
”1”
”0”
VSIM
0.27
VSIM data
(output)
3 Voh
3 Vol
2.7
0
”1”
”0”
VSIM
0.45 V
1.8V Vih
1.8V Vil
1.26
0
”1”
”0”
VSIM
0.27
VSIM data
(input)
Trise/Tfall
max 1us
3V Vil
3V Vil
2.1
0
”1”
”0”
VSIM
0.45 V

RH-9
System Module & UI CCS Technical Documentation
Page 20 ãNokia Corporation Issue 1 11/02
Phone is exiting from NO_SUPPLY mode when sufficient battery voltage level is detected.
Battery voltage can rise either by connecting a new battery with VBAT > VMSTR+ or by
connecting charger and charging the battery above VMSTR+.
Power_off
In this state the phone is powered off, but supplied. VRTC regulator is active (enabled)
having supply voltage from main battery. Note, the RTC status in PWR_OFF mode
depends on whether RTC was enabled or not when entering PWR_OFF. From Power_off
mode UEM enters RESET mode (after 20ms delay), if any of following statements is true
(logical OR –function):
• Power_on button detected (PWROFFX)
• Charger connection detected (VCHARDET)
• RTC_ALARM detected
The Phone enters POWER_OFF mode from all the other modes except NO_SUPPLY if
internal watchdog elapses.
Acting Dead
If the phone is off when the charger is connected, the phone is powered on but enters a
state called ”Acting Dead”, in this mode no RF parts are powered. To the user, the phone
acts as if it was switched off. A battery charging alert is given and/or a battery charging
indication on the display is shown to acknowledge the user that the battery is being
charged.
Active
In the active mode the phone is in normal operation, scanning for channels, listening to
a base station, transmitting and processing information. There are several sub-states in
the active mode depending on if the phone is in burst reception, burst transmission, if
DSP is working etc.
In active mode the RF regulators are controlled by SW writing into UEM’s registers
wanted settings: VR1A/B must be kept disabled. VR2 can be enabled or forced into low
quiescent current mode. VR3 is always enabled in active mode. VR4 -VR7 can be enabled,
disabled or forced into low quiescent current mode.
Table 21: Regulator controls
Regulator NOTE
VFLASH1 Enabled; Low Iq mode during sleep
VFLASH2 Not used in NHM-8, must be kept disabled
VANA Enabled; Disabled in sleep mode