NXP Semiconductors UM10301 PCA2125 User manual

UM10301
User Manual for NXP Real Time Clocks PCF85x3, PCA8565
and PCF2123, PCA2125
Rev. 01 — 23 December 2008 User manual
Document information
Info Content
Keywords PCF8563, PCF8573, PCF8583, PCF8593, PCA8565, PCF2123,
PCA2125, PCF2120, RTC, real time clock, timekeeping, crystal,
32.768 kHz, backup.
Abstract This application note aims to assist a user of above mentioned Real Time
Clocks in achieving succesful design-in and application. It contains useful
hints with respect to electrical schematic and PCB layout as well as code
examples for the well established NXP PCF8563 and related Real Time
Clocks. Also the more recent Real Time Clocks PCF2123 and PCA2125
have been taken into account.

NXP Semiconductors UM10301
User Manual PCF85x3, PCA8565 and PCF2123, PCA2125
UM10301_1 © NXP B.V. 2008. All rights reserved.
User manual Rev. 01 — 23 December 2008 2 of 52
Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Revision history
Rev Date Description
01 20081223 Initial version.
This application note / user manual is a complete update of a previous publication titled:
“Application note for the Philips Real Time Clocks PCF8563,73,83,93” which did not have
an official AN/UM number and is superseded by this document.
The contents were revised with lots of additional information added and errors in the
examples corrected. Additionally it includes information with respect to recently introduced
RTCs.

NXP Semiconductors UM10301
User Manual PCF85x3, PCA8565 and PCF2123, PCA2125
UM10301_1 © NXP B.V. 2008. All rights reserved.
User manual Rev. 01 — 23 December 2008 3 of 52
1. Introduction
The real time clocks from NXP (previously Philips Semiconductors) have a long tradition
and are used in numerous application fields. Starting from applications like VCR, they
have been used in a wide variety or products like burglar alarm systems, water
sprinklers, (platform) timers, e-metering, time-and-attendance monitoring, building
access control, Point-of-Sale terminals, industrial applications, cars and trucks, telecom
applications such as mobile phones and in gaming machines. In those applications they
are used for functions like keeping calendar time, tariff switching, watch-dog, time
stamping or waking up a system periodically to initiate certain actions, for example
making measurements.
This application note deals with the PCF85x3 family with focus on the PCF8563, and with
the more recent additions to the NXP RTC portfolio PCF2123 and PCA2125. The
PCF2123 is an extremely low power RTC which allows fine tuning of the clock using an
offset register (electronic tuning). PCA2125 is targeted at automotive applications. Where
appropriate, comparisons to other devices are made.
PCF2120 is a low power 32.768 kHz oscillator with two integrated oscillator capacitances
and a CLKOUT pin (32.768 kHz only), but without time, date and configuration registers.
This application note is valid for the PCF2120 as well, particulary information with respect
to oscillator, crystal, crystal and capacitor selection and layout guidelines.
Chapters 2 and 3 describe the features of these RTCs and include a comparison of the
various types. Starting from chapter 4 more technical details are described that need to
be understood in order to achieve succesful application of these real time clocks.
Chapters 4 and 5 deal with the power-on reset and voltage-low detection. Chapters 6
through 10 deal with the heart of the RTC; the oscillator, the crystal, crystal and capacitor
selection, accuracy and oscillator tuning. Chapter 11 contains a description of how
century change, leap years and daylight savings time is handled or needs to be handled
in an application. This is followed by some examples in chapter 12 about how to initialize
the RTC and how to set alarm and timer. Providing backup power when the rest of the
system is not powered is covered in chapter 13. In order to make a reliable and accurate
application it is important that the PCB layout is designed carefully and guidelines to
achieve this are listed in chapter 14. This is followed by some further design tips in
chapters 15 and 16 about partial circuit switch down and low power consumption.
Sometimes a component behaves different from what one may initially expect. This does
not imply that it behaves wrongly, but in order to properly deal with it, it is important to be
aware of such behavior. Chapter 17 describes how inaccurate timer performance can be
avoided. Chapter 18 explains why the RTC will loose time if I2C and SPI read and write
operations are not finalized within one second of initiating it.
The application note is concluded with a short chapter on trouble shooting.

NXP Semiconductors UM10301
User Manual PCF85x3, PCA8565 and PCF2123, PCA2125
UM10301_1 © NXP B.V. 2008. All rights reserved.
User manual Rev. 01 — 23 December 2008 4 of 52
2. Features
The NXP real-time clock portfolio includes types for low power, types for automotive and
other high temperature applications and applications that need additional RAM. A third
family of highly accurate temperature compensated real time clocks will be dealt with in a
separate application note. Designed for a range of demanding applications, these real-
time clocks/calendars are driven by a low-power 32.768 kHz quartz oscillator, use the
SPI or I2C-bus for serial data transfer, and typically consume less than 1 μW of power.
Key features
•Oscillator requires 32.768 kHz external quartz crystal
•Resolution: seconds, minutes, hours, weekday, day, month, and year in 12- or 24-
hour (military) format. All time and alarm registers are in BCD format. Two types
include a 1/10th and 1/100th second resolution register
•Clock operating voltage: 1.0 V to 5.5 V or wider, see Table 2
•Low backup current: Ranging from 100 nA to 2 μA at VDD = 1 V and Tamb = 25 °C
•Three line SPI with separate I/O or I2C serial interface
•Freely programmable timer and alarm functions, each with interrupt capability
•Freely programmable Watchdog timer
•Programmable clock output for peripheral devices: 32.768 kHz, 1024 Hz, 32 Hz and
1 Hz (not all types)
•One or two integrated oscillator capacitors (connected to the output of amplifier
OSCO in case of only one integrated capacitor)
•Internal power-on reset
•Open-drain interrupt pin
•Wide variety of packages available including naked die
Addresses and data are transferred serially via an SPI bus with a maximum speed of 7.0
Mbps (PCF2123, PCA2125) or via a two-line, bidirectional I2C-bus that operates at a
maximum speed of 400 kbps (Fast-Mode, PCF8563 and PCA8565) or 100 kbps
(Standard-Mode, PCF8583 and PCF8593). The built-in word address register is
incremented automatically after each data byte is written or read.
With the PCF8583, the address pin A0 is used to program the software address, so that
two devices can be connected to the same I2C-bus without additional hardware.
Each RTC has an internal power-on reset and a programmable clock output with open
drain configuration to drive peripheral devices. A low voltage detector (not included on
the PCF8583,93 and PCA2125) warns if the integrity of all clock functions is no longer
guaranteed.
Power consumption is kept to a minimum in all the devices. The PCF2123 and PCF8563,
optimized for battery-powered applications, consume as little as 100 nA at 2V and 250
nA at 1V respectively. With careful selection of the crystal used, the PCF2123 consumes
less than 100 nA on a 1.5 V supply.
The seconds, minutes, hours, days, weekdays, months, years as well as the minute
alarm, hour alarm, day alarm and weekday alarm registers are all coded in Binary Coded
Decimal (BCD) format. This format is popular with RTCs for the reason that time and
date in BCD format can easily be displayed in human-readable style without conversion.

NXP Semiconductors UM10301
User Manual PCF85x3, PCA8565 and PCF2123, PCA2125
UM10301_1 © NXP B.V. 2008. All rights reserved.
User manual Rev. 01 — 23 December 2008 5 of 52
In BCD every digit of the decimal system is represented by a 4-bit group. For example:
15710 = 0001 0101 0111BCD
This is not the same as binary representation. It is clear that BCD is not the most efficient
way of coding since every 4-bit group (nibble) could represent numbers 0 through 15, but
in BCD never represents numbers bigger than 9. But for some applications it is
convenient to use BCD and real time clocks are one such application.
Each 8-bit register contains two digits each represented by one nibble. Each 4-bit nibble
can represent the value of 0 up to 9 in BCD, but for some digits the maximum value to be
represented will be lower. The minute register for example will never have to count
higher than 59. The upper most digit can here be represented by 3 bits, freeing up one
bit that can be used to indicate something else.
Not all NXP real-time clocks have exactly the same register implementation and thus the
datasheet of the particular device should be consulted. As an example the register
organization of the PCF8563 is given below. Note that this is just one example and that
register organization of other types is not necessarily exactly the same.
Table 1. Register overview PCF8563
Bit positions labelled as x are not implemented. When setting a register, also a value must be written for the ‘x’ bit positions.
When these are read back, the read back values may differ from what was previously written.
Bit positions labelled with 0 should always be written with logic 0; if read they could be either logic 0 or logic 1.
Address Register name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
00HEX control / status 1 TEST1 0 STOP 0 TESTC 0 0 0
01HEX control / status 2 0 0 0 TI/TP AF TF AIE TIE
02HEX seconds VL <seconds 00 to 59 coded in BCD>
03HEX minutes x <minutes 00 to 59 coded in BCD>
04HEX hours x x <hours 00 to 23 coded in BCD>
05HEX days x x <days 01 to 31 coded in BCD>
06HEX weekdays x x x x x <weekdays 0 to 6>
07HEX months / century C x x <months 01 to 12 coded in BCD>
08HEX years <years 00 to 99 coded in BCD>
09HEX minute alarm AE <minute alarm 00 to 59 coded in BCD>
0AHEX hour alarm AE x <hour alarm 00 to 23 coded in BCD>
0BHEX day alarm AE x <day alarm 01 to 31 coded in BCD>
0CHEX weekday alarm AE x x x x <weekday alarm 0 to 6>
0DHEX CLKOUT control FE x x x x x FD1 FD0
0EHEX timer control TE x x x x x TD1 TD0
0FHEX timer <timer countdown value>

NXP Semiconductors UM10301
User Manual PCF85x3, PCA8565 and PCF2123, PCA2125
UM10301_1 © NXP B.V. 2008. All rights reserved.
User manual Rev. 01 — 23 December 2008 6 of 52
The PCA8565 and PCA2125 oscillators operate over a wider temperature range (up to
125 ºC) and are suitable for use in the harsh environments found within automobiles.
Power consumption remains low — only 700 nA at 2 V. Serial interface is I2C or SPI.
All the RTCs have ESD protection that exceeds 2000 V HBM per JESD22-A114, 200 V
MM per JESD22-A115. Charge Device Model values vary from 500 V to 2000 V CDM
per JESD22-C101. Refer to the datasheet of the respective device. Latch-up testing,
performed in accordance with JEDEC Standard JESD78, exceeds 100 mA.
3. Comparison
Table 2 on the next page gives a quick overview of the features, specifications and
differences between the RTCs dealt with in this User Manual. The PCF8573 which
belongs to the PCF85x3 family is no longer in production and has thus not been included
in the table. However, this user manual is useful for this type as well.
Further there are some derived types from the main types listed in the table with small
differences in for example delivery form or the number of integrated oscillator capacitors.
Consult NXP for more details.
3.1 Event counter mode
Two real time clocks, PCF8583 and PCF8593, have an extraordinary feature. It is the
event counter mode which can be selected by setting the appropriate bits in the control
register. In this mode the oscillator is disabled and the oscillator input is switched to a
high impedance state. This mode can be used to count pulses applied to the oscillator
input OSCI. There is no crystal in the circuit and OSCO is left open circuit. The event
counter stores up to 6 digits of data. Events are stored in BCD format. The 6 digits use
three 8 bit registers (hundredth of a second, seconds, and minutes). D5 is the most
significant and D0 the least significant digit. Every digit can contain values ranging from 0
to 9 and thus up to 999 999 events can be stored.
It is also possible to set an event counter alarm. When this function is enabled, the alarm
occurs when the event counter registers match the programmed value. In this event the
alarm flag is set. The inverted value of this flag can be transferred to the interrupt pin by
setting the alarm interrupt enable in the alarm control register. In this mode the timer
increments once for every one, one hundred, ten thousand or 1 million events,
depending on the programmed value of the alarm control register. In all other events, the
timer functions are as in clock mode.
Note that immediately following power-on, all internal registers are undefined and must
be defined by software. It is also possible that upon power-on the device is initially in
event-counter mode in which event the oscillator will not operate until the correct settings
are written into the control registers.
The count value will increment on the falling edge. However, after a new count value has
been programmed at least one rising edge must have occurred before events will be
detected on the falling edge.

NXP Semiconductors UM10301
User Manual PCF85x3, PCA8565 and PCF2123, PCA2125
UM10301_1 © NXP B.V. 2008. All rights reserved.
User manual Rev. 01 — 23 December 2008 7 of 52
Table 2. Comparison of six real time clocks
PCx85x3 family PCx212x familyFeatures
PCF8563 PCA8565 PCF8583 PCF8593 PCF2123 PCA2125
Unique features Very low
power
consumption
AEC-Q100
automotive
qualification
High
resolution,
RAM, event
counter
High
resolution,
event
counter
Extremely
low power
consumption,
electronic
tuning
AEC-Q100
automotive
qualification
Type of interface I2C I2C I2C I2C SPI SPI
Interface bus speed 400 kHz 400 kHz 100 kHz 100 kHz 7 MHz 7 MHz
Scratch pad RAM no no 240 bytes no no no
Year / leap year tracking yes / yes yes / yes yes / yes yes / yes yes / yes yes / yes
Year counter 2 digit +
1 century bit
2 digit +
1 century bit
2 bit
(4 years)
2 bit
(4 years)
2 digit
(99 years)
2 digit
(99 years)
100 ms, 10 ms time register no no yes yes no no
Electronic tuning register no no no no yes no
Programmable alarm and timer
functions
yes yes yes yes yes yes
Low voltage detector yes yes no no yes no
Event counter mode no no yes yes no no
Option to select between two I2C
addresses
no no yes no no no
Integrated oscillator capacitor 1 at OSCO 1 at OSCO 1 at OSCO 1 at OSCO 2 1 at OSCO
Supply voltage range 1.8 V – 5.5 V 1.8 V – 5.5 V 2.5 V – 6.0 V 2.5 V – 6.0 V 1.6 V – 5.5 V 1.6 V – 5.5 V
Clock operating voltage 1.0 V – 5.5 V 1.8 V – 5.5 V 1.0 V – 6.0 V 1.0 V – 6.0 V 1.1 V – 5.5 V 1.3 V – 5.5 V
Typical current consumption 250 nA at
VDD = 1 V
650 nA at
VDD = 3 V
2 μA at
VDD = 1 V
1 μA at
VDD = 2 V
100 nA at
VDD = 2 V
550 nA at
VDD = 3 V
Operating temperature range -40 °C to
+85 °C
-40 °C to
+125 °C
-40 °C to
+85 °C
-40 °C to
+85 °C
-40 °C to
+85 °C
-40 °C to
+125 °C
AEC-Q100 qualified no Yes
(TSSOP8)
no no no yes
Packages U
[1], DIP8,
SO8,
TSSOP8,
HVSON10
TSSOP8,
HVSON10
U [1], DIP8,
SO8,
HVQFN20
DIP8, SO8 U [1],
HVQFN16,
TSSOP14
TSSOP14
[1] Naked die
Some derived versions are available such as PCF8563A and PCA8565A which include
two integrated oscillator capacitors and are also available as naked die.

NXP Semiconductors UM10301
User Manual PCF85x3, PCA8565 and PCF2123, PCA2125
UM10301_1 © NXP B.V. 2008. All rights reserved.
User manual Rev. 01 — 23 December 2008 8 of 52
4. Power-on reset (POR)
Traditionally a power-on reset circuit is a circuit that generates a reset pulse once the
supply voltage has reached a certain value upon power-up. The purpose is to ensure a
defined behavior at start-up. This type of power-on reset is not present in these RTCs.
The power-on reset circuit (POR) for these RTCs does not look at the supply voltage, but
instead it is based on an internal reset circuit which is active whenever the oscillator is
stopped, refer to Fig 1. When power is applied to the device it will take some time for the
oscillator to start and during this time the circuit will generate a reset. Also when during
operation the OSCI- or OSCO-pin is pulled to ground, causing oscillation to stop, the
POR will generate a reset pulse. In the reset state the serial bus logic is initialized and all
registers are reset according to the register reset values. Not all registers will be reset.
The only registers that are reset are the ones that control a function i.e. decide on clock
mode, enable an alarm etc. Refer to the datasheet of the respective device for details.
The power on reset duration is thus directly related to the crystal oscillator start-up time.
Due to the long start-up times experienced by these types of circuits on-board testing of
the device would take longer too. In order to speed up this, a mechanism has been built
in to disable the POR (not for PCF8583, PCF8593 and PCF2123). This is called Power-
on reset override. Again, refer to the respective datasheet for details. Once the override
mode has been entered, the device stops immediately being reset and set-up operation
e.g. entry into the external clock test mode, may commence via the serial interface.
001aaf897
chip in reset chip not in reset
t
V
DD
oscillation
internal
reset
Fig 1. Power-on reset
5. Voltage-low detector
PCF8563, PCA8565 and PCF2123 have an on-chip voltage-low detector, see Fig 2 and
Fig 3. When VDD drops below a certain limit defined as Vlow, bit VL in the seconds register
of PCF8563 and PCA8565 is set. Generally the VL-bit is intended to indicate that the
time might be wrong, not that it necessarely is wrong. It will be set if one of the following
four conditions occur:
•The power has just been applied;
•The power has dipped down and then recovered;
•The power has gone away and then come back again;
•When the oscillator stops running.

NXP Semiconductors UM10301
User Manual PCF85x3, PCA8565 and PCF2123, PCA2125
UM10301_1 © NXP B.V. 2008. All rights reserved.
User manual Rev. 01 — 23 December 2008 9 of 52
The implementation in the PCF2123 is slightly different. There a bit OS (Oscillator
Stopped) is present instead of VL. The OS flag is set whenever the oscillator is stopped,
and therefore also when this is due to the supply voltage dropping too low. The flag can
only be cleared by software and only if the oscillator is running again.
VL set
normal power
operation
period of battery
operation
t
VDD
Vlow
mgr887
<OS>
Battery operation
Main supply
t
V
DD
V
OSC(MIN)
(1) Valid for PCF8563 and PCA8565 (2) Valid for PCF2123
Fig 2. Voltage-low detection Fig 3. Oscillator-stop detection
In the case of PCF8563/PCA8565 bit VL set indicates that the integrity of the clock
information is no longer guaranteed. If the oscillator hasn’t stopped, the clock information
will still be ok, but with VDD having dropped below Vlow there is no guarantee that this still
is the case because there is no way to be sure that the oscillator kept running. The VL
flag can only be cleared by software.
Both VL and OS are intended to detect the situation when VDD is decreasing slowly, for
example under battery operation. Should VDD reach the limit where the flag is set before
power is re-asserted, then the flag VL or OS will indicate that time may be (VL) or is (OS)
corrupted. VDD dropping below Vlow or Vosc(min) in itself does not cause any register to be
reset. Once the oscillator stops some registers will be reset.
6. Oscillator
A crystal oscillator as used in a real-time clock, see Fig 4, is built on the principle of
Pierce and uses an inverting amplifier with a crystal in the feedback path and load
capacitors CIN and COUT to provide the necessary additional phase shift. Some phase
shift is contributed as a result of the amplifier’s non-zero output impedance in
combination with COUT. The oscillator operates at the frequency for which the crystal is
anti-resonant (i.e. parallel resonant) with the total capacitive load of the oscillating circuit
as seen from the pins of the crystal. This total capacitance is called the load capacitance.
The load capacitance is defined as the capacitance seen from the pins of the crystal and
is formed by CIN, COUT and CSTRAY indicated in Fig 4. Electrically the crystal’s C0is also a
load capacitance which affects oscillator characteristics. However, it is not part of the
defined ‘load capacitance’. During manufacturing the crystal is tuned to the specified
frequency with a specified load capacitance connected to the crystal. Since C0is part of
the crystal, it is automatically taken into account during the adjustment procedure.

NXP Semiconductors UM10301
User Manual PCF85x3, PCA8565 and PCF2123, PCA2125
UM10301_1 © NXP B.V. 2008. All rights reserved.
User manual Rev. 01 — 23 December 2008 10 of 52
CSTRAY is a result of parasitic capacitances due to PCB traces, IC pins etc. and is directly
in parallel with C0of the crystal. In a practical situation care needs to be taken to keep
these parasitic capacitances as low as possible since it will add to the load capacitance
and this load capacitance must meet the specified value for the crystal that is being used.
If the load capacitance presented to a crystal is smaller than what the crystal was
designed for, the oscillation frequency will be too high and thus if used with an RTC, the
clock will run too fast.
001aah846
C1
C0
Cstray
R1 L1
Cin Cout
C
L
crystal
RTC-IC
OSCOOSCI
Fig 4. Pierce Oscillator equivalent diagram
The inverting amplifier (with feedback resistor, and drive resistor which are not included
in Fig 4) is incorporated within the integrated circuit device. On the other hand, the quartz
crystal is a discrete device external to the integrated circuit. In the PCF85x3, PCA8565
and PCF2123, PCA2125 the output capacitor COUT is integrated on the integrated circuit.
PCF8563A, PCA8565A and PCF2123 also include CIN, see Table 3 for overview.
Table 3. Overview of internal and external oscillator capacitors
PCx85x3 family PCx212x familyFeatures
PCF8563 PCA8565 PCF8583 PCF8593 PCF2123 PCA2125
Integrated oscillator capacitor 1 at OSCO 1 at OSCO 1 at OSCO 1 at OSCO 2 1 at OSCO
Targeted crystal load capacitance 12.5 pF 12. 5 pF 12.5 pF 12. 5 pF 7 pF [1] 12.5 pF
Value of integrated CIN, typ. - - 14 pF -
Value of integrated COUT, typ. 25 pF 25 pF 40 pF 25 pF 14 pF 25 pF
Theoretically required at pin OSCI 25 pF 25 pF 18 pF 25 pF 0 pF 25 pF
[1] Can be used with 9 pF and 12.5 pF as well if external capacitance is added