NXP Semiconductors PN76 Series User manual

AN13134
PN76 family evaluation board quick start guide
Rev. 2.5 — 2 May 2023 Application note
Document Information
Information Content
Keywords PN76, NFC, open controller, PN7640, PN7642, LPC55S16, PN76xx
Abstract This document describes the setup of the development environment and usage of the PN76
family evaluation board.

NXP Semiconductors AN13134
PN76 family evaluation board quick start guide
Revision history
Rev Date Description
v.2.5 20230502 •Deleted old boards and environments not relevant for the official released version.
•Added Section 6 "Checklist"
•Added Section 7 "Troubleshooting".
v.2.4 20230313 •Added Section 2.4 "TDAEV8035"
•Added Section 3.1 "MCUXpresso SDK"
•Updated Section 8 "Radio Equipment Directive (RED)"
•Security status changed into public
v.2.3 20221201 •Enhanced Section 3 "Software".
•Updated Section 8 "Radio Equipment Directive (RED)".
•Added Section 2.1 "PNEV7642A Rev-B"
•Editorial changes and optimize picture size
•Updated the terms "Master/Slave" to "Controller/Target" to align with the recommendation of the
NXP - I2C standards organization.
v.2.2 20220818 •IOREF added
v.2.1 20220809 •Jumper settings added
•NFC Cockpit version compatibility list added
•New PNEV7642A board added
•Deprecated status to Eclipse-related topics added
•Binary generation topic to MCUXpresso added
•Section 8 "Radio Equipment Directive (RED)": added
v.2.0 20220215 •Rearranged chapters for better reading flow
•Section 3.2 "Host software (LPC55S16)" added to explain secure firmware download example
•Section 3 "Software" added to give an overview of existing software packages
v.1.6 20220118 Editorial changes
v.1.5 20211209 •Add NFC Cockpit chapter
•Enhance system overview
v.1.4 20211201 •Add system overview
•Change to new revision D PNEV76FAMA board
•Add important jumper settings
•Add MCUXpresso chapter
v.1.3 20210721 Change from PN5190 RF Performance board to PNEV76FAMA board.
v.1.2 20210422 •PN76 wording changed
•PN76 family software package contents added
v.1.1 20210319 Change to GCC version
v.1.0 20210211 Initial version
Revision history
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PN76 family evaluation board quick start guide
1 Introduction
This document describes the usage of the PN76 family evaluation board, which provides an easy evaluation of
the features and functions of the PN76 family.
It provides the first steps to operate the board and the setup of the development environment.
The default antenna is a 45 mm x 45 mm antenna with some metal layer inside the antenna area. This antenna
is not an optimum antenna as such, but intends to demonstrate the performance and register settings of the
PN76 family under typical design constraints like LCD or some metal (e.g., PCB) inside the antenna area. The
default settings provide an EMVC0 3.0 L1 analog compliance under the assumption that the antenna surface is
a few mm above the antenna PCP.
1.1 PN76 family registers and EEPROM concept
The PN76 family uses internal registers to adapt and optimize the functionality and performance for each of the
supported protocols and data rates dependent on the connected antenna, matching network and receiver path.
It offers an EEPROM, which contains the default settings for all the supported protocols. These settings are
loaded into the registers with the PN76_Sys_LoadRfConfiguration(…) method for each supported protocol and
data rate.
The default EEPROM configuration settings are optimized for the 45 mm x 45 mm antenna of the board RF
performance board and can be changed by the user in case a customized antenna and matching network is
used. The load RF configuration method allows to initialize multiple registers with an efficient single API call
and allows to distinguish between transmit and receive configuration. Update of the registers relevant for a
selected protocol is done by copying the content of EEPROM addresses to registers. Not all protocols require
the initialization of all or the same registers, the PN76_Sys_LoadRfConfiguration(…) considers this.
Some of these settings can or even must be adapted toward a new antenna design (e.g. the dynamic power
control). All those design-specific settings should be stored in the PN76 family EEPROM to allow a proper
functionality.
Some EEPROM configuration data is independent from the used protocols and defines e.g. the startup behavior
of the PN76 family or the functionality of low-power card detection (LPCD). This configuration data might also
be adapted for optimum performance of the chip.
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PN76 family evaluation board quick start guide
1.2 System overview
There are multiple setups to get started with the development board. You can choose any of them. Whatever fits
your purpose, way of working and hardware at hand the best.
1.2.1 PN76 and OpenSDA
Following figure shall explain how an evaluation setup with PNEV7642A and the onboard OpenSDA can look
like and how to connect it.
Figure 1. PN76 and OpenSDA
PNEV7642A connections:
•J5 "Top USB-C" connected with a USB-C cable to the developers PC for communication (for example, VCOM
for NFC Cockpit).
•J9 "Power Jack" connected to a proper power supply to supply the PNEV7642A board.
•J27 "Bottom USB-C" connected for the OpenSDA debug probe.
What Why
PNEV7642A Board The PNEV7642A is the evaluation board of the PN7642 chipset. This whole document describes how
to configure and program it.
Personal Computer
(Host)
A Windows, Linux, or MacOS computer is necessary to run the IDE for developing applications for the
PN7640 chip. Currently only Windows is fully supported and described within this application note.
Table 1. Boards and utility overview
For more information about OpenSDA, see [1].
1.2.2 PN76 and external debugger
Following figure shall indicate how an evaluation setup with PNEV7642A and an external programmer can look
like.
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Figure 2. System overview - PN76 and external debugger
PNEV7642A connections:
•J5 "Top USB-C" connected with a USB-C cable to the developers PC for communication (for example, VCOM
for NFC Cockpit).
•J9 "Power Jack" connected to a proper power supply to supply the PNEV7642A board.
–If your USB-C power is good enough (active USB Hub), you might power it directly via USB "J5" and not
with the power jack.
•J21 "NFC-Debug" to connect a Debug Probe like a SEGGER J-Link, MCU-Link, or LPC-Link2. To flash and
debug the PN76.
What Why
PNEV7642A Board The PNEV7642A is the evaluation board of the PN7642 chipset. This whole document describes how
to configure and program it.
Debug Probe In the picture above, a SEGGER J-Link is shown as external debugger. If you want to flash an
application and debug it, onto the PN7642, you need an external debug probe. This can either be a
LPC-Link2, MCU-Link, or a SEGGER J-Link.
Personal Computer
(Host)
A Windows, Linux, or MacOS computer is necessary to run the IDE for developing applications for the
PN7640 chip. Currently only Windows is fully supported and described within this application note.
Table 2. Boards and utility overview
1.2.3 PN76, LPC55, and external debugger
Following shall indicate how an evaluation setup with PNEV7642A, LPC55S16-EVK, and an external
programmer can look like.
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Figure 3. System overview
PNEV7642A connections:
•J5 "Top USB-C" connected with a USB-C cable to the developers PC for communication (for example, VCOM
for NFC Cockpit).
•J9 "Power Jack" connected to a proper power supply to supply the PNEV7642A board.
•J21 "NFC-Debug" to connect a Debug Probe, SEGGER J-Link or LPC-Link2, to program the PN76.
LPC55S16-EVK
•J4 "Main USB" connected to the PC for communication with the PC and/or as power supply for the
LPC55S16-EVK board.
•J1 "LINK2" connected to the PC and shown as LPC-Link2 debug probe. Used to program the LPC55S16.
What Why
PNEV7642A Board The PNEV7642A is the evaluation board of the PN7642 chipset. This whole document describes how
to configure and program it.
LPC55S16-EVK The LPC55S16-EVK is an optional board. It is only necessary for some of the provided examples like
HIF-based examples. The PNEV7642A is fully operational without this board.
Within the provided software package, you find "host software". This software is dedicated to run on
this LPC55S16 board to compliment another example running on the PNEV76FAMA board.
One of the major reasons to use a LPC55S16 besides showcasing the HIF encryption is to update
the PN7642 firmware. This currently cannot be done without the LPC55 board.
Debug Probe In the picture above, a SEGGER J-Link is shown as external debugger. If you want to flash an
application and debug it, onto the PN7642, you need an external debug probe. This can either be a
LPC-Link2 or a SEGGER J-Link.
Personal Computer
(Host)
A Windows, Linux, or MacOS computer is necessary to run the IDE for developing applications for the
PN7640 chip. Currently only Windows is fully supported and described within this application note.
Table 3. Boards and utility overview
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2 Hardware
The PN76 PSP builds upon the PNEV7642A board and LPC55S16-EVK board.
For the PN76 family, a couple of different board revisions are available. Listed within this document are only the
active revisions.
Board name Chapter
PNEV7642A Rev.B Section 2.1
Table 4. PN76 family boards
2.1 PNEV7642A Rev-B
The PNEV7642A Revision B is easily identified by its large golden ground plane, added to help heat dissipation.
See Section 2.1.4 "Jumper settings" for more details.
The schematics and layout files of the development board can be found at [9].
The development board assembled of two major components:
•The based board which hosts all the periphery and connectors.
–Schematic: [2]
•The module board which hosts the PN7642 chipset and its minimum required components.
–Schematic: [3]
–The module board can be used for rapid prototyping on a custom PCB. It is the same size and form factor
as the module board of the PN5190.
Figure 4. PNEV7642A Rev.B
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2.1.1 Power supply
The development board can be either powered by the USB connector "J5" or from a power jack at connector
"J9". The default settings use the power jack which must be also used if the DC-DC is enabled (default).
Note: The PN76 family in default configuration requires an external power supply, i.e. the USB supply does not
provide enough current (in-rush current spikes). If you want to power it via the J5 USB-C connector, make sure
that your USB port can handle the necessary power. With active USB-Hubs this usually works while using the
ports on a notebook might be insufficient.
The external power supply must be between 5 V and 7.5 V DC (polarity does not matter), since the board
provides a rectifier and LDO to supply the circuit with 6 V (optional, supply voltage ≥7.5 V), 5 V, 3.3 V, and 1.8 V.
The DC power input can cover a DC voltage around 7.5 V with a current of at least 800 mA. The polarity
does not matter, since there is a rectifier onboard. The inrush current of the DC-DC can be up to 1.6 A, when
enabling the RF-Field.
Figure 5. Power section
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2.1.1.1 Power supply selection
The board can be either supplied by USB (not recommended) or a power jack (recommended), which requires
an external power supply with 5 V to 7.5 V. It is not recommended to use the USB as power supply as the in-
rush current is higher as the USB specification allows. Some USB ports (especially active USB-Hubs) might
support this.
To switch the power source, J3 has to be set according to below table.
Pins Description
1-2 LDO 5 V
3-2 USB 5 V (default)
4-2 JACK 5 V - 7.5 V
Table 5. Power selection
Figure 6. Power selection jumper
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2.1.1.2 Power jack
The recommended supply method is via the power jack. Jumper "J8" determines if the power is fed into the 5 V
LDO or directly supplied to the board net.
If the connected power supply does not output stable 5 V, the jumper must be set to 1-2 to make use of the
onboard LDO.
Pins connected Description
1-2 External power supply delivers >5 V and is connected to the onboard LDO.
3-2 External power supply delivers exactly 5 V and is directly connected to board net!
Table 6. Input supply jumper setting
Figure 7. PNEV76FAMA power jack jumper
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Figure 8. PNEV76FAMA power jack schematic
2.1.2 Debug interfaces
The board offers two ways of debugging. They are mutual exclusive. Hardware changes have to be made to
switch from one to the other.
Per default, the JTAG/SWD interface (Section 2.1.2.1) for an external debugger is active.
2.1.2.1 JTAG/SWD interface
The PN76 controller can be programmed via an SWD interface which is exposed as J21 "NFC-Debug" on the
PNEV7642A board. To access the SWD interface, J17 has to be set to 2-3 (default).
The current SDK is built to use a SEGGER J-Link, MCU-Link, or a LPC-Link2. Those external debuggers are
connected to J21 with a ribbon cable. In case you use a SEGGER J-Link make sure to have installed the latest
SDK (>V7.84).
Pins connected Description
1-2 JTAG Interface
2-3 SWD Interface (recommended)
3-4 JTAG Interface
Table 7. J17 Interface jumper setting
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Figure 9. Debug interface PNEV76FAMA
Figure 10. Debug interface schematic
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2.1.2.2 OpenSDA interface
The PNEV7642A hosts a OpenSDA interface on the bottom left corner. OpenSDA is an open-standard serial
and debug adapter. It bridges serial- and debug communications between a USB host and an embedded target
processor. J27 is the USB-C connector for OpenSDA while J29 is the JTAG interface for the microcontroller
running the OpenSDA software.
Per default, OpenSDA is not enabled. Refer to [1] to enable OpenSDA.
Figure 11. OpenSDA connectors
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2.1.3 Antenna
The antenna connection uses the standard tuning circuit. The EMC filter is designed with a cut-off frequency of
fEMC = 14.25 MHz, and the antenna impedance is tuned to Z = 15…16Ω.
Figure 12. Antenna schematic
2.1.4 Jumper settings
The development board is hosting many jumpers and switches. This is to enable the configuration of every
signal and easier debugging. With the downside of looking, and being, more complex.
The following chapters describe the most important jumpers for your daily debugging. For more information
about other jumpers, consolidate the schematics of the base board [2].
2.1.4.1 Host interface selection
On this board, the HIF (host interface) can be chosen by three red switches. Those act either as pullup or
pulldown with 10 kOhm toward the signal IOREF or GND.
The switches are not grouped together but spread over the board (SW7 near power jack, SW5 and SW6 near
OpenSDA).
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Figure 13. PNEV7642A HIF selection switches schematic
Following table defines the chosen host-interface. Where the value "0" represents a Low signal (GND) and "1" a
high signal ("IOREF").
Interface HOSTSEL2 (SW7) HOSTSEL1 (SW5) HOSTSEL0 (SW6)
I2C 0 0 0
SPI (default) 0 0 1
UART 0 1 0
I3C 0 1 1
USB 1 0 0
SPI 1 0 1
USB 1 1 0
USB 1 1 1
Table 8. PNEV7642A HIF selection
Note: There are multiple options for USB. It does not matter which one is taken. Ultimately the signal to the
controller is the same.
2.1.4.2 IOREF
Per default, IOREF is not connected and this represents the "standalone mode" of the board (no Arduino
controller installed - like our LPC55S16 board).
• Standalone: Not populated
• Follower: Populated on 1-2
–This is the case, if a host is installed. E.g., using the LPC55S16 as host.
• Leader: Populated on 2-3
–In case you have an arduino shield on top. Like the TDAEV8035 board.
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2.1.4.3 LED control J63 and J64
J63 and J64 control the lines to the LEDs. If connected, the LEDs are controlled by the Arduino controller
interface. If the PNEV76FAMA is used in standalone mode, disconnect those two jumpers to use the onboard
LEDs.
Figure 14. LED Control J63 J64
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2.2 LPC55S16 host MCU
The default host controller for the PN76 SDK is the NXP LPC55S16. It is an Arm Cortex-M33 architecture MCU
with built-in advanced security features. The examples (Host Software) are preconfigured to be run on the
LPC55S16-EVK which plugs in on the bottom side (Arduino controller) of the PNEV76FAMA board.
Development board link: [4]
Figure 15. LPC55S16-EVK top view
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2.2.1 USB connections
The LPC55S16-EVK is used within the PSP as host microcontroller to showcase host interface functionality of
the PN7600 as well as updating the PN7600 firmware. The LPC55S16-EVK board does not need an external
debugger as it has an LPC-Link2 onboard.
For any example within the PSP which needs communication to the PC the High-speed USB connection on J4
(green square) is used.
The LPC-Link2 can be used by connecting a micro-USB cable to J1 (red square).
Figure 16. USB connectors
An external power supply on J2 is not necessary as the PNEV76FAMA shall be supplied with an external power
supply.
For further information about the LPC55S16-EVK, checkout the website of NXP: https://www.nxp.com/
design/:LPC55S16-EVK.
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2.3 Connecting the LPC with the PN76
Some of the PN7600 PSP examples require the LPC55S16-EVK as host MCU. One of them is the firmware
download example which is used to update the PN7600 firmware. For this, we have to stack the PNEV76FAMA
board on top of the LPC55S16-EVK board.
Align Pin.1 of J36 of the PNEV76FAMA board with Pin.1 of J9 of the LPC55 board. The last 4 pins, 17 - 20, of
J12 of the LPC board are not connected. As well as pin 1-4 of J10 stay unconnected.
The green marked area in Figure 17 is to be connected with the PN76 board while the red area stays
unconnected.
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Figure 17. LPC55 arduino alignment
Following pictures shall help to understand how to align the PNEV76FAMA board on top of the LPC55S16-EVK.
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