NXP Semiconductors PN76 Series User manual

AN13134
PN76 family evaluation board quick start guide
Rev. 2.5 — 2 May 2023 Application note
Document Information
Information Content
Keywords PN76, NFC, open controller, PN7640, PN7642, LPC55S16, PN76xx
Abstract This document describes the setup of the development environment and usage of the PN76
family evaluation board.

NXP Semiconductors AN13134
PN76 family evaluation board quick start guide
Revision history
Rev Date Description
v.2.5 20230502 •Deleted old boards and environments not relevant for the official released version.
•Added Section 6 "Checklist"
•Added Section 7 "Troubleshooting".
v.2.4 20230313 •Added Section 2.4 "TDAEV8035"
•Added Section 3.1 "MCUXpresso SDK"
•Updated Section 8 "Radio Equipment Directive (RED)"
•Security status changed into public
v.2.3 20221201 •Enhanced Section 3 "Software".
•Updated Section 8 "Radio Equipment Directive (RED)".
•Added Section 2.1 "PNEV7642A Rev-B"
•Editorial changes and optimize picture size
•Updated the terms "Master/Slave" to "Controller/Target" to align with the recommendation of the
NXP - I2C standards organization.
v.2.2 20220818 •IOREF added
v.2.1 20220809 •Jumper settings added
•NFC Cockpit version compatibility list added
•New PNEV7642A board added
•Deprecated status to Eclipse-related topics added
•Binary generation topic to MCUXpresso added
•Section 8 "Radio Equipment Directive (RED)": added
v.2.0 20220215 •Rearranged chapters for better reading flow
•Section 3.2 "Host software (LPC55S16)" added to explain secure firmware download example
•Section 3 "Software" added to give an overview of existing software packages
v.1.6 20220118 Editorial changes
v.1.5 20211209 •Add NFC Cockpit chapter
•Enhance system overview
v.1.4 20211201 •Add system overview
•Change to new revision D PNEV76FAMA board
•Add important jumper settings
•Add MCUXpresso chapter
v.1.3 20210721 Change from PN5190 RF Performance board to PNEV76FAMA board.
v.1.2 20210422 •PN76 wording changed
•PN76 family software package contents added
v.1.1 20210319 Change to GCC version
v.1.0 20210211 Initial version
Revision history
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NXP Semiconductors AN13134
PN76 family evaluation board quick start guide
1 Introduction
This document describes the usage of the PN76 family evaluation board, which provides an easy evaluation of
the features and functions of the PN76 family.
It provides the first steps to operate the board and the setup of the development environment.
The default antenna is a 45 mm x 45 mm antenna with some metal layer inside the antenna area. This antenna
is not an optimum antenna as such, but intends to demonstrate the performance and register settings of the
PN76 family under typical design constraints like LCD or some metal (e.g., PCB) inside the antenna area. The
default settings provide an EMVC0 3.0 L1 analog compliance under the assumption that the antenna surface is
a few mm above the antenna PCP.
1.1 PN76 family registers and EEPROM concept
The PN76 family uses internal registers to adapt and optimize the functionality and performance for each of the
supported protocols and data rates dependent on the connected antenna, matching network and receiver path.
It offers an EEPROM, which contains the default settings for all the supported protocols. These settings are
loaded into the registers with the PN76_Sys_LoadRfConfiguration(…) method for each supported protocol and
data rate.
The default EEPROM configuration settings are optimized for the 45 mm x 45 mm antenna of the board RF
performance board and can be changed by the user in case a customized antenna and matching network is
used. The load RF configuration method allows to initialize multiple registers with an efficient single API call
and allows to distinguish between transmit and receive configuration. Update of the registers relevant for a
selected protocol is done by copying the content of EEPROM addresses to registers. Not all protocols require
the initialization of all or the same registers, the PN76_Sys_LoadRfConfiguration(…) considers this.
Some of these settings can or even must be adapted toward a new antenna design (e.g. the dynamic power
control). All those design-specific settings should be stored in the PN76 family EEPROM to allow a proper
functionality.
Some EEPROM configuration data is independent from the used protocols and defines e.g. the startup behavior
of the PN76 family or the functionality of low-power card detection (LPCD). This configuration data might also
be adapted for optimum performance of the chip.
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NXP Semiconductors AN13134
PN76 family evaluation board quick start guide
1.2 System overview
There are multiple setups to get started with the development board. You can choose any of them. Whatever fits
your purpose, way of working and hardware at hand the best.
1.2.1 PN76 and OpenSDA
Following figure shall explain how an evaluation setup with PNEV7642A and the onboard OpenSDA can look
like and how to connect it.
Figure 1. PN76 and OpenSDA
PNEV7642A connections:
•J5 "Top USB-C" connected with a USB-C cable to the developers PC for communication (for example, VCOM
for NFC Cockpit).
•J9 "Power Jack" connected to a proper power supply to supply the PNEV7642A board.
•J27 "Bottom USB-C" connected for the OpenSDA debug probe.
What Why
PNEV7642A Board The PNEV7642A is the evaluation board of the PN7642 chipset. This whole document describes how
to configure and program it.
Personal Computer
(Host)
A Windows, Linux, or MacOS computer is necessary to run the IDE for developing applications for the
PN7640 chip. Currently only Windows is fully supported and described within this application note.
Table 1. Boards and utility overview
For more information about OpenSDA, see [1].
1.2.2 PN76 and external debugger
Following figure shall indicate how an evaluation setup with PNEV7642A and an external programmer can look
like.
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NXP Semiconductors AN13134
PN76 family evaluation board quick start guide
Figure 2. System overview - PN76 and external debugger
PNEV7642A connections:
•J5 "Top USB-C" connected with a USB-C cable to the developers PC for communication (for example, VCOM
for NFC Cockpit).
•J9 "Power Jack" connected to a proper power supply to supply the PNEV7642A board.
–If your USB-C power is good enough (active USB Hub), you might power it directly via USB "J5" and not
with the power jack.
•J21 "NFC-Debug" to connect a Debug Probe like a SEGGER J-Link, MCU-Link, or LPC-Link2. To flash and
debug the PN76.
What Why
PNEV7642A Board The PNEV7642A is the evaluation board of the PN7642 chipset. This whole document describes how
to configure and program it.
Debug Probe In the picture above, a SEGGER J-Link is shown as external debugger. If you want to flash an
application and debug it, onto the PN7642, you need an external debug probe. This can either be a
LPC-Link2, MCU-Link, or a SEGGER J-Link.
Personal Computer
(Host)
A Windows, Linux, or MacOS computer is necessary to run the IDE for developing applications for the
PN7640 chip. Currently only Windows is fully supported and described within this application note.
Table 2. Boards and utility overview
1.2.3 PN76, LPC55, and external debugger
Following shall indicate how an evaluation setup with PNEV7642A, LPC55S16-EVK, and an external
programmer can look like.
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NXP Semiconductors AN13134
PN76 family evaluation board quick start guide
Figure 3. System overview
PNEV7642A connections:
•J5 "Top USB-C" connected with a USB-C cable to the developers PC for communication (for example, VCOM
for NFC Cockpit).
•J9 "Power Jack" connected to a proper power supply to supply the PNEV7642A board.
•J21 "NFC-Debug" to connect a Debug Probe, SEGGER J-Link or LPC-Link2, to program the PN76.
LPC55S16-EVK
•J4 "Main USB" connected to the PC for communication with the PC and/or as power supply for the
LPC55S16-EVK board.
•J1 "LINK2" connected to the PC and shown as LPC-Link2 debug probe. Used to program the LPC55S16.
What Why
PNEV7642A Board The PNEV7642A is the evaluation board of the PN7642 chipset. This whole document describes how
to configure and program it.
LPC55S16-EVK The LPC55S16-EVK is an optional board. It is only necessary for some of the provided examples like
HIF-based examples. The PNEV7642A is fully operational without this board.
Within the provided software package, you find "host software". This software is dedicated to run on
this LPC55S16 board to compliment another example running on the PNEV76FAMA board.
One of the major reasons to use a LPC55S16 besides showcasing the HIF encryption is to update
the PN7642 firmware. This currently cannot be done without the LPC55 board.
Debug Probe In the picture above, a SEGGER J-Link is shown as external debugger. If you want to flash an
application and debug it, onto the PN7642, you need an external debug probe. This can either be a
LPC-Link2 or a SEGGER J-Link.
Personal Computer
(Host)
A Windows, Linux, or MacOS computer is necessary to run the IDE for developing applications for the
PN7640 chip. Currently only Windows is fully supported and described within this application note.
Table 3. Boards and utility overview
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NXP Semiconductors AN13134
PN76 family evaluation board quick start guide
2 Hardware
The PN76 PSP builds upon the PNEV7642A board and LPC55S16-EVK board.
For the PN76 family, a couple of different board revisions are available. Listed within this document are only the
active revisions.
Board name Chapter
PNEV7642A Rev.B Section 2.1
Table 4. PN76 family boards
2.1 PNEV7642A Rev-B
The PNEV7642A Revision B is easily identified by its large golden ground plane, added to help heat dissipation.
See Section 2.1.4 "Jumper settings" for more details.
The schematics and layout files of the development board can be found at [9].
The development board assembled of two major components:
•The based board which hosts all the periphery and connectors.
–Schematic: [2]
•The module board which hosts the PN7642 chipset and its minimum required components.
–Schematic: [3]
–The module board can be used for rapid prototyping on a custom PCB. It is the same size and form factor
as the module board of the PN5190.
Figure 4. PNEV7642A Rev.B
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NXP Semiconductors AN13134
PN76 family evaluation board quick start guide
2.1.1 Power supply
The development board can be either powered by the USB connector "J5" or from a power jack at connector
"J9". The default settings use the power jack which must be also used if the DC-DC is enabled (default).
Note: The PN76 family in default configuration requires an external power supply, i.e. the USB supply does not
provide enough current (in-rush current spikes). If you want to power it via the J5 USB-C connector, make sure
that your USB port can handle the necessary power. With active USB-Hubs this usually works while using the
ports on a notebook might be insufficient.
The external power supply must be between 5 V and 7.5 V DC (polarity does not matter), since the board
provides a rectifier and LDO to supply the circuit with 6 V (optional, supply voltage ≥7.5 V), 5 V, 3.3 V, and 1.8 V.
The DC power input can cover a DC voltage around 7.5 V with a current of at least 800 mA. The polarity
does not matter, since there is a rectifier onboard. The inrush current of the DC-DC can be up to 1.6 A, when
enabling the RF-Field.
Figure 5. Power section
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PN76 family evaluation board quick start guide
2.1.1.1 Power supply selection
The board can be either supplied by USB (not recommended) or a power jack (recommended), which requires
an external power supply with 5 V to 7.5 V. It is not recommended to use the USB as power supply as the in-
rush current is higher as the USB specification allows. Some USB ports (especially active USB-Hubs) might
support this.
To switch the power source, J3 has to be set according to below table.
Pins Description
1-2 LDO 5 V
3-2 USB 5 V (default)
4-2 JACK 5 V - 7.5 V
Table 5. Power selection
Figure 6. Power selection jumper
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NXP Semiconductors AN13134
PN76 family evaluation board quick start guide
2.1.1.2 Power jack
The recommended supply method is via the power jack. Jumper "J8" determines if the power is fed into the 5 V
LDO or directly supplied to the board net.
If the connected power supply does not output stable 5 V, the jumper must be set to 1-2 to make use of the
onboard LDO.
Pins connected Description
1-2 External power supply delivers >5 V and is connected to the onboard LDO.
3-2 External power supply delivers exactly 5 V and is directly connected to board net!
Table 6. Input supply jumper setting
Figure 7. PNEV76FAMA power jack jumper
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