ORTEC 408 User manual

PRECISION
INSTRUMENTATION
FOR
RESEARCH
Oak
Ridge
Technical
Enterprises
Corporation
OAK
RIDGE,
TENNESSEE
INSTRUCTION
MANUAL
MODEL
408
BIASED
AMPLIFIER

INSTRUCTION
MANUAL
MODEL
408
BIASED
AMPLIFIER
Serial
No.
Purchaser
Date
issued
OAK
RIDGE
TECHNICAL
ENTERPRISES
CORPORATION
p.
O.
BOX
C
OAK
RIDGE,
TENNESSEE
Telephone
(615)
483-8451
TWX
810-572-1078
I
Oak
Ridge
Technical
Enterprises
Corporation
1966
Printed
in
U.S.A.

CONTENTS
1.
DESCRIPTION
1.1
General
Description
1.2
Description
of
Basic
Function
2.
SPECIFICATIONS
2.1
General
Specifications
2.2
Biased
Amplifier
Specifications
3.
INSTALLATION
3.1
General
Installation
Considerations
3.2
Connection
to
Power—Nuclear
Standard
Bin,
ORTEC
Model
401/402
3.3
Connection
to
Linear
Amplifier
4.
OPERATING
INSTRUCTIONS
4.1
Front
Panel
Controls
4.2
Initial
Testing
and
Observation
of
Pulse
Waveforms
4.3
Connector
Data
4.4
Typical
Operating
Considerations
5.
CIRCUIT
DESCRIPTION,
Biased
Amplifier
(Etched
Board
408-0148)
6.
MAINTENANCE
6.1
Testing
Performance
of
Biased
Amplifier
6.2
Biased
Amplifier
Threshold
and
Pedestal
Adjustment
6.3
Suggestions
for
Troubleshooting
6.4
Tabulated
Test
Point
Voltages
on
Etched
Board
7.
PARTS
LIST
8.
BLOCK
DIAGRAMS
AND
SCHEMATICS
408-0148-Bl
Model
408
Block
Diagram
408-0148-Sl
Model
408
Biased
Amplifier
Schematic
408-0201-S
Model
408
Chassis
Wiring
Schematic

STANDARD
WARRANTY
FOR
ORTEC
ELECTRONIC
INSTRUMENTS
DAMAGE
IN
TRANSIT
Shipments
should
be
examined
immediately
upon
receipt
for
evidence
of
external
or
con
cealed
damage.
The
carrier
making-delivery
should
be
notified
immediately
of
any
such
damage,
since
the
carrier
is
normally
liable
for
damage
in
shipment.
Packing
materials,
waybills,
and
other
such
documentation
should
be
preserved
in
order
to
establish
claims.
After
such
notification
to
the
carrier,
notify
ORTEC
of
the
circumstances
so
that
we
may
assist
in
damage
claims
and
in
providing
replacement
equipment
when
necessary.
WARRANTY
ORTEC
warrants
its
electronic
products
to
be
free
from
defects
in
workmanship
and
materials,
other
than
vacuum
tubes
and
semiconductors,
for
a
period
of
twelve
months
from
date
of
ship
ment,
provided
that
the
equipment
has
been
used
in
a
proper
manner
and
not
subjected
to
abuse.
Repairs
or
replacement,
at
ORTEC
option,
will
be
made
without
charge
at
the
ORTEC
factory.
Shipping
expense
will
be
to
the
account
of
the
customer
except
in
cases
of
defects
discovered
upon
initial
operation.
Warranties
of
vacuum
tubes
and
semiconductors,
as
made
by
their
manufacturers,
will
be
extended
to
our
customers
only
to
the
extent
of
the
manufacturers'
liability
to
ORTEC.
Specially
selected
vacuum
tubes
or
semiconductors
cannot
be
warranted.
ORTEC
reserves
the
right
to
modify
the
design
of
its
products
without
incurring
responsibility
for
modification
of
previously
manufactured
units.
Since
installation
conditions
are
beyond
our
control,
ORTEC
does
not
assume
any
risks
or
liabilities
associated
with
the
methods
of
instal
lation,
or
installation
results.
QUALITY
CONTROL
Before
being
approved
for
shipment,
each
ORTEC
instrument
must
pass
a
stringent
set
of
quality
control
tests
designed
to
expose
any
flaws
in
materials
or
workmanship.
Permanent
records
of
these
tests
are
maintained
for
use
in
warranty
repair
and
as
a
source
of
statistical
information
for
design
improvements.
REPAIR
SERVICE
ORTEC
instruments
not
in
warranty
may
be
returned
to
the
factory
for
repairs
or
checkout
at
modest
expense
to
the
customer.
Standard
procedure
requires
that
returned
instruments
pass
the
same
quality
control
tests
as
those
used
for
new
production
instruments.
Please
contact
the
factory
for
instructions
before
shipping
equipment.

ORTEC
ij
MODEL
408
i/
BIASED
AMPLIFIER
i
BIAS
LEVEL
20
GAIN
INPUT
OUTPUT
^
■P
MODEL
408
BIASED
AMPLIFIER

1-1
MODEL
408
BIASED
AMPLIFIER
1.
DESCRIPTION
1.1
General
Description
The
Model
408
is
a
modular
Biased
Amplifier
designed
to
be
used
with
pulse
amplifiers,
such
as
the
ORTEC
Model
410,
that
provide
a
unipolar
or
bipolar
output
pulse,
with
either
RC
or
delay
line
shaping.
When
used
with
the
Model
410
Multimode
Amplifier,
the
combination
offers
high
counting
rate
capability,
good
overload
recovery,
and
the
ultimate
in
resolution
performance
necessary
for
use
with
semiconductor,
gaseous,
or
scintillation
detectors.
All
input
and
output
signal
levels
and
impedances
are
compatible
with
other
modules
in
the
ORTEC
400
Series.
1.2
Description
of
Basic
Function
The
Model
408
Biased
Amplifier
provides
a
variable
step
gain
of
1
to
20
in
a
1-2-5
sequence
to
expand
a
region
of
interest
in
a
spectrum
and
thereby
more
fully
utilize
the
capabilities
of
multichannel
analyzers
in
high
resolution
spectroscopy.
The
bias
level,
above
which
amplification
occurs,
is
controllable
by
a
10-turn
control
which
spans
the
linear
input
signal
range.
The
input
may
be
from
any
source
of
linear
signals
having
no
more
than
a
10-volt
span,
e.g.,
the
Model
410
Multimode
Amplifier,
the
Model
415
Sum-Delay
Amplifier,
or
the
linear
output
of
the
Model
409
Linear
Gate
and
Slow
Coincidence.
Circuit
features
of
the
Model
408
Biased
Amplifier
include
a
baseline
restoration
network
that
sets
the
input
back
to
zero
with
a
minimum
of
dead
time
and
offset,
and
an
amplitude
limiter
for
prompt
recovery
from
overload
pulses.
The
input
will
accept
either
unipolar
or
bipolar
signals,
but
the
output
is
only
positive
unipolar,
the
negative
portion
being
clipped
in
passing
through
the
biased
section
of
the
amplifier.

2-1
2.
SPECIFICATIONS
2.1
General
Specifications
The
Model
408
is
housed
in
a
Nuclear
Standard
Module;
it
is
one
standard
module
wide
and
weighs
2.4
pounds.
The
module
contains
no
internal
power
supply
and
therefore
must
obtain
the
necessary
operating
power
from
a
Nu
clear
Standard
Bin
and
Power
Supply
such
as
the
ORTEC
Model
401/402.
All
signals
in
and
out
of
the
module
ore
on
front
panel
BNC
connectors,
and
the
input
power
is
via
the
standard
connector
on
the
rear
panel.
2.2
Biased
Amplifier
Specifications
Input
Unipolar
or
bipolar
(with
the
positive
portion
leading);
0.2V
to
lOV
rated
range,
12
volts
maximum
Input
Impedance
125
ohms
Gain
1
to
20
in
steps
of
1-2-5-10-20
Bias
Range
,
0
to
90%
of
rated
span
Output
0
to
lOV
rated
span,
12V
maximum;
posi
tive
pulse
only
Output
Impedance
Approximately
1
ohm,
short-circuit
pro
tected
Linearity.
Integral
nonlinearity
less
than
0.2%
from
0.2V
to
8V,
0.3%
to
lOV,
taken
with
1-
fxsec
RC
shaped
pulse
and
minimum
bias
level
Temperature
Stability
Gain
shift
less
than
0.01%
per
°C
per
gain
factor
Operating
Temperature
Range
0
to
50°C
Power
Required
+24V,
59
mA
+
12V,
3
mA
-12V,
13
mA
-24V,
53
mA
Mechanical
One
module
wide
and
designed
to
meet
the
recommended
interchangeability
standards
set
out
in
AEG
Report
TID-
20893;
1.35
inches
wide,
8.75
inches
high,
and
9.75
inches
long.

3-1
INSTALLATION
3.1
General
Installation
Considerations
The
Model
408
Biased
Amplifier,
used
in
conjunction
with
o
Model
401/402
Bin
and
Power
Supply,
is
intended
for
rack
mounting
and
therefore
it
is
nec
essary
to
ensure
that
vacuum
tube
equipment
operating
in
the
same
rack
with
the
Model
408
have
sufficient
cooling
air
circulating
to
prevent
any
lo
calized
heating
of
the
all-transistor
circuitry
used
throughout
the
Model
408.
The
temperature
of
equipment
mounted
in
racks
can
easily
exceed
the
recom
mended
maximum
unless
precautions
are
taken;
the
Model
408
should
not
be
subjected
to
temperatures
in
excess
of
120°F
(50°C).
3.2
Connection
to
Power—Nuclear
Standard
Bin,
ORTEC
Model
402/402
The
Model
408
contains
no
internal
power
supply
and
therefore
must
obtain
power
from
a
Nuclear
Standard
Bin
and
Power
Supply
such
as
the
ORTEC
Model
401/402.
It
is
recommended
that
the
bin
power
supply
be
turned
off
when
inserting
or
removing
modules.
The
ORTEC
400
Series
is
designed
so
that
it
is
not
possible
to
overload
the
bin
power
supply
with
a
full
complement
of
modules
in
the
Bin;
however,
this
may
not
be
true
when
the
Bin
contains
mod
ules
other
than
those
of
ORTEC
design.
In
such
instances,
the
power
supply
voltages
should
be
checked
after
the
insertion
of
modules.
The
ORTEC
Model
401/402
has
test
points
on
the
power
supply
control
panel
to
monitor
the
dc
voltages.
When
using
the
Model
408
outside
the
Model
401/402
Bin
and
Power
Supply,
be
sure
that
the
jumper
cable
used
properly
accounts
for
the
power
supply
grounding
circuits
provided
in
the
recommended
AEC
standards
of
TID-
20893.
Both
clean
and
dirty
ground
connections
ore
provided
to
ensure
proper
reference
voltage
feedback
into
the
power
supply,
and
these
must
be
pre
served
in
remote
cable
installations.
Care
must
also
be
exercised
to
avoid
ground
loops
when
the
module
is
not
physically
in
the
bin.
3.3
Connection
to
Linear
Amplifier
The
input
to
the
Model
408
is
on
the
front
panel
INPUT
BNC
connector,
and
is
compatible
with
all
linear
unipolar
or
bipolar
signals
from
the
outputs
of
linear
amplifiers,
linear
gates,
delay
amplifiers,
etc.
The
input
impedance
is
125
ohms,
ac
coupled,
and
the
input
operating
range
is
from
threshold,
typ
ically
100
millivolts,
to
10
volts.
It
is
important
that
no
external
terminators
be
added
to
the
INPUT
BNC
on
the
Biased
Amplifier
unless
it
is
determined
before
hand
that
the
driving
source
can
drive
the
combination
load
of
the
Model
408
125-ohm
input
impedance
and
the
external
terminator
in
parallel.

3-2
3.4
Linear
Output
Signal
Connections
and
Terminating
Impedance
Considerations
The
source
impedance
of
the
0-10
volt
standard
linear
outputs
of
most
400
Series
modules
is
approximately
1
ohm.
Interconnection
of
linear
signals
is,
thus,
non-critical
since
the
input
impedance
of
circuits
to
be
driven
is
not
important
in
determining
the
actual
signal
span,
e.g.,
0-10
volts,
de
livered
to
the
following
circuit.
Paralleling
several
loads
on
a
single
out
put
is
therefore
permissible
while
preserving
the
0-10
volt
signal
span.
Short
lengths
of
interconnecting
coaxial
cable
(up
to
approximately
4
feet)
need
not
be
terminated.
However,
if
a
cable
longer
than
approximately
4
feet
is
necessary
on
a
linear
output,
it
should
be
terminated
in
a
resistive
load
equal
to
the
cable
impedance.
Since
the
output
impedance
is
not
purely
resistive,
and
is
slightlydifferent
for
each
individual
module,
when
a
certain
given
length
of
coaxial
cable
is
connected
and
is
not
terminated
in
the
characteristic
impedance
of
the
cable,
oscillations
will
generally
be
observed.
These
oscillations
can
be
suppressed
for
any
length
of
cable
by
properly
terminating
the
cable
either
in
series
at
the
sending
end
or
in
shunt
at
the
receiving
end
of
the
line.
To
properly
terminate
the
cable
at
the
receiving
end,
it
maybe
necessary
to
consider
the
input
impedance
of
the
driven
circuit,
choosing
an
additional
parallel
resistor
to
make
the
combination
produce
the
desired
termination
resistance.
Series
terminating
the
cable
at
the
sending
end
may
be
preferable
in
some
cases
where
re
ceiving
and
terminating
is
notdesirable
or
possible.
When
series
terminat
ing
at
the
sending
end,
full
signal
span,
i.e.,
amplitude,
isobtainedat
the
receiving
end
only
when
it
is
essentially
unloaded
or
loaded
with
an
impedance
many
times
that
of
the
cable.
This
may
be
accomplished
by
inserting
a
series
resistor
equal
to
the
characteristic
impedance
of
the
ca
ble
internally
in
the
module
between
the
actual
amplifier
output
on
the
etched
board
and
the
output
connector.
It
must
be
remembered
that
this
impedance
is
in
series
with
the
input
impedance
of
the
load
being
driven,
and
in
the
case
where
the
driven
load
is
900
ohms,
a
decrease
in
the
signal
span
of
approximately
10%
will
occur
for
a
93-ohm
transmission
line.
A
more
serious
loss
occurs
when
the
driven
load
is
93
ohms
and
the
transmis
sion
system
is
93
ohms.
In
this
case,
a50%
loss
will
occur.
BNC
connec
tors
with
internal
terminators
are
available
from
a
number
of
connector
manufacturers
in
nominal
values
of
50,
100,
and
lOOOohms.
ORTEC
stocks
in
limited
quantity
both
the
50
and
100
ohm
BNC
terminators.
The
BNC
terminators
are
quite
convenient
to
use
in
conjunction
with
a
BNC
tee.

4-1
4.
OPERATING
INSTRUCTIONS
4.1
Front
Panel
Controls
GAIN
The
voltage
gain
of
the
Model
408
Biased
Amplifier
is
controlled
by
the
GAIN
s\A/itch.
The
gain
is
applied
to
the
input
signal
that
exceeds
the
dc
BIAS
LEVEL.
The
gain
covers
the
range
of
1
to
20
in
a
1-2-5-10-20
sequence.
BIAS
LEVEL
A
continuously
adjustable
dc
bias
voltage
ranging
from
0
to
9V
is
provided
to
bias
out
a
fixed
level
of
all
input
pulses
to
the
Biased
Amplifier.
The
resultant
signal,
i.e.,
the
portion
of
the
input
signal
above
the
bias
level,
is
then
ampli
fied
by
an
amount
determined
by
the
setting
of
the
Biased
Amplifier
GAIN
switch.
4.2
Initial
Testing
and
Observation
of
Pulse
Waveforms
Refer
to
Section
6.1
of
this
Manual
for
information
concerning
data
obtained
during
initial
testing.
4.3
Connector
Data
PGl
-
INPUT
BNC
Connector
Input
impedance
is
125
ohms,
ac
coupled.
The
input
voltage
rated
range
is
0
to
lOV,
with
a
maximum
of
12V.
The
input
may
be
shunted
from
its
125-ohm
input
impedance
if
necessary
to
terminate
transmission
lines
that
have
im
pedances
other
than
1
25
ohms.
In
shunting
the
input
impedance,
care
must
be
taken
to
ensure
that
the
driving
source
can
drive
the
resultant
low
input
im
pedance.
PG2-OUTPUT
BNC
Connector
Output
driving
impedance
is
approximately
1
ohm
and
is
short-circuit
pro
tected.
OUTPUT
Test
Point
An
oscilloscope
test
point
is
available
for
monitoring
the
signal
on
the
OUTPUT
BNC
connector.
This
test
point
has
a
470-ohm
series
resistor
connecting
it
to
to
the
OUTPUT
BNC
connector.
Power
Connector
The
Nuclear
Standard
Module
power
connector
is
an
AMP
202515-5*
4.4
Typical
Operating
Considerations
The
output
signal
of
the
Model
408
must
be
closely
monitored
when
using
RC
shaped
input
pulses.
This
is
also
true
if
a
large
amount
of
integration
is
used
with
delay
line
shaped
pulses.
The
reasoning
behind
this
can
be
pointed
out
by
examining
the
resultant
pulse
shape
illustrated
in
Figure
4-1.
With
the
BIAS
LEVEL
set
at
level
A,
it
can
be
noted
that
the
output
pulse
width
of
the
Model
408
at
the
baseline
will
be
from
A
to
A';
i.e.,
the
baseline
width
is
equal
to
the
time
the
input
signal
E|,,
is
above
the
BIAS
LEVEL.
For
the
BIAS
LEVEL
A
in
Figure
4-1,
the
output
pulse
of
the
Model
408
will
be
satisfactorily
shaped
to
be
used
as
an
input
to
most
multichannel
analyzers.
However,
the
res.ultant

4-2
Model
408
output
pulse
for
BIAS
LEVEL
B
will
hove
a
pulse
width
at
the
base
line
equal
to
the
time
from
B
to
B'
in
Figure
4-1.
With
the
Biased
Amplifier
gain
applied
to
the
portion
of
the
input
signal
Ein
that
is
above
the
BIAS
LEVEL
B,
it
is
seen
that
the
resultant
Model
408
output
pulse
is
much
too
narrow
to
be
satisfactorily
used
as
an
input
signal
to
the
majority
of
available
multichannel
analyzers.
For
double
RC
shaped
signals
with
0.5-microsecond
integration
and
differentiation
time
constants,
the
time
between
B
and
B'
can
easily
be
as
short
as
0.5
microsecond.
For
the
above
reasons,
an
ORTEC
Model
41
1
Pulse
Stretcher
is
recommended
for
applications
involving
the
Model
408
Biased
Amplifier.
The
Pulse
Stretcher
will
stretch
the
peak
amplitude
of
the
output
signal
from'the
Model
408
for
a
minimum
of
1.5
microseconds,
thereby
im
proving
the
system
linearity
by
reducing
the
bandwidth
requirements
of
the
multichannel
analyzer
analog-to-digital
converter
(ADC).
!•
BIAS
LEVEL
B
r
BIAS
LEVEL
A
1
iJSEC
Figure
4-1.
Bipolar
RC
Shaped
Input
Pulse

5-1
CIRCUIT
DESCRIPTION,
BIASED
AMPLIFIER
(Etched
Board
408-0148)
5.1
From
Drawings
408-0148-Bl
and
408-0148-51,
the
following
functions
con
be
recognized
in
the
Biased
Amplifier:
a
baseline
recovery
network
consisting
of
Ql,
D2,
03,04,
and
Q3
(also
called
the
dc
restoration
network).
Q2
constitutes
a
dc
emitter
follower
that
establishes
the
bias
level
at
the
input
to
the
Biased
Amplifier.
Q4
is
an
emitter
follower
that
drives
the
linear
gate
section
of
the
Biased
Amplifier
(Q5
and
Q7),
and
also
drives
the
Schmitt
trigger
circuit
(Ql
1
and
012)
via
the
0.70
limiter
(012,
013,
and
014).
The
linear
gate
is
opened
by
the
application
of
a
positive
signal
through
C4
to
the
base
of
08,
which
causes
the
current
switch
to
transfer
its
emitter
current
flowing
through
R8
from
06
to
08.
When
08
conducts
the
emitter
current
of
the
current
switch,
the
base
drive
current
to
05
is
available
via
R6,
and
concurrently,
base
cur
rent
for
07
becomes
negligible,
since
the
collector
of
08
requires
approxi
mately
4
milliamperes.
With
the
current
switch
conducting
current
in
08,
it
can
be
seen
that
05,
the
series
element,
is
in
heavy
saturation,
with
the
base
drive
current
supplied
from
R6
flowing
into
the
base
through
the
emitter
and
back
to
the
emitter
of
04,
a
low
impedance
voltage
source.
Also,
07,
the
shunt
ele
ment
in
the
linear
gate,
is
now
back
biased
and
presents
a
high
shunt
impe
dance
to
signals
flowing
through
the
saturated
series
element,
05.
The
output
of
the
linear
gate
is
taken
from
the
collectors
of
05
and
07.
The
output
of
the
linear
gate
is
followed
by
a
cascode
emitter
follower,
09
and
010.
The
output
of
emitter-follower
09
and
010
is
fed
through
a
gain
control
switch
and
then
through
two
amplifying
loops
similar
to
the
loops
shown
in
Figure
5-1.
-24
V
R
in
-y\AA-
in
-»■
e
i
in
_rx.
\
Qa
+
24
V
If^
■vW^
6ND
Figure
5-1.
Basic
Feedback
Amplifier
Loop

!•
5-2
The
bias
level
is
set
by
the
1
K
helipot;
then,
the
dc
bios
level
is
fed
through
the
baseline
recovery
network
in
such
a
way
that
the
bias
level
is
approximately
equal
to
the
dc
potential
on
the
base
of
Q4.
Diode
D6
prevents
the
emitter
potential
of
emitter-follower
Q4
from
going
more
negative
than
approxi
mately
0.6
volts
due
to
the
BIAS
LEVEL
control.
With
the
application
of
a
positive
input
signal,
on
pin
2
of
the
Biased
Amplifier
board,
that
is
equal
to
or
exceeds
the
bias
level
dc
potential,
emitter-follower
Q4
will
be
forward
biased
and
its
emitter
potential
will
be
equal
to
the
po
tential
of
the
input
pulse
minus
the
dc
bias
level
voltage.
The
positive
pulse
generated
at
the
emitter
of
Q4
is
fed
in
parallel
to
two
circuits
—to
the
emitter
of
Q5
and
to
the
cathode
of
D12.
The
combination
of
series
transistor
Q5
and
shunt
transistor
Q7
forms
a
linear
gate.
The
switching
of
the
linear
gate
from
its
normally
closed
position,
i.e.,
Q5
back-biased
and
Q7
saturated,
to
the
open
position
is
controlled
by
the
current
switch,
Q6
and
Q8.
The
current
switch
is
activated
by
the
application
of
a
positive
pulse
at
the
base
of
Q8.
The
positive
pulse
necessary
to
trigger
the
current
switch
is
generated
at
the
collector
of
Q1
2.
Transistors
Q1
1
and
Q1
2
constitute
a
Schmitt
trigger
discrim
inator
circuit
that
is
triggered
when
the
pulse
amplitude
of
the
input
signal
on
pin
2
exceeds
the
bios
level
by
100
millivolts.
The
appearance
of
a
100-milli-
volt
positive
pulse
at
the
emitter
of
Q4
is
coupled
to
the
trigger
circuit,
Q11
and
Q12,
through
the
diode
network,
D12
and
D13.
The
positive
pulse
applied
to
the
cathode
of
D12
back-biases
D12,
thereby
shunting
the
V2-mil
liampere
current
normally
flowing
through
D12,
through
diode
D13,
and
then
through
the
parallel
combination
of
D14
and
R45.
Since
R46
constitutes
a
constant
current
generator
of
approximately
1
milliampere,
and
R45
constitutes
a
con
stant
current
sink
of
approximately
0.5
milliampere,
turning
off
diode
D12
will
force
the
additional
V2
milliampere
to
flow
in
the
combination
D13, D14,
and
R45.
When
the
additional
V2
milliampere
is
transferred
from
012,
transistor
Q1
1
will
be
forward
biased,
causing
the
Schmitt
trigger
circuit,
Q1
1
and
Q12,
to
trigger
and
remain
triggered
for
the
duration
of
the
input
pulse
that
exceeds
the
bias
level
by
ICQ
millivolts.
Since
Q12
is
normally
conducting,
the
trigger
action
will
transfer
the
current
from
Q1
2
to
Q1
1,
thereby
generating
a
positive
pulse
at
the
collector
of
Q12;
this
pulse
is
then
coupled
to
the
base
of
Q8
and
activates
the
current
switch,
Q6
and
Q8.
Transistor
Q6
in
the
current
switch
is
normally
conducting,
but
the
application
of
a
positive
signal
to
the
base
of
Q8
causes
Q6
to
cease
conduction
and
Q8
to
conduct
heavily.
When
Q6
ceases
conduction,
the
current
flow
flowing
through
R6
is
switched
from
the
collector
of
Q6
into
the
base
of
Q5,
thereby
causing
Q5
to
go
into
heavy
saturation.
In
a
similar
manner,
the
heavy
conduction
of
transistor
Q8
removes
the
available
base
current
for
Q7,
causing
Q7
to
be
turned
off.
With
Q5
in
heavy
saturation
and
Q7
turned
off,
the
action
of
the
linear
gate
is
evident;
i.e.,
the
series
path
from
the
emitter
of
emitter-follower
Q4
to
the
base
of
transistor
Q9
is
seen
to
have
a
very
low
impedance.
Since
transistors
Q9
and
QIO
form
a
cascode
emitter
follower,
the
signal
input
at

!•
5-3
pin
2
that
exceeds
the
bios
level
will
now
appear
at
the
collector
of
QIO,
the
output
of
the
cascode
emitter
follower.
The
emitter
of
Q7
is
connected
to
the
wiper
of
the
trimpot,
R29,
labeled
PED
ESTAL.
The
pedestal
is
normally
adjusted
for
a
value
of—100
millivolts,
i.e.,
to
a
negative
voltage
level
that
is
equal
in
magnitude
and
opposite
in
polarity
to
the
discriminator
threshold
of
the
Schmitt
trigger
circuit,
Q1
1
and
Q12.
It
is
important
to
note
that
the
input
signal
to
the
biased
amplifier
must
exceed
the
bias
level
(Vg
)
by
approximately
100
millivolts
before
the
linear
gate,
Q5
and
Q7,
will
be
switched
open.
Since
the
linear
gate
is
either
open
(Q5
saturated)
or
closed
(Q5
back-biased),
there
is
negligible
nonlinearity
for
signals
just
ex
ceeding
the
bias
level.
The
adjustment
of
the
pedestal
trimpot
is
considered
further
in
Section
6.2.
5.2
The
Biased
Amplifier
GAIN
is
of
the
resistor
shunt
type
on
the
output
of
the
cascode
emitter
follower,
Q9
and
QIO.
As
the
amplifier
following
the
cascode
emitter
follower
is
of
the
current
type,
a
shunt
resistor
to
ground
from
pin
12
wil
l
reduce
the
amount
of
current
flowing
into
the
base
of
transistor
Q13
for
a
given
output
voltage
from
the
cascode
emitter
follower.
The
amplifier
loop,
Q13-Q14,
and
the
output
cable
driver
loop
Q15-Q16
Q1
7,
and
Q18,
are
of
the
basic
type
shown
in
Figure
5-1,
with
the
exception
of
the
diode
limiter
in
the
loop
Q13-Q14.
Notice
that
the
diode
limiter
in
the
loop
is
necessary
because
the
output
of
Q9
and
QIO,
the
cascode
emitter
follower,
can
be
equal
to
10
volts
under
the
conditions
of
a
10-volt
input
signal
and
a
bias
level
of
000.
The
output
driver
loop
consists
of
Q15
through
QIB.
Q15
and
Q17
constitute
the
typical
npn-pnp
loop,
and
they
drive quite
well
in
the
negative
direction
but
not
in
the
positive
direction.
The
addition
of
emitter-follower
Q16
in
this
loop
allows
the
overall
loop
to
handle
both
positive
and
negative
signals
quite
easily
to
plus
or
minus
12
volts
into
100
ohms,
but
an
accidental
short
circuit
of
the
output
will
cause
Q16
to
be
destroyed.
For
this
reason,
Q18
was
added
to
protect
Q16.
The
function
of
Q18
is
to
provide
a
method
of
limiting
the
average
current
through
Q16
to
a
value
less
than
that
required
to
destroy
Q16.
Q18
can
supply
large
peak
currents
from
the
collector-capacitor
C24,
and
these
currents
can
flow
directly
through
Q18
and
Q16
and
thence
into
the
load.
In
the
event
of
a
short
circuit
on
the
output,
the
absolute
magnitude
of
current
that
can
be
supplied
through
Q18
and
Q16
from
C24
is
less
than
that
required
to
destroy
either
Q18
or
Q16.
Capacitor
C24
charges
back
to
the
8+
voltage
through
R47
in
the
absence
of
any
input
pulse.

!•
6-1
6.
MAINTENANCE
6.1
Testing
Performance
of
Biased
Amplifier
6.1.1
Introduction
The
following
paragraphs
are
intended
as
an
aid
in
the
installation
and
checkout
of
the
Model
408.
These
instructions
present
information
on
front
panel
controls,
waveforms
at
test
points
and
output
connectors.
6.1.2
Test
Equipment
The
fol
lowing,
or
equivalent,
test
equipment
is
needed:
(1)
ORTEC
Model
419
Pulse
Generator
(2)
Tektronix
Model
580
Series
Oscilloscope
(3)
100-ohm
BNC
terminators
(4)
Vacuum
tube
voltmeter
(5)
ORTEC
Model
410
Multimode
Amplifier
(6)
Schematic
and
block
diagrams
for
Model
408
Biased
Amplifier
6.1.3
Preliminary
Procedures
(1)
Visually
check
module
for
possible
damage
due
to
shipment.
(2)
Connect
ac
power
to
Nuclear
Standard
Bin,
ORTEC
Model
401
/402.
(3)
Plug
module
into
Bin
and
check
for
proper
mechanical
alignment.
(4)
Switch
ac
power
on
and
check
the
dc
power
supply
voltages
at
at
the
test
points
on
the
Model
401
Power
Supply
control
panel.
6.1.4
Biased
Amplifier
The
threshold
discriminator
and
pedestal
have
been
set
at
the
factory
and
steps
1
through
9
can
be
omitted
in
original
instal
lations.
(1)
Feed
the
output
of
the
Model
419
Pulse
Generator
into
the
input
of
the
Model
410
Amplifier.
(2)
Set
the
amplifier
controls
as
follows:
1
1
.1
fjLsec
INPUT
ATTENUATOR
COARSE
GAI
N
INTEGRATION
NEG
1.5
D.L.
INPUT
POLARITY
FINE
GAIN
1
st
DIFFERENTIATION
{outer
concentric
control)
D.L.
2nd
DIFFERENTIATION
(inner
concentric
control)
(3)
Adjust
the
Model
419
Pulse
Generator
for
a
300-mV
pulse
from
the
unipolar
output
of
the
Model
410.
(4)
Set
the
Model
408
BIAS
LEVEL
at
000
divisions
and
the
GAIN
to
1.
(5)
Feed
the
300-mV
unipolar
output
of
the
Model
410
into
the
INPUT
of
the
Model
408.
(6)
Adjust
the
trimpot
at
the
front
of
the
Biased
Amplifier
board
fo
the
position
where
an
output
is
observed
at
the
Model
408
output.
(7)
Decrease
the
input
to
the
Model
408,
with
the
Model
419
Pulse
Generator,
to
1
00
mV
while
adjusting
the
front
trimpot
to
keep
an
output
pulse
present
at
the
Model
408
output.
The
amplitude
of
the
output
pulse
at
the
Model
408
output
is
unimportant
for
this
ad-

6-2
justment,
but
the
Model
408
output
should
be
"half-firing"
with
a
100-mV
input
signal.
(8)
Adjust
the
trimpot
in
the
middle
of
the
board
so
that
the
output
pulse
of
the
Model
408
is
approximately
zero
with
a
100-mV
input
signal.
(9)
Switch
the
Biased
Amplifier
GAIN
to
20.
Adjust
the
m/dd/e
trimpot
,
^
"
to
zero
volts
output
with
the
100-mV
input
signal.
0
(10)
Set
the
Biased
Amplifier
GAIN
control
to
1.
(11)
Adjust
the
Model
419
Pulse
Generator
for
a
400-mV
output
from/t^^^-vi^A
/
tUo
AA^.-i^i
/tn£3
ibr
jv
•7
the
Model
408
(12)
Check
that
the
Biased
Amplifier
GAIN
switch
positions
ore
ap
proximately
correct,
i.e.,
1,
2,
5,
10,
20.
(13)
Set
the
GAIN
switch
at
1
and
the
output
from
the
Model
408
to
8.0
volts.
(14)
Load
the
Model
408
OUTPUT
with
a
100-ohm
terminator.
The
out-
(3K
put
amplitude
should
change
less
than
200
mV
and
there
should
be
no
change
in
the
pulse
shape.
(15)
Readjust
the
Model
419
Pulse
Generator
for
on
8.0-volt
output
from
the
Model
408.
(16)
Increase
the
Model
408
BIAS
LEVEL
control
setting
from
000
di
visions
until
the
output
pulse
from
the
Model
408
ceases.
The
set-
ting
of
the
BIAS
LEVEL
control
should
be
820
±
40
divisions.
(17)
Increase
the
BIAS
LEVEL
50
divisions
above
the
setting
found
in
the
previous
step.
Set
the
GAIN
switch
to
20.
(18)
The
feedthrough
as
observed
on
the
Model
408
output
should
be
^
less
than
50
mV.
(19)
Decrease
the
BIAS
LEVEL
control
setting
to
000
divisions,
leaving
the
GAIN
switch
on
20.
(20)
The
Model
408
output
should
saturate
with
an
output
voltage
pulse
greater
than
1 1
volts.
6.2
Biased
Amplifier
Threshold
and
Pedestal
Adjustment
The
Biased
Amplifier
is
normally
closed
to
all
input
signals
less
than
100
mV
above
the
BIAS
LEVEL
control
setting.
The
linear
gate
in
the
Biased
Amplifier
circuitry
is
activated
by
a
trigger
circuit
which
has
an
adjustable
threshold.
The
threshold
is
set
by
the
trimpot,
R22,
on
the
408-148
etched
board.
This
threshold
is
normally
set
at
the
factory
at
100
mV,
but
may
be
varied
from
approximately
50
mV
to
200
mV
if
desired.
The
purpose
of
the
Biased
Amplifier
pedestal
adjustment
is
to
offset
the
100-
mV
threshold;
i.e.,
with
an
input
signal
of
100
mV
above
the
BIAS
LEVEL,
the
Biased
Amplifier
will
pass
this
signal,
but
the
pedestal
is
adjusted
so
that
the
output
from
the
Biased
Amplifier
is
zero
volts.
The
procedure
for
setting
the
threshold
and
pedestal
trimpots
is
found
in
Section
6.1.
Refer
also
to
Section
5
and
see
Drawings
408-0148-Bl
and
408-
0148-Sl.

6.3
Suggestions
for
Troubleshooting
In
situations
where
the
Model
408
is
suspected
of
malfunction,
it
is
essential
to
verify
such
malfunction
in
terms
of
simple
pulse
generator
impulses
at
the
input
and
output.
In
consideration
of
this,
the
Model
408
must
be
disconnected
from
its
position
in
any
system,
and
routine
diagnostic
analysis
performed
with
a
test
pulse
generator
and
oscilloscope.
It
is
imperative
that
testing
not
be
performed
with
a
source
and
detector
until
the
amplifier-biased
amplifier
system
performs
satisfactorily
with
the
test
pulse
generator.
The
testing
instructions
listed
in
Section
6.1
of
this
manual
and
the
circuit
de-
descriptions
in
Section
5
should
provide
assistance
in
locating
the
region
of
trouble
and
repairing
the
malfunction.
The
guide
plate
and
shield
can
be
com
pletely
removed
from
the
module
to
enable
oscilloscope
and
voltmeter
obser
vations
with
a
minimal
chance
of
accidentally
short-circuiting
portions
of
the
etched
board.
The
Model
408
utilizes
the
modular
etched
board
concept
in
that
all
the
active
circuitry
in
the
module
can
be
removed
from
a
plug-in
socket.
This
has
the
advantage
of
servicing
the
unit
by
substitution
of
the
affected
etched
board
either
from
spares
kept
on
hand
or
obtained
from
the
factory.
The
Model
408,
or
the
etched
circuit
board,
may
be
returned
to
ORTEC
for
re
pair
service
at
nominal
cost.
The
standardized
procedure
requires
that
each
repaired
instrument
receive
the
same
extensive
quality
control
tests
that
a
new
instrument
receives.
6.4
Tabulated
Test
Point
Voltages
on
Etched
Board
The
following
voltages
are
intended
to
indicate
the
typical
dc
voltages
mea
sured
on
the
etched
circuit
board.
In
some
cases
the
circuit
will
perform
satis
factorily
even
though,
due
to
component
variations,
there
may
be
some
volt
ages
that
measure
outside
the
given
limits.
Therefore,
the
voltages
given
here
should
not
be
taken
as
absolute
values,
but
rather
are
intended
to
serve
as
an
aid
in
troubleshooting.
Table
6.1
Typical
DC
Voltages
Note:
1.
All
voltages
were
measured
from
ground
with
vtvm
having
input
impedances
of
10
megohms
or
greater,
2.
Voltages
are
dc
values
with
no
input
pulses.
3.
Set
BIAS
LEVEL
to
000
divisions
and
GAIN
switch
to
XI.
Location
1
2
3
4
5
6
7
8
Transistor
No.
and
Elementi.#^#^
011b
Q12e
Voltage
+0.05
-0.5
-12.4
+101
-10.0
-0.08
Limits
-0.06
-0.6
-12.7
+0.95
+0.97
-11.0
+0.08
-0.5
'.
yp^ttr
Location
9
10
11
12
13
Transistor
No.
and
Element^^j^j
q,^,.
3,7^
Q,g|j
Q,g,.
Voltage
IBM
6.8
14.^
1.2
14.2
Ml
#
Limits
Mm
^'lO

BIN/MODULE
CONNECTOR
PIN
ASSIGNMENTS
FOR
AEC
STANDARD
NUCLEAR
INSTRUMENT
MODULES
PER
TID-20893
Pin
Function
Pin
Function
1
+3
volts
23
Reserved
2
—3
volts
24
Reserved
3
Spare
Bus
25
Reserved
4
Reserved
Bus
26
O-30
volts
ac
5
Coaxial
27
0—30
volts
ac
6
Coaxial
*28
+24
volts
7
Coaxial
*29
—24
volts
8
200
volts
dc
30
Spare
Bus
9
200
volts
dc
31
Carry
No.
2
10
+6
volts
*32
Spare
1 1
—6
volts
*33
115
volts
ac
12
Reserved
Bus
*34
Clean
Ground
13
Carry
No.
1
35
Reset
14
Spare
*36
Gate
15
Reserved
37
Spare
*16
+
1
2
volts
38
Coaxial
*17
—
1
2
volts
39
Coaxial
18
Spare
Bus
40
Coaxial
19
Reserved
Bus
*41
1
15
volts
ac
20
Spare
*42
Dirty
Ground
21
Spare
G
Ground
Guide
Pin
22
Reserved
*These
pins
are
installed
and
wired
in
parallel
in
the
ORTEC
Model
401
Modular
System
Bin

!•
The
transistor
types
installed
in
your
instrument
may
differ
from
those
shown
in
the
schematic
diagram.
In
such
cases,
necessary
replace
ments
can
be
made
with
either
the
type
shown
in
the
diagram
or
the
type
actually
used
in
the
instrument.

!•
The
transistor
types
installed
in
your
instrument
may
differ
from
those
shown
in
the
schematic
diagram.
In
such
cases,
necessary
replace
ments
can
be
made
with
either
the
type
shown
in
the
diagram
or
the
type
actually
used
in
the
instrument.
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