Panasonic CQVD7005U - IN-DASH DVD MONITOR User manual

General
Power Supply DC 12V (11V - 16V),
Test Voltage 14.4V
Negative Ground
Current Consumption Less than 10A (During Disc Playback)
Maximum Power Output 50W×4ch
Compatible Speaker
Impedance 4Ω
Video Input Signal Composite Video Signal,
1.0 Vp-p (75Ω)
Audio Input Sensitivity 2 Vrms
Video Output Signal Composite Video Signal,
1.0 Vp-p (75Ω)
Pre-Amp Output Voltage 2 Vrms
Pre-Amp Output Impedance Less than 600Ω
FM Stereo Radio
Frequency Range 87.9 - 107.9MHz
Usable Sensitivity 12.2dBf
Stereo Separation 40dB (1kHz)
S/N Ratio 63dB
AM Radio
Frequency Range 530 - 1710kHz
Usable Sensitivity 25 dB/µV
Image Rejection Ratio 50 dB
Audio Section
© 2007 Matsushita Electric Industrial Co., Ltd. All
rights reserved. Unauthorized copying and
distribution is a violation of law.
CQ-VD7005U
In-Dash 7” Widescreen Color LCD
Monitor/DVD Receiver
Output voltage/Impedance 2 Vrms/600 Ω
Frequency Characteristics
(When “LARGE” is Selected)
Front L/R, Center,
Rear (Surround) L/R 20Hz - 20kHz (±1 dB)
Delay Time
Dolby Digital
Center 0-5ms
Rear (Surround) L/R 0 -15 ms
Dolby Pro Logic
Rear (Surround) L/R 15-30 ms
Distortion
Front L/R 0.01% (1kHz,0dB,PCM Input)
Dynamic Range 96dB (During CD Playback)
S/N Ratio 100dB (During CD Playback)
Monitor
Storage temperature range -20°C -80°C (-4°F -176°F)
Liquid Crystal Panel 7” wide
Screen Dimensions (W×H×D) 6-1/16” × 3-7/16” × 6-15/16”
(154 × 87 × 177mm)
Number of Pixels 336,960 pixels
(234 vertical × 480 horizontal × 3)
Valid Pixel Ratio Over 99.99%
Display Method Transparent color filter format
Drive Method TFT (Thin Film Transistor)
active matrix format
AUTOMOTIVE AFTERMARKET
Specifications*
ORDER No.ACED070106C7
C7

Light Source Internal light
(Built-in small fluorescent lamp)
Dimensions** (W × H × D) 7” × 1-15/16” × 6-1/2”
(178 × 50 × 165 mm)
Weight** 5lbs. 5oz. (2.4 kg)
1 ABOUT LEAD FREE SOLDER (PbF) 3
2 FEATUERS 3
3 REPLACING THE FUSE 3
4 MAINTENANCE 3
5 LASER PRODUCTS 3
6 DIMENSIONS 3
7 WIRING CONNECTION 4
8 DISASSEMBLY INSTRUCTIONS 5
9 TERMINALS DESCRIPTION 7
10 PACKAGE AND IC BLOCK DIARAM 12
* Specifications and the design are subject to possible modification
without notice due to improvements.
** Dimensions and Weight shown are approximate.
• • •
• Above specifications comply with EIA standards.
11 PACKING PARTS LIST 18
12 REPLACEMENT PARTS LIST 19
13 EXPLODED VIEW (Unit) 33
14 DVD PLAYER PARTS LIST 34
15 EXPLODED VIEW [DVD Deck] 38
16 WIRING DIAGRAM 39
17 SCHEMATIC DIAGRAM 47
18 BLOCK DIAGRAM 55
19 SCHEMATIC DIAGRAM for Printing with Letter Size 61
CONTENTS
Page Page
2
CQ-VD7005U

1 ABOUT LEAD FREE
SOLDER (PbF)
Distinction of PbF PCB:
PCBs (manufactured) using lead free solder will have a PbF
stamp on the PCB.
Caution :
• • •
• Pb free solder has a higher melting point than standard
solder; Typically the melting point is 50 - 70°F (30 -
40°C) higher. Please use a soldering iron with
temperature control and adjust it to 700 ± 20°F (370 ±
10°C). In case of using high temperature soldering iron,
please be careful not to heat too long.
• • •
• Pb free solder will tend to splash when heated too high
(about 1100°F/600°C)
• • •
• This lead free solder will be used for the products after
serial No. 1,000,001.
2 FEATUERS
• • •
• Simultanous Multi-Device Connection (with Expansion
Module (hub unit)
• • •
• Expansion Module (The optional Hub unit: CY-EM100U)
• • •
• Connectable devices
− − −
− The optional adapter allows you to connect the optional
Panasonic DVD changer unit (CX-DH801U).
− − −
− The optional adapter allows you to connect the optional
Panasonic CD changer unit (CX-DP880).
− − −
− TV Tuner (The optional Panasonic TV tuner unit: CY-
TUN153U).
− − −
− The optional adapter allows you to connect the optional
iPod®series.
<Controllable iPod/software version>
3rd generation iPod/ver.2.3
4rd generation iPod/ver.3.1
iPod Photo/ver. 1.2
iPod mini/ver. 1.4
iPod nano/ver. 1.0
− − −
− XM Satellite Radio. (The optional XM receiver: XMD-
1000)
− − −
− Sirius Satellite Radio. (The optional Sirius Satellite
receiver: SIR-PAN1)
− − −
− Hands-Free Phone System (The optional Bluetooth
hands-free kit: CY-BT100U).
• • •
• Integration of the monitor, FM/AM radio, DVD Video, Video
CD player and CD/MP3/WMA player
• • •
• Built-in AV Input/Output Terminals.
• • •
• Built-in Dolby Digital decoder, DTS decoder.
• • •
• Built-in DSP.
• • •
• GUI (Graphic User Interface).
• • •
• CS Auto (Circle Surround Automotive).
• • •
• Touch Panel Operation.
• • •
• DVD-R, DVD-RW, Playback.
• • •
• ID code.
3 REPLACING THE FUSE
Use fuses of the same specified rating (15A). Using different
substitutes or fuses with higher ratings, or connecting the unit
directly without a fuse, could cause fire or damage to this unit.
4 MAINTENANCE
Your products is designed and manufactured to ensure a
minimum of maintenance. Use a soft cloth for routine exterior
cleaning. Never use benzine, thinner or other solvent.
5 LASER PRODUCTS
6 DIMENSIONS
3
CQ-VD7005U

7 WIRING CONNECTION
4
CQ-VD7005U

8 DISASSEMBLY INSTRUCTIONS
8.1. How to Remove the FPC Ass’y
5
CQ-VD7005U

8.2. How to Disassemble & assemble
6
CQ-VD7005U

9.1. Main Block
IC601 : C2DBYY000229
Pin
No. Port Description I/O Vol (V)
1 AVREF0 Reference voltage for A/D
converter - 3.2
2 AVSS Ground for A/D converter - 0
3 ANT CNT Antenna control O 3.2
4 RCA SW External audio signal selector
control O 0
5 AVREF1 Reference voltage for A/D
converter - 3.2
6 Touch RESET Touch Panel reset O 3.2
7 HUB CNT Request signal for HUB
connection O 3.2
8 IC/FLMD0 Flash memory update control - 0
9 VDD +3V power supply - 3.2
10 REGC Bypass capacitor terminal for
voltage reg. - 2.5
11 VSS Ground - 0
12 X1 Crystal osillator terminal I 1.1
13 X2 Crystal osillator terminal - 1.2
14 /RESET System reset I 3.2
15 XT1 (Connecting to ground) - 0
16 XT2(NC) No Connection - -
17 EVENT Incoming Bluetooth data
detection I 0
18 CH STB/XM
DET2 Changer data strobe I 5
19 RDS DATA RDS data I 3.3
20 RDS CLK RDS clock I 0
21 MAIN CNT Main power control O 5.0
22 OSD CS OSD chip select O 1
23 OSD DO OSD control data O 0.6
24 OSD CLK OSD data shift clock O 2.2
25 XM
SO(MO)/TXDA0 XM data O 5
26 CH DATA/XMSI
/RXDAO Changer data I 0
27 CH CLK/XM
DET1 Changer clock / XM detection signal I 3.1
28 REMO DATA Ext. remote control signal I 5
29 CHC REM OUT Changer remote control code O 5.1
30 I2C CLK I2C bus clock O 5.1
31 I2C DATA I2C bus data O 5.1
32 OSD RESET OSD reset O 3.2
33 EVSS Ground for ext. unit - 0
34 EVDD +3V power supply for ext. unit - 3.2
35 DVD TX(MO) DVD deck TX data O 3.2
36 DVD RX(MI) DVD deck RX data I 3.2
37 BEEP Beep signal O 0
38 AMP CNT Ext. AMP control O 3.2
39 AMP STB Ext. AMP stand-by O 5
40 TFT SI(MI) TFT unit communication data I 0
41 TFT SO(MO) TFT unit communication data O 0.5
42 TFT CLK TFT unit communication clock O 5
43 AMP MUTE Internal power AMP mute O 0
44 SYS ON System power (5V) control for
SW PCB O 0
45 NAVI REMO
OUT NAVI remote control data O 0
46 ENTER ENTER key I 3.3
47 FRONT MUTE Audio signal (BEEP NAVI)
mute O 5
48 VD COUNT(NC) No Connection - -
49 REAR MUTE Video out mute O 5
Pin
No. Port Description I/O Vol (V)
50 SYSID1 System ID detection 1 I 5.0
51 SYSID2 System ID detection 2 I 5.0
52 SYS MUTE (F) System mute (FRONT) O 5
53 SYS MUTE (S) System mute (SURROUND) O 5
54 SYS MUTE (C) System mute (CENTER) O 5
55 SYS MUTE(SW) System mute (SW) O 5
56 BATT SENS Battery level detection I 5
57 ACC SENS ACC level detection I 5
58 PULSE Monitor position detection
pulse I 5
59 SYS PWR System power control O 5
60 MAIN PWR Main power control O 3.2
61 MONI PWR Monitor power control O 3.2
62 NAVI RM CH NAVI remote control output
change O 0
63 MODE LED MODE LED on/off O 3.2
64 EJECT LED EJECT LED on/off O 0
65 NAVI LED NAVI LED on/off O 0
66 MA Drive mechanism control
signal O 3.2
67 MB Drive mechanism control
signal O 3.2
68 MC Drive mechanism control
signal O 3.2
69 BVSS Ground for bus I/F - 0
70 BVDD Power supply for bus I/F - 3.2
71 FAN CNT Fan motor power control O 3.2
72 ROTARY.1 Rotary encoder signal (VOL
DOWN) I 0
73 ROTARY.2 Rotary encoder signal (VOL
UP) I 3.3
74 INIT DET2 Initial setting for a system
mode I 0
75 RADIO CNT Radio power control O 3.2
76 DVD MUTE DVD mute request / Flash
memory update cnt. I 3.3
77 DSP SCK Shift clock for DSP
communication data O 2.8
78 DSP SDA DSP communication data O 3.1
79 DSP RESET DSP reset O 3.2
80 DVD CNT DVD deck power control O 3.2
81 DVD RESET Reset signal for DVD deck
control MPU O 3.2
82 FRAM HOLD F-RAM hold O 0
83 FRAM CLK Shift clock for F-RAM data O 0
84 FRAM DO F-RAM serial data O 0
85 FRAM CS F-RAM chip select O 3.2
86 FRAM WP F-RAM write protect O 0
87 SW PWR Switching power supply
frequency change O 0
88 MODE MODE key detection I 3.2
89 JOY A/D ADC input terminal for joy stic
signal I 3.3
90 NAVI DISP NAVI display activity detection I 3.3
91 NAVI SENS NAVI system connection
detection I 3.3
92 SIDE BRAKE Side break detection I 3.3
93 INIT DET Destination detection I 0
94 POSI SENS ADC input terminal for
monitor position signal I 2.4
95 NAVI MUTE NAVI mute I 0
96 OFFSET DET Power IC abnormality
detection I 0
97 AD KEY ADC input terminal for AD
key signal I 3.3
98 REVERSE REVERSE signal detection I 3.3
99 FRAM DI F-RAM serial data I 0
9 TERMINALS DESCRIPTION
7
CQ-VD7005U

Pin
No. Port Description I/O Vol (V)
100 V NAVI NAVI RGB signal change O 0
9.2. TFT Block
IC401 : C2BBYY000199
Pin
No. Port Description I/O Vol (V)
1 MONI CNT TFT monitor power supply control
output O 4.9
2 BL CNT Backlight control output O 4.9
3 TILT LED TILT button LED control O 0
4 ASPECT LED LED control of ASPECT button O 4.9
5 EJECT LED
(NC) Not Connected O -
6 NAVI LED
(NC) Not Connected O -
7 SRC LED (NC) Not Connected O -
8 NC NC(GND connection) I 0
9 SELF WRITE Self writing switch output O 0
10 TFT RESET System reset input - 5.0
11 NC NC(GND connection) I 0
12 NC NC(GND connection) I 0
13 IC/Vpp Internal connection and flash
memory programming mode
drawing in
- 0
14 X2 Crystal oscillator clock I 2.7
15 X1 Crystal oscillator clock I 2.4
16 REGC Regulator output stability capacity
connection - 2.5
17 VSS Grand potential for in - 0
18 EVSS Grand potential for external - 0
19 VDD Positive power supply for in - 4.9
20 EVDD Positive power supply for external - 4.9
21 SCL I2C bus clock output for DAC O 4.9
22 SDA I2C bus data output for DAC O 4.9
23 NC NC(OPEN) O 0
24 NC NC(OPEN) O 0
25 NC NC(OPEN) O 0
26 NC NC(OPEN) O 0
27 NC NC(OPEN) O 0
28 NC NC(OPEN) O 0
29 NC NC(OPEN) O 0
30 NC NC(OPEN) O 0
31 NC NC(OPEN) O 0
32 NC NC(OPEN) O 0
33 NC NC(OPEN) O 0
34 NC NC(OPEN) O 0
35 NC NC(OPEN) O 0
36 NC NC(OPEN) O 0
37 NC NC(OPEN) O 0
38 HD IN HD signal input I 4.4
39 VD IN PAL N/PALM judgment VD signal
input I 4.7
40 NC NC(OPEN) O 0
41 NC NC(OPEN) O 0
42 NC NC(OPEN) O 0
43 NC NC(OPEN) O 0
44 NC NC(OPEN) O 0
45 OSD CSEL
(NC) Not Connected O -
46 X- Transistor SW output for touch
panel side X ( - pole) O 0
47 Y- Transistor SW output for touch
panel side Y ( - pole) O 0
48 X+ Transistor SW output for touch
panel side X ( + pole) O 4.9
49 Y+ Transistor SW output for touch
panel side Y ( + pole) O 4.9
50 RX For Flash rewriting I 0.5
51 TX For Flash rewriting O 0
52 IP SO IP Serial data output O 0
53 IP SI IP Serial data input I 0
8
CQ-VD7005U

Pin
No. Port Description I/O Vol (V)
54 IP SCK IP Serial clock output O 0
55 IP STR IP STR control O 0
56 IP RESET IP RESET output O 0
57 NC NC(OPEN) O 0
58 NC NC(OPEN) O 0
59 AVREF Reference voltage input 0 of A/D
converter - 4.9
60 AVSS A/D converter grand potential - 0
61 XG Touch panel side X with respect
to - pole I 0
62 YG Touch panel side Y with respect
to - pole I 1.2
63 XR Touch panel side X with respect
to + pole I 0
64 YR Touch panel side Y with respect
to - pole I 1.2
65 LIGHT SENS DIMMER input I 3.9
66 A/D KEY A/D key input for TILT and
OPEN/CLOSE I 4.9
67 A/D KEY GND connection I 0
68 A/D KEY GND connection I 4.9
69 NC Not Connected O -
70 TFT CLK Serial communications clock for
the main CPU I 4.9
71 TFT SO/TFT
COM Serial communications data input for the main CPU I 0.6
72 TFT SI/TFT
DATA Serial communications data output for the main CPU O 0.4
73 Touch SW Switch output for touch panel SW
detection O 4.1
74 NC NC(OPEN) O 0
75 NC NC(OPEN) O 0
76 NC NC(OPEN) O 0
77 NC NC(OPEN) O 0
78 NC NC(OPEN) O 0
79 NC NC(OPEN) O 0
80 BUS KILL For connected confirmation of
self adjustment treatment device I 0
9.3. DVD Servo Block
IC501 C1AB00002402
Pin No. Port Descriptions I/O Vol
(V)
1VDDIO I/O pad power (3.3V) - 3.3
2 MD10 SDRAM data bus I/O 0
3 MD11 SDRAM data bus I/O 0.6
4 VDD Core power (1.8V) - 1.8
5 MD12 SDRAM data bus I/O 0
6VSSIO I/O pad ground - 0
7 MD13 SDRAM data bus I/O 0.7
8 MD14 SDRAM data bus I/O 0.5
9 MD15 SDRAM data bus I/O 0
10 VDDIO I/O pad power (3.3V) - 3.3
11 /DQM1 SDRAM data byte enable O 0
12 MA9 SDRAM address bus O 0
13 MA8 SDRAM address bus O 0
14 VSSIO I/O pad ground - 0
15 MA7 SDRAM address bus O 2.3
16 MA6 SDRAM address bus O 1.9
17 VSS Core ground - 0
18 MA5 SDRAM address bus O 1.1
19 VDDIO I/O pad power (3.3V) - 3.3
20 MA4 SDRAM address bus O 2.0
21 MA3 SDRAM address bus O 2.3
22 MCLK SDRAM clock O 1.7
23 VSSIO I/O pad ground - 0
24 CKE SDRAM clock enable O 3.3
25 MA2 SDRAM address bus O 2.3
26 MA1 SDRAM address bus O 1.0
27 VDDIO I/O pad power (3.3V) - 3.3
28 MA0 SDRAM address bus O 1.0
29 MA10 SDRAM address bus O 0
30 MA11 Not used - -
31 VSSIO I/O pad ground - 0
32 MA12 SDRAM address bus O 2.1
33 MA13 SDRAM address bus O 2.1
34 VDD Core power (1.8V) - 1.8
35 /CS0 SDRAM primary bank chip
select O 2.7
36 VDDIO I/O pad power (3.3V) - 3.3
37 /RAS SDRAM command bit O 3.1
38 /CAS SDRAM command bit O 2.9
39 /WE SDRAM command bit O 3.2
40 VSSIO I/O pad ground - 0
41 /DQM0 SDRAM data byte enable O 0
42 /DQM2 SDRAM data byte enable O 0
43 MD16 SDRAM data bus I/O 0.5
44 VDDIO I/O pad power (3.3V) - 3.3
45 MD17 SDRAM data bus I/O 0.5
46 MD18 SDRAM data bus I/O 0.5
47 VSS Core ground - 0
48 MD19 SDRAM data bus I/O 0.7
49 VSSIO I/O pad ground - 0
50 MD20 SDRAM data bus I/O 0
51 MD21 SDRAM data bus I/O 1.5
52 MD22 SDRAM data bus I/O 1.0
53 VDDIO I/O pad power (3.3V) - 3.3
54 MD23 SDRAM data bus I/O 0
55 MD24 SDRAM data bus I/O 0.5
56 MD25 SDRAM data bus I/O 0.5
57 VSSIO I/O pad ground - 0
58 MD26 SDRAM data bus I/O 0.5
59 MD27 SDRAM data bus I/O 0.8
60 MD28 SDRAM data bus I/O 0
61 MD29 SDRAM data bus I/O 1.0
62 VDDIO I/O pad power (3.3V) - 3.3
63 MD30 SDRAM data bus I/O 0.7
64 MD31 SDRAM data bus I/O 0.5
65 /DQM3 SDRAM data byte enable O 0
66 /CS1 Not used O -
67 VSSIO I/O pad ground - 0
68 SPDIF S/PDIF digital audio output O 1.3
69 VSS Core ground - 0
9
CQ-VD7005U

Pin No. Port Descriptions I/O Vol
(V)
70 AIN Digital audio input for
digital micro I 3.3
71 AOUT3 Serial audio data (Left/Right
CH) O 0
72 AOUT2 Serial audio data (Center/LFE
CH) O 0
73 AOUT1 Serial audio data (Sound
Left/Right CH) O 0
74 AOUT0 Serial audio data (Left/Right
CH) O 0
75 VDDIO I/O pad power (3.3V) - 3.3
76 PCMCLK Audio DAC PCM sampling clock O 1.8
77 VDD Core power (1.8V) - 1.8
78 ACLK Audio interface serial data
clock O 1.7
79 LRCLK Left/Right channel clock O 1.7
80 /SRST Reset signal O 3.3
81 /RSTP Power on reset I 3.3
82 VSSIO I/O pad ground - 0
83 RXD1 Not used - -
84 SSPIN1 SSP1 data in / UART1 16X
clock I/O 15
85 VSS Core ground - 0
86 SSPOUT1 SSP1 sata out / UART1 DTR I/O 0
87 SSPCLK1 SSP1 clock / UART1 CTS I/O 3.3
88 SSPCLK0 Not used - -
89 VDD Core power (1.8V) - 1.8
90 SSIN0 Not used - -
91 VDDIO I/O pad power (3.3V) - 3.3
92 SSPOUT0 Not used - -
93 TXD0 UART0 serial data O 3.2
94 RXD0 UART0 serial data I 3.0
95 /CTS0 Not used - -
96 /RTS0 Not used - -
97 VSSIO I/O pad ground - 0
98 CXI Crystal Oscillator terminal I 1.6
99 CXO Not used - -
100 OSCVSS Oscillator ground - 0
101 OSCVDD Oscillator power (1.8V) - 1.8
102 MVCLVDD Main/Video clock PLL power
(3.3V) - 3.3
103 SCEN Not used - -
104 MVCKVSS Main/Video clock PLL Ground - 0
105 ACLKVSS Audio clock PLL ground - 0
106 SCMD Not used - -
107 ACLKVDD Audio clock PLL power - 3.3
108 VDDDAC DAC digital power (1.8V) - 1.8
109 VSSDAC DAC digital ground - 0
110 CVBS2/CR/R Composite Cr/Component
Cr/SCART Red O 0.5
111 IOM Cascaded DAC differential
output O 1.0
112 C/CB/B Chrominance/Component
Cb/SCART Cb O 0.7
113 VAA3 DAC analog power (3.3V) - 3.3
114 Y/G Luminance/SCART G O 0.4
115 VSSA DAC analog ground - 0
116 VREF Not used - -
117 VAA - - 1.8
118 CVBS/C Composite/S-Video Chrominance O 0.5
119 RSET Current setting resistor
connection O 1.4
120 COMP Compensation capacitor
connection O 2.0
121 VSS Core ground - 0
122 VCLK Not used - -
123 VSYNC Not used - -
124 HSYNC Not used - -
125 VDDIO I/O pad power (3.3V) - 3.4
126-131 VI07-02 Not used - -
132 VSSIO I/O pad ground - 0
133 Not used - -
134 Not used - -
135 VDD Core power (1.8V) - 1.9
136-139 AD31-28 Not used - -
140 VDDIO I/O pad power (3.3V) - 3.4
Pin No. Port Descriptions I/O Vol
(V)
141-144 AD27-24 Not used - -
145 /PWE3 Not used - -
146 AD23 Not used - -
147 VSSIO I/O pad ground - 0
148-150 AD22-20 Not used - -
151-153 AD19-17 Address/Data bus I/O 0
154 VDDIO I/O pad power (3.3V) - 3.4
155 AD16 Address/Data bus I/O 0
156 /PWE2 Not used - -
157, 158 AD15, 14 Address/Data bus I/O 0
159 VDD Core power (1.8V) - 1.9
160 SCLK External bus clock O 2.1
161 ACK Programmable WAIT/ACK/RDY
control I 3.4
162 VSSIO I/O pad ground - 0
163-168 AD13-08 Address/Data bus I/O 0
169 VDDIO I/O pad power (3.3V) - 3.4
170 /PWE1 Not used - -
171 VSS Core ground - 0
172-176 AD7-3 Address/Data bus I/O 0
177 VSSIO I/O pad ground - 0
178-180 AD02-00 Address/Data bus I/O 0
181 VDDIO I/O pad power (3.3V) - 3.4
182 /PWE0 Byte write enable O 0
183 ALE Address latch enable O 0
184-187 LA0-3 Latch address O 3.3
188 VSSIO I/O pad ground - 0
189 RD Read signal O 3.4
190 LHLDA Not used - -
191 LHLD Not used - -
192 VDD Core power (1.8V) - 1.9
193 /PCS0 Peripheral chip select 0 O 3.4
194 XI01 Not used - -
195 DACCS2 DAC output select 2 O 3.4
196 VDDIO I/O pad power (3.3V) - 3.4
197 DACCS1 DAC output select 1 O 3.4
198 NINTCPPM Not used - -
199 CPPMCS Not used - -
200 XI06 Not used - -
201 VSS Core ground - 0
202 FRAMCS FRAM chip selection O 0
203 DACRST DAC reset O 0
204 VSSIO I/O pad ground - 0
205 FEPCS Front End Pro. LSI chip
select O 3.4
206 FEPRST Front End Pro. reset O 3.4
207 SODCCS SODC LSI chip selection O 3.4
208 NINTHOST HOST interrupt I 3.4
209 NINTDDC DDC interrupt I 3.2
210 VDDIO I/O pad power (3.3V) - 3.4
211 NINTDSC DSC interrupt I 3.5
212 VDD Core power (1.8V) - 1.9
213 DSYNV DVD parallel mode sector SYNC I 3.4
214 DREQ DVD parallel mode data
request O 3.4
215 DCLK Data sampling clock I 3.4
216 DSTB Parallel mode data
valid/Serial mode clock I 0.7
217 DVD0 DVD drive parallel data port I 0
218 VSSIO I/O pad ground - 0
219 DVD1 DVD drive parallel data port I 0
220 DVD2 DVD drive parallel data port I 0
221 DVD3 DVD drive parallel data port I 3.4
222 DVD4 DVD drive parallel data port I 0.8
223 DVD5 DVD drive parallel data port I 0.8
224 VDDIO I/O pad power (3.3V) - 3.4
225 DVD6 DVD drive parallel data port I 3.4
226 DVD7 DVD drive parallel data port I 3.4
227 MD0 SDRAM data bus I/O 0.5
228 VSSIO I/O pad ground - 0
229 MD1 SDRAM data bus I/O 0
230 VSS Core ground - 0
231 MD2 SDRAM data bus I/O 0.8
232 MD3 SDRAM data bus I/O 0.8
10
CQ-VD7005U