Renesas DA14706 PRO User manual

DA14706 Devkit User Manual Rev.1.00.93 Page 1 of 58
Preliminary document
Specifications in this document are tentative and subject to change.
User Manual
DA14706 PRO Development kit
UM-B-148
Abstract
Hardware description of the DA14706 PRO development kit, including DA14706 or DA14708 PRO
daughterboards, PRO motherboard and the accompanying boards which mounted on the motherboard,
namely the LCD module and the power measurement module.

DA14706 Devkit User Manual Rev.1.00.93 Page 2 of 58
Preliminary document
Specifications in this document are tentative and subject to change.
Table of Contents
Abstract .................................................................................................................................1
Figures...................................................................................................................................3
Tables....................................................................................................................................4
1Terms and Definitions...................................................................................................5
2References ...................................................................................................................6
3Introduction DA14706 PRO Development kit................................................................7
3.1 Introduction ................................................................................................................................................7
3.2 Features.....................................................................................................................................................8
3.3 PRO Development kit Hardware block diagram........................................................................................8
4PRO-Motherboard main features..................................................................................9
4.1 USB HUB.................................................................................................................................................12
4.2 USB to UART...........................................................................................................................................12
4.3 USB to Serial Wire Debug port (SWD) ....................................................................................................14
4.4 Audio Codec section................................................................................................................................15
4.5 Expansion SPI Connector........................................................................................................................16
4.6 Voltage level translation (debugging) section..........................................................................................17
4.7 Push Buttons............................................................................................................................................18
4.8 GPIO assignment.....................................................................................................................................19
4.9 QSPI-RAM ...............................................................................................................................................23
4.10 QSPI FLASH............................................................................................................................................24
4.11 Break-out connector (J6) .........................................................................................................................27
4.12 DA14706 PRO-Motherboard power configuration...................................................................................28
5Power measurement circuitry .....................................................................................31
5.1 The Power measurement circuitry, the monitoring section on PRO-Motherboard..................................32
5.2 The power measurement module 2 (PMM2), da1470x-sb-pmm2, (500-29-x)........................................34
5.2.1 Accuracy of current measurement for DA1470x system (VLDO)..................................................37
5.2.2 Settings of power configuration header J9.....................................................................................39
6LCD interface and add-on board.................................................................................40
6.1 LCD interface on PRO-Motherboard .......................................................................................................40
6.2 LCD Amoled board, da1470x-sb-E120A390QSR (500-31-X).................................................................41
7PRO Daughterboard...................................................................................................43
7.1 Main features ...........................................................................................................................................43
7.2 Main Components Description.................................................................................................................46
7.3 Debugging section...................................................................................................................................47
7.4 Audio Section...........................................................................................................................................48
7.5 RF Section ...............................................................................................................................................49
7.6 Power section ..........................................................................................................................................50
7.7 QSPI FLASH............................................................................................................................................51

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Preliminary document
Specifications in this document are tentative and subject to change.
8Quick Setup................................................................................................................55
8.1 Hardware setup........................................................................................................................................55
8.2Debug interfaces –SWD / JTAG.............................................................................................................56
8.3 Debug interfaces -–UART........................................................................................................................57
Figures
Figure 1: DA14706 PRO Development kit............................................................................................................7
Figure 2: System Block Diagram..........................................................................................................................8
Figure 3: Engineering level, voltage & interface, PRO-Motherboard block diagram............................................9
Figure 4: Monitoring Header J3: Schematic (left) & PCB (right).........................................................................10
Figure 5: Monitoring Header J4: Schematic (left) & PCB (right).........................................................................10
Figure 6: Debug interface including DIP switch SW1.........................................................................................11
Figure 7: PCB top of the DA1470x PRO Development Kit Top..........................................................................11
Figure 8: USB HUB Circuitry of DA14706 PRO-Motherboard............................................................................12
Figure 9: USB to UART (FTDI module)..............................................................................................................13
Figure 10: UART & SWD signals........................................................................................................................13
Figure 11: MK22 debugger schematic (for M33)................................................................................................14
Figure 12: J-Trace connector for M33................................................................................................................15
Figure 13: Audio section schematic....................................................................................................................15
Figure 14: Analog Switch (U8) used to isolate the Digital Audio interface.........................................................16
Figure 15: Expansion SPI connector (J27).........................................................................................................16
Figure 16: Voltage Level Translation Circuit.......................................................................................................17
Figure 17: Push Buttons used in the DA1470x PRO-Motherboard....................................................................18
Figure 18: QSPI RAM schematic........................................................................................................................23
Figure 19: QSPI RAM Analog Switch.................................................................................................................23
Figure 20: QSPI RAM power switch...................................................................................................................24
Figure 21: Default QSPI flash AT25SL128A-MHE-T..........................................................................................24
Figure 22: Two QSPI Flash PCB footprint options (not populated)....................................................................25
Figure 23: Analog switch (U6) used for the QSPI flash signals..........................................................................25
Figure 24: QSPI Flash power switch ..................................................................................................................26
Figure 25: eMMC connector schematic..............................................................................................................27
Figure 26: Power configuration applied on PRO-Motherboard ..........................................................................28
Figure 27: VLDOp voltage generation................................................................................................................28
Figure 28: 3.3V LDO for PRO-Motherboard peripherals....................................................................................29
Figure 29: Power Measurement Module (PMM2) block diagram.......................................................................31
Figure 30: Current Measurement socket (M2)....................................................................................................32
Figure 31: the hardware setup for current measurements.................................................................................33
Figure 32: C_TRIG selection jumper block (J7) & buffer MOSFETS for I/O levels compatibility.......................34
Figure 33: PMM2 current Measurement Circuit PMM2......................................................................................35
Figure 34: PMM2 on board peripherals (Power supply, Memory etc.)...............................................................36
Figure 35: Current measurement unit PCBA (TOP)...........................................................................................37
Figure 36: Normal mode (1μA to 500mA at 3.3V) data after offset calibration. .................................................38
Figure 37: Hibernation mode (100nA to 60uA at 3.3V) data after offset calibration. .........................................38
Figure 38: Power connections............................................................................................................................39
Figure 39: Header schematic for LCD daughterboard (Interface board)............................................................40
Figure 40: LCD add-on daughterboard...............................................................................................................41
Figure 41: QSPI AMOLED LCD daughterboard position on PRO-Development kit ..........................................42

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Specifications in this document are tentative and subject to change.
Figure 42: LCD TFT daughterboard top (left) and PCBA bottom side (right).....................................................42
Figure 43: System Block Diagram of DA1470x PRO-Daughterboard................................................................44
Figure 44: PCB top of the DA14706 PRO- Daughterboard................................................................................44
Figure 45: PCB bottom of the DA1470x PRO- Daughterboard..........................................................................45
Figure 46: PRO- Daughterboard. interface connectors to PRO-Motherboard...................................................45
Figure 47: CMAC/M33 & SNC debugging connectors schematic......................................................................48
Figure 48: VAD Analog MIC ...............................................................................................................................48
Figure 49: Programmable gain amplifier signal routing......................................................................................49
Figure 50: RF Section of PRO-Daughterboard. .................................................................................................49
Figure 51: PRO-Daughterboard Power options .................................................................................................50
Figure 52: USB OVP protection (U3) & Rsence (R18).......................................................................................51
Figure 53: MX25U6432FZNI02 QSPI FLASH schematic...................................................................................51
Figure 54: V18P & V18F are connected through R22........................................................................................52
Figure 55: Resistor network for the monitoring signals ......................................................................................52
Figure 56: PCB marking of GPIO signals not directly connected to monitoring headers...................................53
Figure 57: MX66UM1G45GXD OSPI FLASH schematic ...................................................................................54
Figure 58: SWD/JTAG ports to use....................................................................................................................56
Figure 59: Virtual COM port selection ................................................................................................................57
Tables
Table 1: Signals with level translation ................................................................................................................17
Table 2: DA14706 PRO-Development kit GPIO pin assignment .......................................................................19
Table 3: U6 truth table ........................................................................................................................................26
Table 4: SW2 switch voltage settings.................................................................................................................29
Table 5: Monitored Power Sources ....................................................................................................................33
Table 6: Accuracy of the Current Measurement Circuit .....................................................................................38
Table 7Jumper setting of current measurement connector J9...........................................................................39
Table 8: DA1470x Product Family Differentiation ..............................................................................................46
Table 9: DA1470x SoC Voltage domains...........................................................................................................46
Table 10: XTAL32M Recommended Operating Conditions ...............................................................................47
Table 11: XTAL32K Recommended Operating Conditions................................................................................47
Table 12: Flash memory signals to the monitoring headers at PRO-Motherboard............................................53
Table 13: DA14706 PRO-Development kit, Quick setup....................................................................................55

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Preliminary document
Specifications in this document are tentative and subject to change.
1 Terms and Definitions
AFE Analog Front End
BLE Bluetooth Low Energy
Dev Kit Development Kit
PRO-Devkit Professional Development Kit
PRO-DB PRO-Daughterboard
PRO-MB PRO-Motherboard
DB Daughterboard
MB Mainboard or motherboard
OPAMP Operational Amplifier
OVP Over Voltage Protection
PCB Printed Circuit Board
SDK SW Development Kit
HDK HW Development Kit

DA14706 Devkit User Manual Rev.1.00.93 Page 6 of 58
Preliminary document
Specifications in this document are tentative and subject to change.
2 References
1. Device specification, DA1470x Datasheet
2. HW Design, PRO-Motherboard, da1470x-mb_[500-05-x]
3. HW Design, PRO-daughterboard, da1470x-db-vfbga142_[500-06-x]
4. HW Design, Current Sense, da1470x-sb-pmm2_[500-29-x]
5. HW Design, LCD, da1470x-sb-ctspilcd_[500-31-x]

DA14706 Devkit User Manual Rev.1.00.93 Page 7 of 58
Preliminary document
Specifications in this document are tentative and subject to change.
3 Introduction DA14706 PRO Development kit
3.1 Introduction
The DA14706 PRO Development kit consists of the PRO-Motherboard and PRO-daughterboard.
Special attention for the design of this kit has been given in providing a trouble-free user experience and keeping
compatibility with the existing tools from the DA1458x/DA1468x/DA1469x product lines.
The PRO development kit when combined with the DA1470x SDK and SmartSnippets tools, provides an easy
to use and complete platform for software/hardware development.
In this document we focus on the DA14706 PRO Development kit which consists of the following parts:
▪PRO-Motherboard (PRO-MB)
oda1470x-mb, PCBA reference number 500-05-x
▪PRO-daughterboard (PRO-DB)
oda1470x-db-vfbga142, PCBA reference number 500-06-x
▪Power Measurement Module 2 (PMM2) add-on
oda1470x-sb-pmm2, PCB reference number 500-29-x
▪LCD add-on for TFT 390x390
oda1470x-sb-ctspilcd, PCB reference number 500-31-x
Figure 1: DA14706 PRO Development kit

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Specifications in this document are tentative and subject to change.
3.2 Features
▪DA1470x silicon easily replaceable on a daughterboard core module
▪Dedicated daughterboard for current measurement (on a M2 socket)
▪LCD daughterboard
▪On-board basic peripherals for demo and development
▪Look and feel like previous PRO-Development kits
▪Flexible & robust power options
▪JTAG debugger on Board and connectivity to PC for Μ33 and SNC.
▪Voltage translation section for minimizing leakage
▪DIP switches for breaking-up certain signal allowing power measurements & debugging
▪Header for JTAG debugger for CMAC
▪64 Mbit, QSPI NOR Flash memory for eXecute in Place (XiP)
▪256 Mbit Storage QSPI NOR Flash
▪64 Mbit QSPI RAM
▪Break-out header (J6) for connecting an add-on board with eMMC (DA14708) or other peripheral.
▪Headers for I/O monitoring and expandability1
▪Audio codec with jack speaker phone & digital mic capabilities
▪Analog Microphone
▪RGB LED
▪Two general purpose Push Buttons
▪Option to support two MikroBUS click boards & PMOD interface
▪Generic SPI expansion header (J27)
▪Provisions for automated test
3.3 PRO Development kit Hardware block diagram
FTDI
RGB
LED
RST
BUTTON
PWR
SW
DIP SWITCH
M.2 Socket
Current
Measurement
Daughterboard
(500-29-x)
SWD
SWD
UART
SPI
BREAKOUT HEADERS
QSPI
FLASH
QSPI
RAM JTRACE
Conn
2x USER
BUTTONS
STEREOHEADSET
DIGITALMIC
VLDO
eMMC DB
Connector, J6
Expansion SPI
Conn, J27
VAD MIC
USBHUB
Segger
J-LINK 1
1
2
Segger
J-LINK 2
3.3V
QSPI AMOLED
LCD
Daughterboard
(500-31-x)
MikroBUS & PMOD Sockets (N.P.)
BATT
CON
USB
CON
CMAC
CON
OSPI
DA7218
DA1470x
Dialog
DA1470x
PRO DB
(500-06-x)
DA1470x - PRO Motherboard (500-05-x)
LDO
DCDC
DCDC 3.3V
3.3V
3.0/3.3/3.6V
Switch
Switch
Figure 2: System Block Diagram

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Specifications in this document are tentative and subject to change.
4 PRO-Motherboard main features
▪Single USB connector *NOTE: USB host must support USB 2.0 high-speed for reliable power
measurements
▪USB hub with 3 downstream ports
oPort1: Segger JLink-OB SWD-JTAG debugger for ARM Cortex M33
oPort2: FT2232H multiprotocol serial interface providing a booting/debugging/HCI UART (2 or 4-
pin) and SPI connected to the current measurement daughterboard A/D converter
oPort3: Segger JLink-OB SWD-JTAG debugger for SNC
▪2 Connectors mating to the DA1470x daughterboard
▪Breakout Headers (3 pcs 2x20pin) for monitoring GPIO and power signals, with markings of signal names
on the PCB top silkscreen (Figure 3)
▪Two user button, K1 & K2 connected to GPIOs through header J35
▪DIP switch to isolate UART and JTAG signals (in case we need to secure the most accurate sleep current
measurements)
▪Test points on the bottom layer
▪Ground points (TP28, TP29) for connecting crocodile clips
▪QSPI-RAM with option to disconnect the related GPIOs from the long traces travelling to breakout
headers & MikroBUS sockets
BREAKOUT Headers
(J3, J4, J5)
JTAG_SNC
JTAG_M33
FTDI
(U12)
Segger
J-LINK 2
(U31)
LCD
Daughterboard
(500-31-x)
QSPI RAM
(U2)
User
Button
(K1, K2)
eMMC
Connector
Expansion SPI
Header
Power
Measurement
Module (PMM)
Daughterboard
(500-29-x)
USB_PAIR1
USB_PAIR3
Digital MIC
MIPI
GPIOs
monitoring
1 & 2
PMOD Headers
SPI, I2C
SPI GPIOs
JTRACE
Conn
JTAG_M33
QSPIC1 GPIOs
DCDC 3.3V
DCDC 3.3V VLDO
3.3V
3.3V
VBUS_HUB
VLDO (To DA1470x
Daughterboard)
VBUS_HUB
VBUS_HUB
Segger
J-LINK 1
(U30)
UART
DIP SWITCH (SW1)
USB HUB
(U11)
USB_PAIR2
J36
J37
D7218
(U27)
J27
J31
Storage QSPI
FLASH (U32)
Speaker
Jack (J30)
LDO
(U18)
Audio Signal
Switch (U8)
I2S
Int, Cntr
GPIOs
LCD_Data
SPI
J1 J2
DA1470x
Daughter
board
(500-06-x)
LDO
USB1
Level translator
J6 Switch
(U6) Switch
(U7)
QSPIC2 GPIOs
eMMC GPIOs
3.0/3.3/3.6V
DA1470x PRO-Motherboard (500-05-x)
Figure 3: Engineering level, voltage & interface, PRO-Motherboard block diagram

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Specifications in this document are tentative and subject to change.
Figure 4: Monitoring Header J3: Schematic (left) & PCB (right)
Figure 5: Monitoring Header J4: Schematic (left) & PCB (right)

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Specifications in this document are tentative and subject to change.
▪QSPI flash (with three footprint options)
▪dedicated connector (J6) which can accept an eMMC flash daughterboard
▪Optional 2x MikroBUS sockets (supporting 3.3V compatible click boards)
▪PMOD interface (shares same signals with MIKROBUS sockets)
▪GPIOs marked with an ’x’ at the end (e.g.P113x) have dual usage described in 4.9 and in 4.11
Figure 6: Debug interface including DIP switch SW1
Figure 7: PCB top of the DA1470x PRO Development Kit Top

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Specifications in this document are tentative and subject to change.
4.1 USB HUB
Figure 8: USB HUB Circuitry of DA14706 PRO-Motherboard
The USB HUB of DA14706 PRO-Motherboard is implemented by U11, USB2513B. This chip is supplied with
3.3V from a voltage regulator, U13.
The signal PWR_ENABLE is generated from U11 and it is an active high signal. It enables the power
components (DCDC converter & power switches) for UART, JTAG. The system will power up only after the
USB HUB has enumerated properly.
Its operation is indicated via the green LED D4 on the motherboard. A 24 MHz crystal (Y3) is required.
4.2 USB to UART
The USB to UART function is implemented by U12, FT2232HL. This chip is supplied with 3.3 V from U13. A
12 MHz crystal (Y4) is required for the chip operation.
Functions served by U12 are the following:
▪Connecting a PC to the UART port of DA1470x SoC
▪Connecting a PC to the current sensing circuitry:
○Software cursor triggering (C_TRIG)

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Specifications in this document are tentative and subject to change.
Figure 9: USB to UART (FTDI module)
U12
FT2232HL U40
U21
J4
P008
P201
P011
P029
UTX
URX
URTS
UCTS
P001
P000
SWCLK_1
SWDIO_1
SWCLK_M33
SWDIO_M33
SWCLK_2
SWDIO_2
SWCLK_SNC
SWDIO_SNC
P003
P002
P007
P004
J5
SWDIO_CMAC
SWDIO_CMAC
U.TX
U.RX
U.RTS
U.CTS
SW1
U23
&
U39
U30
&
U31
U_TX
U_RX
U_RTS
U_CTS
DA1470x
PRO-Motherboard PRO-Daughterboard
Figure 10: UART & SWD signals
To current
measurement
daughterboard
To UART
voltage
translators
From USB

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Preliminary document
Specifications in this document are tentative and subject to change.
4.3 USB to Serial Wire Debug port (SWD)
DA1470x SoC contains three processors, the main processor M33, the SNC and the CMAC. Each of them
can be accessed by a SWD port. M33 and SNC are accessed from the debuggers on board (U30 and U31
respectively) which are located on the PRO-Motherboard. CMAC can be accessed by a connector on PRO-
Daughterboard.
Figure 11: MK22 debugger schematic (for M33)
The USB to SWD function is implemented by U30 and U31, MK22FN128VMP10. U30/31 are flashed with the
J-Link OB firmware. Their operation is indicated via the green LEDs D11/D12. The chips are supplied with 3.3
V from U13.
Functions served by U30 and U31 include:
▪Connecting a PC to the SWD port of DA1470x SoC
▪Reset capability of the DA1470x SoC through the nRST signal
▪U30 is used for M33
▪U31 is used for the SNC
T_SWCLK_1
U38
SN74LVC1G07DBVR
NC
1
I
2
GND
3O4
VCC 5
3.3V
TP100
DBLED
nRST
C170
100nF
TP115
T_RESET1
3.3V
TP130
TMS/SWDIO_K22
TP117
XOUT_K22_1
R361
10.0k
USBDP_1
C201
100nF
For programming K22
J33
TagConnect
1 2
3 4
5 6
R435 33
R434 33
TP131 NRST_K22
3.3V
C171
100nF
USBDM_1
TP101
NRST_K22
R428 NP
TCK/SWCLK_K22
3.3V
3.3V
3.3V
R362
100K
R364 150
K22_RST1
K22_RST1
D11
Led_Green
21
3.3V
TP114
T_RESET2
R415
150
C172
100nF
T_SWDIO_1
R427
NP
R358
330
TP129
TCK/SWCLK_K22
TP116
XIN_K22_1
C173
100nF
LP3
500mA_470 OHM
K22_RST2
R359
10.0k
SWO/TDO_K22
3.3V
C169
100nF
R363 150
U30
MK22FN128VLH10
PTE0_CLKOUT32K
1
PTE1_LLWU_P0
2
VDD_1
3
VSS_1
4
USB0_DP
5
USB0_DM
6
USBVDD
7
NC
8
ADC0_DP0_ADC1_DP3
9
ADC0_DM0_ADC1_DM3
10
ADC1_DP0_ADC0_DP3
11
ADC1_DM0_ADC0_DM3
12
VDDA
13
VREFH
14
VREFL
15
VSSA
16 PTA19 33
RESET_B 34
PTB0_LLWU_P5 35
PTB1 36
PTB2 37
PTB3 38
PTB16 39
PTB17 40
PTB18 41
PTB19 42
PTC0 43
PTC1_LLWU_P6 44
PTC2 45
PTC3_LLWU_P7 46
VSS_3 47
VDD_3 48
PTC10 55
PTC11_LLWU_P11 56
PTC5_LLWU_P9 50
PTD7 64
PTD6_LLWU_P15 63
PTD5 62
PTD4_LLWU_P14 61
PTD3 60
PTD2_LLWU_P13 59
PTD1 58
PTD0_LLWU_P12 57
PTC9 54 PTC8 53 PTC7 52
PTC6_LLWU_P10 51
PTC4_LLWU_P8 49
VSS_2
31
DAC0_OUT_CMP1_IN3_ADC0_SE23
18
XTAL32
19
EXTAL32
20
VBAT
21
PTA0
22
PTA1
23
PTA2
24
PTA3
25
PTA4_LLWU_P3
26
PTA5
27
PTA12
28
PTA13_LLWU_P4
29
VDD_2
30
VREF_OUT_CMP1_IN5_CMP0_IN5_ADC1_SE18
17
PTA18
32
TMS/SWDIO_K22
FROM
USB HUB
C174
NP
R360
10.0k

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Specifications in this document are tentative and subject to change.
For the M33 processor only, the connector J31 is available to access the Embedded Trace Macrocell (ETM)
module via a standard 20-pin high density connector. A J-Link Trace debug probe can be connected to J31 for
this purpose.
Please notice that TRACE_DATA_1 and TRACE_DATA_3 are used for buttons K1 and K2.
4.4 Audio Codec section
Figure 13: Audio section schematic
DA1470x is equipped with the DA7218 a powerful audio codec with a stereo DAC to headphone output and it
contains two analog MIC input paths and two PDM channels.
Figure 12: J-Trace connector for M33

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Specifications in this document are tentative and subject to change.
In this development kit there a placeholder for a digital MIC1 that is not populated by default as shown in
Figure 13. The power domain of the DA7218 is GPIO controlled via two power switches for optimum power
consumption.
All digital signals between DA1470x and Audio Codec are controlled and can be disabled by an analog switch
(U8), this switch is controlled by DA170x’s GPIO P028 connected to DA_PWRON signal alias as shown in
Figure 14.
Figure 14: Analog Switch (U8) used to isolate the Digital Audio interface
Notice: On DA14706 PRO-Development kit, there is no capability to connect a PDM microphone directly to
DA1470x. However, this can be realized by plugging an external PDM microphone break out on break out
headers.
4.5 Expansion SPI Connector
Figure 15: Expansion SPI connector (J27)

DA14706 Devkit User Manual Rev.1.00.93 Page 17 of 58
Preliminary document
Specifications in this document are tentative and subject to change.
The SPI signals that can be utilized by the J27 connector are either SPI1/SPI2 (up to 24MHz, Master/Slave) or
SPI3 controller (up to 48MHz, master only).
4.6 Voltage level translation (debugging) section
Voltage translation is required because the DA1470x I/O voltage will vary depending on the battery level and
setting for the I/O LDO. So, if the other side (on board interfaces, JTAG / UART) is fixed at 3.3V, there will be
leakage through the pins, e.g. if the DA1470x voltage I/Os are for example at 3.0V or less.
Table 1: Signals with level translation
Pin name
Signal name
P00
SWDIO1 (Μ33)
P01
SWCLK1 (Μ33)
P02
SWDIO2 (SNC)
P03
SWCLK2 (SNC)
P08
UTX
P201
URX
P011
URTS
P029
UCTS
Figure 16: Voltage Level Translation Circuit

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Specifications in this document are tentative and subject to change.
▪Voltage translation is applied to the UART and JTAG signals. The voltage translation is from 3.3 V to
VDDIO and vice versa
▪In the SWDIO signals the voltage conversion is made from 3.3V to VDDIO (=V30 by default) VDDIO can
be trimmed to lower voltage by populating R148
▪VDDIO is generated from U1, where V30 from PRO-daughterboard is used as a reference. Consequently,
there is no additional power consumption on the power circuitry of DA14706 PRO-Motherboard due to
voltage translation
4.7 Push Buttons
▪There are two available push buttons, K1 and K2 on DA14706 PRO-Motherboard
▪Push buttons are connected to the DA1470x PRO daughterboard for getting user actions by the
Application Software K1 button is connected to GPIO signal P122 which is shared with J-trace connector
signal TRACE_DATA_1
▪K2 button is connected to GPIO signal P123 which is shared with J-trace connector signal
TRACE_DATA_3
▪Jumpers at connector J35 should be mounted
Figure 17: Push Buttons used in the DA1470x PRO-Motherboard

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Specifications in this document are tentative and subject to change.
4.8 GPIO assignment
Table 2: DA14706 PRO-Development kit GPIO pin assignment
DA1470x GPIO
Pin Name
GPIO assignment
Comments
P0_00
M33_SWDIO
Available on J4 of PRO-
Daughterboard
P0_01
M33_SWDCLK
Available on J4 of PRO-
Daughterboard
P0_02
SNC_SWDIO
P0_03
SNC_SWDCLK
P0_04
MikroBUS-BRSTn(1)
Multiplexed with CMAC_SWDIO,
QSPIC_ON
P0_05
MikroBUS-(1)
P0_06
MikroBUS-A(2)/TRIG_0
Multiplexed with TRIG_0
P0_07
MikroBUS-BRSTn(2)
CMAC_SWDCLK
P0_08
UART Tx (Output)
Available on J4 of PRO-
Daughterboard
P0_09
SPI MISO
MikroBUS SPI MISO
P0_10
LCD_TE
LCD_TE signal
P0_11
UART CTSn (input) /NTC supply
Multiplexed GPIO
P0_12
DA_DI
DA7218 data
P0_13
DA_BCLK
DA7218 BCLK
P0_14
SPI SCK
MikroBUS SPI SCK
P0_15
SPI MOSI
MikroBUS SPI MOSI
P0_16
MikroBUS-RX(2) / LCD_SPI_SD1
Multiplexed GPIO
P0_17
MikroBUS-TX(2) /LCD_SPI_SD3/TRIG_1
Multiplexed GPIO
P0_18
MikroBUS-CS(2) / LCD_CS / TRIG_2
Multiplexed GPIO
P0_19
MikroBUS CS(1) / EXTCOMIN
Multiplexed GPIO
P0_20
DA_MCLK
MCLK of DA7218 codec
P0_21
MIC_PWR1 / TRIG_3
TRIG_3/ Analog MIC supply
P0_22
MikroBUS-RX(1) / LCD_SPI_SD2
Multiplexed GPIO

DA14706 Devkit User Manual Rev.1.00.93 Page 20 of 58
Preliminary document
Specifications in this document are tentative and subject to change.
DA1470x GPIO
Pin Name
GPIO assignment
Comments
P0_23
MikroBUS-INT(1) / LCD_RED1
Multiplexed GPIO
P0_24
MikroBUS-INT(2) / LCD_GREEN0
Multiplexed GPIO
P0_25
eMMC_CLK / P025x
eMMC daughterboard, dual
usage GPIO described in 4.11
P0_26
eMMC_CMD / P026x
eMMC daughterboard, dual
usage GPIO described in 4.11
P0_27
DA_INT
DA7218 interrupt signal
P0_28
DA_PWRON
Controls the power switches of
the DA7218 voltage domains
P0_29
RTSn (output) / NTC_Sence
P0_30
DA_WCLK/TRIG_4
DA7218 WCLK signal
P0_31
TRACE_CLK / TRIG_5
Multiplexed GPIO
P1_00
MikroBUS-PWM(1) / LCD_GREEN1/
QSPIC2_ON
Multiplexed GPIO
P1_01
MikroBUS-PWM(2) / LCD_BLUE0
Multiplexed GPIO
P1_02
eMMC_D0 / P102x
eMMC module, dual usage
GPIO described in 4.11
P1_03
TP_INT
Interrupt pin of the LCDs touch
controller
P1_04
DA_DO
DA7218 data out
P1_05
PGAp
MIC+
P1_06
PGAm
MIC-
P1_07
MikroBUS-TX(1) / LCD_FRP /
LCD_PWR_EN
Multiplexed GPIO
P1_08
eMMC_D3 / P108x
eMMC module, dual usage
GPIO described in 4.11
P1_09
FL_D0 / eMMC_D2
SPI_FLASH multiplexed with
eMMC module, dual usage
GPIO described in 4.11
P1_10
eMMC_D1
eMMC module, dual usage
GPIO described in 4.11
P1_11
I3C SDA
I3C data signal