Renesas 8V97003 User manual

8V97003 EVB Manual
© 2020 Renesas Electronics Corporation
1
January 10, 2020
Description
The 8V97003 evaluation board is designed to enable customers to
evaluate the functionality and performance of the 8V97003
RF/Microwave Wideband Synthesizer. The 8V97003 device on the
evaluation board can be programmed and configured via a PC-
based GUI, called Timing Commander, to generate output
frequency from 187.5MHz to 18GHz with very low phase noise and
RMS phase jitter.
This document discusses the setup of the EVB, and the
programming of the 8V97003 using Timing Commander.
Kit Contents
8V97003 Evaluation Board
Micro USB Cable
Required Software
IDT Timing Commander Software Installer (available at
www.idt.com/timingcommander)
Network access during installation if the .NET framework
is not currently installed on the system
8V97003 GUI (available at www.idt.com/8V97003)
USB 2.0 or USB 3.0 interface
8V97003 Evaluation Board

8V97003 EVB Manual
© 2020 Renesas Electronics Corporation
2
January 10, 2020
Important Notes
Disclaimer
Integrated Device Technology, Inc. and its affiliated companies (herein referred to as “IDT”) shall not be liable for any damages arising out
of defects resulting from
(i) delivered hardware or software
(ii) non-observance of instructions contained in this manual and in any other documentation provided to user, or
(iii) Misuse, abuse, use under abnormal conditions, or alteration by anyone other than IDT.
TO THE EXTENT PERMITTED BY LAW, IDT HEREBY EXPRESSLY DISCLAIMS AND USER EXPRESSLY WAIVES ANY AND ALL
WARRANTIES, WHETHER EXPRESS, IMPLIED, OR STATUTORY, INCLUDING, WITHOUT LIMITATION, IMPLIED WARRANTIES OF
MERCHANTABILITY AND OF FITNESS FOR A PARTICULAR PURPOSE, STATUTORY WARRANTY OF NON-INFRINGEMENT, AND
ANY OTHER WARRANTY THAT MAY ARISE BY REASON OF USAGE OF TRADE, CUSTOM, OR COURSE OF DEALING.
Important Equipment Warning:
Ensure the correct connection of all cables. Supplying the board using the wrong
polarity could result in damage to the board and/or the equipment. Check that all jumpers have been removed from the
board before applying power.
!

8V97003 EVB Manual
© 2020 Renesas Electronics Corporation
3
January 10, 2020
Contents
1. Hardware Setup............................................................................................................................................................................................5
1.1 Evaluation Board Overview .................................................................................................................................................................5
1.2 Required Equipment............................................................................................................................................................................6
Power Supply .......................................................................................................................................................................6
Signal Generator ..................................................................................................................................................................6
Phase Noise Analyzer/Spectrum Analyzer...........................................................................................................................6
Balun ....................................................................................................................................................................................6
PC.........................................................................................................................................................................................6
1.3 Hardware Connection..........................................................................................................................................................................7
1.4 Power-up Procedures..........................................................................................................................................................................7
2. Working with Timing CommanderTM for Programming/Configuration...........................................................................................................8
2.1 Opening an Existing Configuration......................................................................................................................................................8
2.2 Making Changes to an Existing Configuration...................................................................................................................................10
2.3 Creating a New Configuration ...........................................................................................................................................................11
3. Performance Evaluation with the 8V97003 EVB ........................................................................................................................................12
3.1 Output Matching ................................................................................................................................................................................12
3.2 AC-coupling Capacitor.......................................................................................................................................................................13
3.3 Termination........................................................................................................................................................................................13
3.4 Transmission Line Loss.....................................................................................................................................................................13
4. Schematics.................................................................................................................................................................................................15
5. Bill of Materials (BOM)................................................................................................................................................................................18
6. Board Layout ..............................................................................................................................................................................................20
7. Ordering Information...................................................................................................................................................................................20
Appendix A – New Configuration Examples........................................................................................................................................................21
Example 1 – New Configuration for Integer Mode of Operation.................................................................................................................21
Example 2 – New Configuration for Fractional Mode of Operation ............................................................................................................24
Appendix B – Input Reference Phase Noise Performance..................................................................................................................................28
Revision History...................................................................................................................................................................................................29

8V97003 EVB Manual
© 2020 Renesas Electronics Corporation
4
January 10, 2020
List of Figures
Figure 1. Evaluation Board Overview .................................................................................................................................................................5
Figure 2. Starting Up Timing Commander GUI...................................................................................................................................................8
Figure 3. Open Settings File Dialog Box.............................................................................................................................................................8
Figure 4. Connect to the 8V97003......................................................................................................................................................................9
Figure 5. Program the 8V97003 .........................................................................................................................................................................9
Figure 6. Input Configuration Settings ..............................................................................................................................................................10
Figure 7. Feedback Divider Settings.................................................................................................................................................................10
Figure 8. “Locked” Settings View in “Bit Sets” Tab...........................................................................................................................................10
Figure 9. New Settings GUI..............................................................................................................................................................................11
Figure 10. 8V97003 Output Power over Frequencies – Resistive vs. Inductive Matching .................................................................................12
Figure 11. Transmission Line Loss – 8V97003 EVB Revision D........................................................................................................................14
Figure 12. Transmission Line Loss – 8V97003 EVB Revision C........................................................................................................................14
Figure 13. Evaluation Board Schematic – Page 1 ..............................................................................................................................................15
Figure 14. Evaluation Board Schematic – Page 2 ..............................................................................................................................................16
Figure 15. Evaluation Board Schematic – Page 3 ..............................................................................................................................................17
Figure 16. Evaluation Board – Top Layer...........................................................................................................................................................20
Figure 17. Evaluation Board – Second Layer .....................................................................................................................................................20
Figure 18. Evaluation Board – Third Layer.........................................................................................................................................................20
Figure 19. Evaluation Board – Bottom Layer......................................................................................................................................................20
Figure 20. Timing Commander GUI for Creating New Integer Mode Configuration ...........................................................................................22
Figure 21. Expected Performance of 8110.08MHz Output from Example 1.......................................................................................................23
Figure 22. Timing Commander GUI for Creating New Fractional Mode Configuration.......................................................................................25
Figure 23. Expected Performance of 8200MHz Output without Bleeder Current from Example 2.....................................................................26
Figure 24. Expected Performance of 8200MHz Output with 1.1mA of Bleeder Current from Example 2...........................................................27
Figure 25. Phase Noise Performance of 245.76MHz Input Reference Clock.....................................................................................................28
List of Tables
Table 1. Evaluation Board Connection Descriptions .........................................................................................................................................7
Table 2. Evaluation Board BOM......................................................................................................................................................................18

8V97003 EVB Manual
© 2020 Renesas Electronics Corporation
5
January 10, 2020
1. Hardware Setup
This section provides an overview of the different components on the evaluation board. In addition, it discusses the necessary bench equipment,
the hardware connection, and the power-up sequence.
1.1 Evaluation Board Overview
The following diagram identifies various components of the board: power supply jacks, input and output SMA connectors, USB interface port,
and lock indicator LED.
Figure 1. Evaluation Board Overview
Detailed descriptions of these components are as follows (clock-wise from upper left):
Power supply (Banana) jacks: +5V DC at J10, GND at J11
PCB layout revision: For RF Transmission Line Loss information
Reference clock input SMA connectors: Use J6 and J8 for differential reference clock input; use J6 for single-ended reference clock input
•Maximum Vpp = 3.3V
•f_max = 1000MHz when input reference doubler is disabled
•f_max = 250MHz when input reference doubler is enabled
Lock detect LED: LED indicator of PLL Lock status
RF_OUTB/nRF_OUTB output SMA connectors: differential RF/Microwave outputs at J3, J4
RF_OUTA/nRF_OUTA output SMA connectors: differential RF/Microwave outputs at J1, J2
SYNC input: J16

8V97003 EVB Manual
© 2020 Renesas Electronics Corporation
6
January 10, 2020
Reset push button: SW1
Micro USB: J12
1.2 Required Equipment
Several pieces of bench equipment are required for the evaluation of the 8V97003. This section describes the functions of the required
equipment.
Power Supply
The evaluation board uses a single +5V DC supply for its power supply. When running the board, set the bench power supply at 5V/1A. The
+5V terminal is connected to J10, and the Ground terminal is connected to J11. Multiple LDOs on board are used to generate 3.3V to the
8V97003.
Signal Generator
A signal generator is necessary to generate the reference clock to the 8V97003. A single-ended reference clock is connected to J6, while J8
can be left unconnected. When a differential reference clock is available, connect them to J6 and J8.
Oscillators such as Oven Controlled Oscillators (OCXO) from Wenzel Associates, Inc. can also be used to generate a reference clock to the
8V97003. Some examples of these Wenzel Oscillators are the VHF ULN OCXO (for frequencies from 15MHz to 160MHz) or MXO-FR OCXO
(for frequencies greater than 200MHz). However, a signal generator is recommended for the flexibility to experiment with different reference
clock frequencies.
Phase Noise Analyzer/Spectrum Analyzer
A phase noise analyzer is necessary to evaluate phase noise performance of the 8V97003. A spectrum analyzer is required to evaluate
harmonic performance. Both of these pieces of equipment have (output) power measurement capability.
Balun
Balun is optional. A balun can be used to convert single-ended output of a signal generator to differential output which is used to provide a
reference clock to the 8V97003. Another balun can be used to combine the differential outputs of the 8V97003 to a single-ended signal for
measurement with a phase noise analyzer/spectrum analyzer.
PC
A PC is required to run the IDT Timing Commander GUI.

8V97003 EVB Manual
© 2020 Renesas Electronics Corporation
7
January 10, 2020
1.3 Hardware Connection
Complete the following procedures to set up the evaluation board:
1. Without connecting the bench power supply to the EVB, turn on the bench power supply to make sure the output voltage and current clamp
are set to +5V/1A respectively. Then turn off the bench power supply.
2. Connect the bench power supply to the EVB: +5V to J10, GND to J11
3. Connect the Signal Generator’s output to J6 if single-ended reference input clock configuration is desired. If differential reference input
clock configuration is desired, connect the Signal Generator’s output to a balun’s unbalanced port, then connect the balun’s balanced ports
to J6 and J8.
4. Connect the RF outputs to measurement equipment.
5. Terminate unused outputs.
6. Connect micro-USB cable: micro-B end of the cable is connected to J12, A-plug is connected to PC.
Table 1. Evaluation Board Connection Descriptions
Equipment Type Connection on EVB Description
(DC) Power Supply +5V at J10 / GND at J11 5V/1A power supply
Signal Generator J6 for single-ended) /
balun for differential) Reference clock input to 8V97003
Phase Noise Analyzer J1, J2, J3, J4 Measure phase noise at RF outputs
Spectrum Analyzer J1, J2, J3, J4 Measure output power or harmonic performance at RF outputs
Balun (Macom H-183-4) J6, J8 Differential reference clock input to 8V97003
Balun (Marki BAL 0026) J1, J2, J3, J4 Convert differential outputs to single-ended signal for measurements
Micro-USB J12
1.4 Power-up Procedures
Complete the following steps to power up the evaluation board once the “Hardware Connection” have been completed:
1. Turn the bench power supply on. Initial current consumption of the whole EVB should be around 500mA.
2. Set the reference clock input frequency and amplitude on the Signal Generator – enable Signal Generator output.
3. Program the 8V97003 using IDT’s Timing Commander GUI.

8V97003 EVB Manual
© 2020 Renesas Electronics Corporation
8
January 10, 2020
2. Working with Timing CommanderTM for Programming/Configuration
2.1 Opening an Existing Configuration
When a customer’s user case information is provided to IDT prior to when the EVB is sampled, an optimized configuration is usually provided
to the customer for the evaluation. Complete the following procedure to open a setting file:
1. Power up the evaluation board.
2. Start the Timing Commander software. You will see options of “New Setting File” and “Open Setting File”. Select “Open Setting File”.
Figure 2. Starting Up Timing Commander GUI
3. At the “Open Settings File” dialog box, browse to select the setting file (*.tcs) and the personality file (*.tcp), then click “Open.”
Figure 3. Open Settings File Dialog Box

8V97003 EVB Manual
© 2020 Renesas Electronics Corporation
9
January 10, 2020
4. The GUI window with the 8V97003 block diagram will open to show the existing configuration; all configured values will be displayed. In
order to connect the board with Timing Commander (PC) and to set up the communication interface, click the “Connect” button (chip
symbol) at the upper right corner of the GUI.
The connection will be established if a valid 8V97003 is detected, and a green band appears at the upper right corner of the GUI window.
Figure 4. Connect to the 8V97003
5. Click “Write All” to program the 8V97003.
Figure 5. Program the 8V97003
6. The 8V97003 is now configured. If the lock detection function is properly configured, the Lock Detect LED should lit once PLL locked status
is achieved. The output frequency displayed in the Desired REF_OUTA/B box should also be available for measurements.

8V97003 EVB Manual
© 2020 Renesas Electronics Corporation
10
January 10, 2020
2.2 Making Changes to an Existing Configuration
When changes to an existing configuration are necessary, make sure none of the settings in the affected signal path is locked as to allow the
GUI to make appropriate calculation for optimal settings. A locked setting is indicated by a white lock symbol in a red box ( ). Complete steps
1 to 3 in “Opening an Existing Configuration” before making changes to the existing configuration.
For example, when changing the input reference frequency, make sure the input doubler enable and the input reference divider settings are
unlocked, as shown in Figure 6.
Figure 6. Input Configuration Settings
Another example is when changing the desired output frequency, make sure the Feedback Divider settings are unlocked, as shown in Figure
7.
Figure 7. Feedback Divider Settings
A quick way to view all “Locked” settings in an existing configuration is to select “Locked” option in “Bit Sets” tab, as shown in Figure 8.
Figure 8. “Locked” Settings View in “Bit Sets” Tab