Samsung SGH-C200 User manual

SGH-C200
SERVICE
Manual
GSMTELEPHONECONTENTS
1.Specification
2.Circuit Description
3. ExplodedViews and PartsList
4. ElectricalPartsList
5.BlockDiagrams
6.PCB Diagrams
7. FlowChartofTroubleshooting
GSMTELEPHONE

ELECTRONICS
Samsung ElectronicsCo.,Ltd.APRIL.2004
Printedin Korea.
CodeNo.:GH68-05417A
BASIC.
ⓒ
T
hisServiceManual isa propertyofSamsung ElectronicsCo.,Ltd.
A
nyunauthorized use ofManualcan bepunished underapplicable
I
nternationaland/ordomesticlaw.

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1. SGH-C200 Specification
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1-1
GSM900
Phase1EGSM900 Phase2DCS1800 Phase1
Freq.Band[MHz]
Uplink/Downlink 890~915 935~960 880~915 925~960 1710~1785 1805~1880
ARFCNrange1~124 0~124 &975~1023 512~885
Tx/Rxspacing 45MHz45MHz95MHz
Mod.Bit rate/
Bit Period 270.833kbps 3.692us270.833kbps 3.692us270.833kbps 3.692us
TimeSlot
Period/FramePeriod 576.9us 4.615ms576.9us 4.615ms576.9us 4.615ms
Modulation 0.3GMSK0.3GMSK0.3GMSK
MS Power33dBm~13dBm33dBm~5dBm30dBm~0dBm
PowerClass 5pcl~15pcl5pcl~19pcl0pcl~15pcl
Sensitivity-102dBm-102dBm-100dBm
TDMAMux 8 8 8
Cell Radius35Km35Km2Km
1. GSMGeneralSpecification

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Specification
1-2
TXPower
control levelGSM900
5 33±2 dBm
6 31±2 dBm
7 29±2 dBm
8 27±2 dBm
9 25±2 dBm
10 23±2 dBm
11 21±2 dBm
12 19±2 dBm
13 17±2 dBm
14 15±2 dBm
15 13±2 dBm
16 11±3 dBm
17 9±3dBm
18 7±3 dBm
19 5±3 dBm
TXPower
control levelDCS1800
0 30±2 dBm
1 28±3 dBm
2 26±3 dBm
3 24±3 dBm
4 22±3 dBm
5 20±3 dBm
6 18±3 dBm
7 16±3 dBm
8 14±3 dBm
9 12±4 dBm
10 10±4 dBm
11 8±4dBm
12 6±4 dBm
13 4±4 dBm
14 2±5 dBm
15 0±5 dBm
2. GSMTXpower class

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2. SGH-C200 Circuit Description
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2-1
1.SGH-C200 RFCircuit Description
1)RXPART
1.ASM(U1007)→Switching Tx,Rx pathforEGSM900,and DCS1800 by logic controlling.
2.ASMControlLogic(U1007)→TruthTable
VC1VC2
DCS/PCSTxModeHL
GSMTxModeLH
GSM/DCSRxModeL L
3.FILTER
ToconvertElectromagneticFieldWavetoAcousticWave and then pass thespecificfrequency band.
-GSMFILTER(C905,L903)→For filtering thefrequency band between 925 ~960 MHz
-DCS FILTER(C919,L907)→For filtering thefrequency band 1805 ~1880 MHz.
4.TC-VCXO (OSC900)
To generatethe13MHzreference clockto drivethelogic and RF.
Afteradditionalprocess,thereference clockappliestotheU900 RxIQdemodulatorand TxIQmodulator.
Theoscillator forRXIQdemodulatorand Txmodulatorare controlled by serialdatatoselectchanneland usefast lock
modeforGPRShigh class operation.
5.SI4206 (U900)
Thischipintegratestwo differential-inputLNAs.
TheGSMinputsupportstheE-GSM,DCSinputsupportstheDCS1800.TheLNA inputsarematchedtothe200 ohm
differentialoutputSAWfiltersthrough eternalLCmatching network.
Image-rejectmixerdownconvertstheRFsignal toa100 KHzintermediatefrequency(IF)withtheRFLOfromfrequency
synthesizer.TheRFLOfrequencyisbetween 1737.8~1989.9MHz.
TheMixeroutput isamplifiedwithananalog programmablegainamplifier(PGA),whichiscontrolled by AGAIN.
ThequadratureIFsignal isdigitizedwith high resolution A/Dconverts(ADC).
Also,thischip down-convertstheADCoutput to baseband withadigital100 KHzquadratureLOsignal.Digital
decimation and IIRfiltersperformchannelselection toremoveblocking and reference interface signals.
Afterchannelselection,thedigitaloutput is scaledwithadigitalPGA,whichiscontrolledwiththeDGAIN.DACsdrive
adifferentialanalog signalontotheRXIP,RXIN,RXQP,RXQN pinstointerface tostandardanalog-inputbaseband IC.

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CircuitDescription
2-2
2)TXPART
Baseband IQsignalfedinto offsetPLL,thisfunction isincludedinsideofU900 chip.
SI4206 chip generatesmodulatorsignalwhich powerlevel isabout1.5dBmand fedintoPowerAmplifier(U100).
ThePAoutputpowerand power ramping arewell controlled by AutoPowerControlcircuit.WeuseoffsetPLL below
Modulation Spectrum
200kHzoffset
30 kHzbandwidth
GSM-35dBc
DCS-35dBc
400kHzoffset
30 kHzbandwidth
GSM-66dBc
DCS-65dBc
600kHz~1.8MHzoffset
30 kHzbandwidth
GSM-75dBc
DCS-68dBc
2. Baseband CircuitdescriptionofSGH-C200
1)CSP2200B1
1.Power Management
Sevenlow-dropoutregulatorsdesignedspecificallyforGSMapplicationspowertheterminaland helpensureoptimal
systemperformance and long batterylife.AprogrammableLDO provides supportfor1.8V,3.0VSIMs,while a
self-resetting,electronicallyfusedswitchsuppliespowertoexternalaccessories.Ancillarysupportfunctions,suchastwo
LEDdriversand twocall-alertdrivers,aidinreducing both boardarea and systemcomplexity.Afour-wireserial interface
unit(SIU)providesaccess tocontroland configuration registers.Thisinterface givesamicroprocessor full controlofthe
CSP2200B1and enables systemdesignerstomaximize bothstandby and talktimes.Error reporting isprovided via an
interruptsignaland statusregister.Supervisoryfunctions.including aresetgenerator,aninputvoltagemonitor,and a
thermalmonitor,supportreliablesystemdesign.Thesefunctionsworktogethertoensurepropersystembehaviorduring
start-up orinthe eventofafault condition(lowmicroprocessorvoltage,insufficientbatteryenergy,orexcessivedie
temperature).
2.BatteryChargeManagement
Abatterychargemanagementblock,incorporating aninternalPMOSswitch,and an 8-bit ADC,providesfast,efficient
charging ofsingle-cell Li-Ion battery.Usedinconjunction witha current-limited voltagesource,thisblocksafely
conditionsnear-deadcellsand providestheoption ofhaving fast-charge and top-off controlledinternally orby thesystem's
microprocessor.
3.BacklightLED Driver
ThebacklightLEDdriverisalow-side,programmable currentsource designedtocontrol thebrightness ofthekeyboard
illumination.LED1_DRViscontrolled viaLED1_[0:2]and can beprogrammedtosink from15mAto 60mAin 7.5mA
steps.LED2_DRViscontrolled viaLED2_[0:2]and can beprogrammedtosink from5mAto 40mAin 5mAsteps.

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CircuitDescription
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2-3
BothLEDdriversare capableofsinking theirmaximumoutputcurrentataworst-casemaximumoutputvoltageof0.6V.
Forefficientuse,theLEDsisconnected betweenthebatteryand theLED_DRVoutput.
4.VibratorMotorDriver
Thevibratormotordriverisaindependentvoltageregulatorto driveasmall dcmotorthatsilentlyalertstheuserofan
incoming call.Thedriverisa3.0Vconstantsource whilesinking up to 180mAand controlledbyenablesignalofmain
chip.Forefficientuse and safety,thevibratormotorshould be connected betweentheregulatoroutputand theground.
2)Connector
1.LCD Connector
LCDisconsisted ofmainLCD(color65KSTNLCD).ChipselectsignalsofEMIpart inthetrident,LCD_CS,can
enablemainLCD.LED+signalenableswhiteLEDofmainLCD.Insleepmode,whiteLEDareturned off.
ThesetwosignalsarefromIOpartoftheDSP inthetrident.RSTsignalfromCSP2200B1initiatestheinitialprocess of
theLCD.
16-bit datalines(D(0)~D(15)) transfersdata and commandstoLCDthrough emi_filter.Data and commandsuseA(2)signal.
If this signal ishigh,InputstoLCDare commands.If it islow,InputstoLCDaredata.
ThesignalswhichinformtheinputoroutputstatetoLCD,arerequired.But this systemisnotnecessaryfor readenable
signal.CP_WENsignal isonly usedtowritedataorcommandstoLCD.
Powersignalforoperating LCDdriverisVCCD.
2.JTAGConnector
TridenthastwoJTAG portswhichareforARMcore and DSP core(DSP16000).Sothis systemhastwo portconnector
fortheseports.Pins'initialsforARMcore are'CP_' and pins'initialsforDSP core are'DSP_'.
CP_TDIand DSP_TDIsignalareusedforinputofdata.CP_TDO and DSP_TDO signalsareusedfortheoutputofthe
data.CP_TCKand DSP_TCKsignalsareusedforclock becauseJTAG communication isasynchronous.CP_TMSand
DSP_TMSsignalsaretestmodesignals.Thedifference betweentheseistheRESET_INTsignalwhichisforARMcore
RESET.
3.Keypadconnector
Thisisconsisted ofkeyinterface pinsinthetrident,KEY_ROW[0~4]and KEY_COL[0~4].Thesesignalscomposethe
matrix.Result ofmatrixinformsthekeystatusto keyinterface inthetrident.Somepinsare connectedto varistor for
ESDprotection.And poweron/off keyis seperatedfromthematrix.
So poweron/off signal isconnectedwithCSP2200 toenableCSP2200.
NinekeyLEDusethe +VBATT supply voltage.These are connectedtoBACKLIGHTsignal intheCSP2200.
This signalenablesLEDswithcurrentcontrol.

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CircuitDescription
2-4
4.EMIFiltering
This systemusestheEMIFiltertoreduce noisefromLCDpart.Some controlsignalsare connectedtoLCD withoutEMI
filtering.
3)IFconnetor
It is24-pinconnector,and separatedintotwo parts.Oneisapowersupply partformainsystem.And theotheris
designedto useSDS,DEBUG,DLC-DETECT,JIG_ON,VEXT,VTEST,VF,and GND.Theyconnectedto powersupply
IC,microprocessorand signalprocessor IC.
4)Audio
AOUTAP,AOUTAN fromCSP2200 isconnectedtothespeakervia analog switch.AOUTBPand AOUTBNare connected
tothe ear-micspeakervia ear-jack.MICINand MICOUTare connectedtothemainMIC.And AUXINand AUXOUT
are connectedtotheEar-mic.
YMU762MA3isaLSI forportabletelephonethat iscapableofplaying high qualitymusicby utilizing FMsynthesizer
and ADPCMdecorderthatareincludedinthisdevice.
Asasynthesis,YMU762MA3isequipped 16 voiceswith different tones.Since thedevice iscapableofsimultaneously
generating up tosynchronouswiththeplay oftheFMsynthesizer,various sampled voicescan beusedas sound effects.
Since theplay dataofYMU762MA3areinterpretedatanytimethrough FIFO,thelength ofthedata(playing period)isnot
limited,sothedevice canflexiblysupportapplication suchasincoming call melody musicdistribution service.The
hardwaresequencerbuilt inthisdevice allowsplaying ofthe complexmusicwithoutgiving excessiveloadtotheCPUof
theportabletelephones.Moreover,theregistersoftheFMsynthesizercan beoperated directlyfor real timesound
generation,allowing,forexample,utilization ofvarious sound effectswhen using thegamesoftwareinstalledinthe
portabletelephone.
YMU762 includesaspeakeramplifierwith high rippleremovalratewhosemaximumoutput is550mW(SPVDD=3.6V).
Thedevice isalsoequippedwithconventionalfunction including avibartorand a circuit forcontrolling LEDs synchornous
withmusic.
Fortheheadphone,it isprovidedwithastereophonicoutput terminal.
Forthepurposeofenabling YMU762MA3to demonstrateitsfull capabilities,Yamahapurposeto use"SMAF:Synthetic
musicMobileApplication Format"asadatadistribution format that iscompatiblewithmultimedia.Since theSMAFtakes
astructurethatsetsimportance on thesynchronization betweensound and images,variouscontentscan bewrittenintoit
including incoming call melody withwordsthatcan beusedfortraining karaoke,and commercialchannel thatcombines
texts,imagesand sounds,and others.ThehardwaresequencerofYMU762MA3 directlyinterpretsand playsblocks
relevant tosynthesis(playing music and reproducing ADPCMwithFMsynthesizer) thatareincludedin datadistributedin
SMAF.

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CircuitDescription
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2-5
5)Memory
This systemusesFUJITSU'smemory,MB84VP24491HK.
It isconsisted of128Mbitsflashmemoryand 32MbitsFCRAM.Ithas16 bit dataline,D[0~15]whichisconnectedto
trident,LCDorCSP2200.Ithas22 bit address lines,A[1~22].Theyare alsoconnected.CP_CSROMENsignal,chip
selectsignal inthetrident,enableflashmemories.They use3 volt supply voltage,VCCD.
During wrting process,CP_WENislowand it enableswriting process toflashmemoryand FCRAM.During reading
process,CP_OENislowand it output information whichislocatedat the address fromthetrident intheflashmemory or
FCRAMto datalines.Eachchipselectsignalsinthetridentselectflashmemory orSCRAM.Reading orwriting
procedureisprocessedafterCP_WENorCP_OENisenabled.MemoriesuseFLASH_RESET,whichisbufferedsignalof
RESET fromCSP2200,forESDprotection.A[0]signalenableslowerbyteofFCRAMand UPPER_BYTE signalenables
higherbyteofFCRAM.
6)Trident
Trident isconsisted ofARMcore and DSP core.Ithas20K*16bitsRAM144K*16bitsROMintheDSP.Ithas
4K*32bitsROMand 2K*32bitsRAMintheARMcore.DSP isconsisted oftimer,onebit input/outputunit(BIO),JTAG,
EMIand HDS(HardwareDevelopmentSystem).ARMcoreisconsisted ofEMI,PIC(ProgrammableInterruptController),
reset/power/clock unit,DMAcontroller,TIC(TestInterface Controller),peripheralbridge,PPI,SSI(SynchronousSerial
Interface),ACCs(Asynchronouscommunicationscontrollers),timer,ADC,RTC(Real-TimeClock)and keyboardinterface.
DSP_AB[0~8],address linesofDSP core and DSP_DB[0~15],datalinesofDSP core are connectedtoCSP2200.A[0~20],
address linesofARMcore and D[0~15],datalinesofARMcore are connectedtomemory,LCDand YMU762.
ICP(InterprocessorCommunication Port)controlsthe communication betweenARMcore and DSP core.
CSROMEN,CSRAMENand CS1NtoCS4NintheARMcore are connectedtoeachmemory.WENand OENcontrol the
process ofmemory.ExternalIRQ(InterruptReQuest)signalsfromeach units,suchas,YMU,Ear-jack,Ear-mic and
CSP1093,needthe compatibleprocess.
SomePPIpinshasmany specialfunctions.CP_KB[0~9] receivethestatusfromkeyFPCB and areusedforthe
communicationsusing datalink cable(DEBUG_DTR/RTS/TXD/RXD/CTS/DSR).
And UP_CS/SCLK/SDI,controlsignalsforCSP2200 areoutputtedthrough PPIpins.Ithas signalportfor
charging(CHG_DET),SIM_RESET and FLIP_SNSwithwhichweknowsopen.closedstatusof folder.Ithas JTAG control
pins(TDI/TDO/TCK) forARMcore and DSP core.Itrecieves13MHz clockinCKIpinfromexternalTCXO and receives
32.768KHz clockfromX1RTC.ADC(Analog toDigitalConvertor) partreceivesthestatusoftemperature,batterytype and
battery voltage.And controlsignals(DSP_INT,DSP_IOand DSP_RWN) forDSP core areused.ItenablesmainLCD with
DSP IPpins.
7)CSP2200
CSP2200 isintegratedthetiming and controlfunctionsforGSM2+mobile application withtheADCand DACfunctions,
and powermanagementblock.TheCSP2200 interfacestothetrident,via a 16-bit parallel interface.Itservesasthe
interface thatconnectsaDSP totheRFcircuitryinaGSM2+mobiletelephone.DSP canload 148 bitsofburstdata
intoCSP2200’ sinternalregister,and programCSP2200’ sevent timing and controlregisterwiththe exact timetosend the

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CircuitDescription
2-6
burst.Whenthetiming portion ofthe event timing and controlregistermatchestheinternalquarter-bit counterand internal
frame counter,the148 bitsintheinternalregisterareGMSKmodulatedaccording toGSM2+standards.Theresulting
phaseinformation istranslatedintoIand Qdifferentialoutputvoltagesthatcan be connected directlytoanRFmodulator
at theTXOPand TXON pins.TheDSP isnotifiedwhenthetransmission iscompleted.For receiving baseband data,a
DSP can programCSP2200’ sevent timing and controlregisterwiththe exact timetostartreceiving Iand Qsamples
through TXIPand TXINpins.Whenthat timeisreached,the controlportion ofthe event timing and controlregisterwill
start thebaseband receivesection converting Iand Qsamplepairs.Thesamplesarestoredinadouble-bufferedregister
until theregistercontains32 samplepairs.CSP2200 then notifiestheDSP which has sampletimetoreadtheinformation
outbeforethenext32 samplepairsarestored.Thevoice band ADCconverterissuesaninterrupt totheDSP wheneverit
finishesconverting a16-bit PCMword.TheDSP thenreadsthenewinputsample and simultaneouslyloadsthevoice
band outputDACconverterwithanewPCMoutputword.Thevoice band outputcan be connected directlytoaspeaker
viaAOUTAN and AOUTAPpinsand be connectedtoaEar-micspeakerviaAOUTBNand AOUTBPpins.
There are7LDOswhicharepowersourcesofmicroprocessor,LCD,etc.These7LDOsoutputareprogrammable.
8)X-TAL(13MHz)
This systemusesthe13MHzTCXO,TCO-9141B,Toyocom.AFCcontrolsignalformCSP1093 controlsfrequencyfrom
13MHzx-tal.Itgeneratesthe clockfrequency.ThisclockisfedtoCSP1093,Trident,YMU762 and Silabsolution.

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3. SGH-C200 ExplodedViewand its Partslist
3-1
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1.CellularphoneExplodedView-1
QFR01
QSP01
QKP01
QMP01
QMO01
QLC01
QAN02
QVO01
QRE01
QRF01
QCR11
QBA21
QME01
QMI01
QIF01

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Explodedviewand its Partlist
3-2
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2.CellularphonePartslist
Location
NO.DescriptionSEC CODE Remark
QFR01 FRONTCOVER GH75-04852B
QKP01 KEYPADGH75-04858A
QMP01 MAINPBAGH92-01791A
QLC01 LCDGH07-00555A
QAN02 INTENNAGH42-00416A
QRE01 REARCOVER GH75-04854B
QME01 METALDOMEGH59-01457A
QMI01 MICROPHONEGH30-00112A
QIF01 IFCOVER GH72-14172B
QVO01 SIDEKEYGH75-04859A
QCR11 SCREW6001-001654
QBA21 BATTERYGH43-01356B
QSP01 SPEAKER 3001-001568
QRF01 RFSHEETGH74-08818B
QMO01 MOTORGH31-00103A

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Explodedviewand its Partlist
3-3
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3.TestJig(GH80-00865A)
3-1.RFTestCable
(GH39-00182A)3-2.TestCable (GH39-00127A)3-3.SerialCable
3-4.PowerSupplyCable3-5.DATACABLE
(GH39-00143B)3-6.TA
(GH44-00482A)

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4. SGH-C200 MAIN ElectricalParts List
4-1
ThisDocumentcan notbe used withoutSamsung'sauthorization
SEC Code Design LOC
0403-001387 ZD302
0403-001387 ZD401
0403-001427 ZD303
0406-001083 ZD300
0406-001083 ZD301
0406-001194 ZD803
0406-001201 ZD408
0406-001201 ZD407
0406-001201 ZD406
0406-001201 ZD405
0406-001201 ZD404
0406-001201 ZD403
0406-001201 ZD402
0504-000168 Q100
0601-001795 D801
0601-001795 D802
0601-001795 D803
0601-001795 D804
0601-001795 D805
0601-001795 D806
0601-001795 D807
0601-001795 D808
0601-001795 D809
0601-001795 D811
0801-000796 U102
1001-001294 U402
1109-001302 U500
1201-002174 U1000
1201-002176 U404
1203-002168 U403
1203-003105 U801
1203-003304 U100
1203-003389 U101
1203-003443 U200
1204-002161 U401
1205-002485 U900
1209-001219 U602
1405-001082 V301
1405-001082 V302
SEC Code Design LOC
1405-001082 V303
1405-001082 V304
1405-001082 V305
1405-001082 V410
1405-001082 V411
1405-001082 V801
1405-001082 V802
1405-001082 V803
1405-001082 V804
1405-001082 V805
1405-001082 V807
1405-001082 V809
1405-001082 V811
1405-001082 V812
1405-001082 V813
1405-001082 V814
1405-001082 V815
1405-001082 V816
1405-001093 V307
1405-001108 V401
1405-001108 V402
1405-001108 V403
1405-001108 V404
1405-001108 ZD800
1405-001108 ZD801
1405-001108 ZD802
2007-000138 R1001
2007-000140 R305
2007-000140 R306
2007-000140 R307
2007-000140 R308
2007-000140 R309
2007-000140 R310
2007-000140 R311
2007-000140 R312
2007-000140 R313
2007-000140 R314
2007-000140 R316
2007-000140 R317

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ElectricalPartsList
4-2
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SEC Code Design LOC
2007-000140 R614
2007-000142 R424
2007-000142 R418
2007-000146 R404
2007-000148 R438
2007-000148 R501
2007-000148 R504
2007-000153 R103
2007-000157 R115
2007-000157 R608
2007-000157 R600
2007-000159 R440
2007-000159 R439
2007-000162 R104
2007-000162 R106
2007-000162 R400
2007-000162 R607
2007-000162 R609
2007-000162 R610
2007-000162 R617
2007-000164 R437
2007-000167 R105
2007-000170 R441
2007-000170 R601
2007-000171 R100
2007-000171 R102
2007-000171 R201
2007-000171 R203
2007-000171 R204
2007-000171 R403
2007-000171 R421
2007-000171 R900
2007-000171 R503
2007-000171 R315
2007-000171 R818
2007-000171 R616
2007-000172 R121
2007-000172 R122
2007-000172 R442
SEC Code Design LOC
2007-000172 R443
2007-000173 R1000
2007-000174 R806
2007-000174 R807
2007-000174 R808
2007-000174 R809
2007-000174 R810
2007-000174 R811
2007-000174 R812
2007-000174 R813
2007-000174 R814
2007-000174 R817
2007-000566 R300
2007-000566 R301
2007-000566 R302
2007-000566 R303
2007-000566 R304
2007-001291 R402
2007-001291 R401
2007-001308 R902
2007-001313 R1005
2007-001317 R419
2007-001319 R101
2007-001319 R405
2007-001320 R423
2007-001320 R417
2007-001325 R416
2007-002797 R901
2007-003025 R202
2007-007134 R428
2007-007134 R422
2007-007142 R116
2007-007142 R408
2007-007142 R411
2007-007142 R425
2007-007142 R429
2007-007142 R603
2007-007308 R604
2007-007308 R605

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ElectricalPartsList
4-3
ThisDocumentcan notbe used withoutSamsung'sauthorization
SEC Code Design LOC
2007-007468 R415
2007-007468 R407
2007-007480 R435
2007-008263 R117
2203-000233 C107
2203-000233 C219
2203-000233 C502
2203-000233 C914
2203-000233 C1019
2203-000254 C1012
2203-000254 C119
2203-000254 C601
2203-000254 C602
2203-000254 C603
2203-000254 C604
2203-000254 C608
2203-000254 C610
2203-000254 C611
2203-000254 C612
2203-000254 C613
2203-000254 C917
2203-000254 C130
2203-000278 C905
2203-000330 C620
2203-000330 C619
2203-000386 C915
2203-000425 C439
2203-000438 C1010
2203-000438 C1013
2203-000438 C1014
2203-000438 C218
2203-000438 C424
2203-000585 C414
2203-000628 C438
2203-000679 C606
2203-000812 C1008
2203-000812 C104
2203-000812 C105
2203-000812 C106
SEC Code Design LOC
2203-000812 C416
2203-000812 C419
2203-000812 C420
2203-000812 C429
2203-000812 C902
2203-000812 C432
2203-000854 C302
2203-000854 C900
2203-000995 C1011
2203-000995 C1015
2203-000995 C440
2203-001017 C919
2203-001072 C101
2203-001072 C434
2203-001072 C435
2203-001405 C607
2203-001412 C916
2203-001598 C103
2203-001598 C112
2203-002687 C405
2203-002687 C1016
2203-002793 C216
2203-002793 C217
2203-002968 C1001
2203-005061 C102
2203-005061 C118
2203-005061 C121
2203-005061 C126
2203-005061 C401
2203-005061 C402
2203-005061 C406
2203-005061 C415
2203-005061 C425
2203-005061 C500
2203-005061 C501
2203-005061 C605
2203-005065 C123
2203-005065 C400
2203-005158 L1008

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ElectricalPartsList
4-4
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SEC Code Design LOC
2203-005234 C903
2203-005234 C904
2203-005234 C918
2203-005234 C920
2203-005288 C1017
2203-005480 C504
2203-005482 C100
2203-005496 C407
2203-005496 C413
2203-005496 C417
2203-005496 C428
2203-005496 C430
2203-005496 C600
2203-005496 C618
2203-005496 C910
2203-006053 C116
2203-006053 C115
2203-006053 C114
2203-006053 C113
2203-006053 C111
2203-006090 C1004
2203-006093 C110
2203-006093 C411
2203-006093 C800
2203-006190 C404
2203-006208 C422
2203-006324 C801
2203-006438 C615
2404-001105 C412
2404-001105 C436
2404-001105 C437
2404-001134 C1003
2404-001240 C109
2404-001268 C124
2404-001268 C125
2404-001268 C303
2404-001268 C408
2404-001305 C426
2503-001041 C220
SEC Code Design LOC
2503-001041 C221
2703-002170 L907
2703-002199 L903
2703-002202 L401
2703-002202 L402
2703-002204 C1007
2703-002204 L1007
2703-002205 L900
2703-002267 C1005
2703-002339 L201
2703-002367 L1005
2703-002558 L902
2703-002636 L906
2801-003856 OSC600
2801-004359 OSC900
2901-001286 F204
2901-001286 F203
2901-001286 F202
2901-001286 F201
2901-001286 F200
2904-001523 F100
2909-001216 U1007
3301-001659 L301
3404-001152 VOL_DN
3404-001152 VOL_UP
3705-001287 CON1
3709-001229 CN100
3710-001611 CN300
3711-005558 CN301
3722-002067 CN401
4302-001130 C108
GH09-00029AU600
GH41-00610A

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5. SGH-C200 BlockDiagrams
5-1
1.RFSolutionBlockDiagram
EGSMRX(925~960 MHz)
LN A
PGA
PGAADC
ADC
VCT CXO
(OSC900)
EGSMTX
(880 ~ 91 5 MHz)
DCS TX
(1710 ~ 17 85 MHz)
Dua lPAM
(U1000)
Front
End
Mod ule
(U402)
RF
Cone ctor
(N401)
Si42 05
(U404)
RF
PLL IF
PLL
PD
LPF
Mi xer
Channel
Filt er
PGA
PGADAC
DAC
100
kH z
CSP
22 00 B1
(U101)
Bryce Park
I
Q
I
Q
SDATA
SCLK
SENB
PDNB
LN A
DCSRX(1880 MHz)

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BlockDiagrams
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5-2
2.Base Band SolutionBlockDiagram

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6. SGH-C200 PCB Diagrams
6-1
1.MainPCB TopDiagram