Samsung SGH-D600 User manual

GSM TELEPHONE
SGH-D600
GSM TELEPHONE CONTENTS
1. Specification
2. Circuit Description
3. Exploded Views and Parts List
4. Electrical Parts List
5. Block Diagrams
6. PCB Diagrams
7. Flow Chart of Troubleshooting

Samsung Electronics Co.,Ltd. September. 2005
Printed in Korea.
Code No.: GH68-08500A
BASIC.
This Service Manual is a property of Samsung Electronics Co.,Ltd.
Any unauthorized use of Manual can be punished under applicable
International and/or domestic law.
ⓒ

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1. Specification
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1-1
1-1. GSM General Specification
GSM850
phase1 GSM900
Phase 1 EGSM 900 Phase 2 DCS1800 Phase 1 PCS1900
Freq.
Band[MHz]
Uplink/Downlin
k
824~849
869~894 890~915 935~960 880~915 925~960 1710~1785 1805~1880 1850~1910 1930~1990
ARFCN range 128~251 1~124 0~124 &
975~1023 512~885 512~810
Tx/Rx spacing 45MHz 45MHz 45MHz 95MHz 80MHz
Mod. Bit rate/
Bit Period 270.833kbps 3.692us 270.833kbps 3.692us 270.833kbps 3.692us 270.833kbps 3.692us 270.833kbps 3.692us
Time Slot
Period/Frame
Period
576.9us
4.615ms 576.9us 4.615ms 576.9us 4.615ms 576.9us 4.615ms 576.9us 4.615ms
Modulation 0.3GMSK 0.3GMSK 0.3GMSK 0.3GMSK 0.3GMSK
MS Power 33dBm~13dBm 33dBm~13dBm 33dBm~5dBm 30dBm~0dBm 30dBm~0dBm
Power Class 5pcl ~ 15pcl 5pcl ~ 15pcl 5pcl ~ 19pcl 0pcl ~ 15pcl 0pcl ~ 15pcl
Sensitivity -102dBm -102dBm -102dBm -100dBm -100dBm
TDMA Mux 8 8 8 8 8
Cell Radius 35Km 35Km 35Km 2Km -

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Specification
1-2
1-2. GSM TX power class
TX
Power
control
level
GSM900
5 33±2 dBm
6 31±2 dBm
7 29±2 dBm
8 27±2 dBm
9 25±2 dBm
10 23±2 dBm
11 21±2 dBm
12 19±2 dBm
13 17±2 dBm
14 15±2 dBm
15 13±2 dBm
16 11±3 dBm
17 9±3dBm
18 7±3 dBm
19 5±3 dBm
TX
Power
control
level
DCS1800
0 30±2 dBm
1 28±3 dBm
2 26±3 dBm
3 24±3 dBm
4 22±3 dBm
5 20±3 dBm
6 18±3 dBm
7 16±3 dBm
8 14±3 dBm
9 12±4 dBm
10 10±4 dBm
11 8±4dBm
12 6±4 dBm
13 4±4 dBm
14 2±5 dBm
15 0±5 dBm
TX
ower
control
level
PCS1900
0 30±2 dBm
1 28±3 dBm
2 26±3 dBm
3 24±3 dBm
4 22±3 dBm
5 20±3 dBm
6 18±3 dBm
7 16±3 dBm
8 14±3 dBm
9 12±4 dBm
10 10±4 dBm
11 8±4dBm
12 6±4 dBm
13 4±4 dBm
14 2±5 dBm
15 0±5 dBm
TX
Power
control
level
GSM850
5 33±3 dBm
6 31±3 dBm
7 29±3 dBm
8 27±3 dBm
9 25±3 dBm
10 23±3 dBm
11 21±3 dBm
12 19±3 dBm
13 17±3 dBm
14 15±3 dBm
15 13±3 dBm
16 11±5 dBm
17 9±5 dBm
18 7±5 dBm
19 5±5 dBm

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2. Circuit Description
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2-1
2-1. SGH-D600 RF Circuit Description
2-1-1. RX PART
- FEM(F100 SWICHPLEXER)
Switching Tx, Rx path for GSM850, GSM900, DCS1800 and PCS1900 by logic controlling.
- ANTENNA SWITCH Control Logic (F100) →Truth Table
VC_1 VC_2 VC_3
GSM850/900 Rx Mode L L L
DCS Rx Mode L L L
PCS Rx Mode LL H
GSM Tx Mode (GSM850/900) H L L
DCS/PCS Tx Mode L H L
- FILTER
To convert Electromagnetic Field Wave to Acoustic Wave and then pass the specific frequency band.
- GSM850 FILTER (L113,C133,C134,C135) →For filtering the frequency band between 869 ~ 894 MHz.
- GSM900 FILTER (L106,C122,C123,C124) →For filtering the frequency band between 925 ~ 960 MHz.
- DCS FILTER (L108,L109,C129,C130) →For filtering the frequency band 1805 and 1880 MHz.
- PCS FILTER (L110,L111,C131,C132) →For filtering the frequency band 1930 and 1990 MHz.
- VC-TCXO (U102)
To generate the 26MHz reference clock to drive the logic and RF.
After additional process, the reference clock applies to the U100 Rx IQ demodulator and Tx IQ modulator.
The oscillator for RX IQ demodulator and Tx modulator are controlled by serial data to select channel and use fast lock
mode for GPRS high class operation.
- TRANSCEIVER (U100)
This chip fully integrated GSM GPRS quad-band transceiver with transmit baluns, loop filters and most of the passive
component in it.
And also fully integrated fractional N RF synthesizer with AFC control possibility, RF VCO with integrated supply
regulator. semi integrated reference oscillator with integrated supply regulator.
RF Receiver front-end amplifies the GSM850, E-GSM900, DCS1800 and PCS1900 aerial signal, convert the chosen
channel down to a low IF of 100kHz.
In IF section, further amplifies the wanted channel output level to the desired value and rejects DC.
2-1-2. TX PART
The transmitter is fully differential using a direct up conversion architecture. It consists of a signal side band
power up mixer. Gain is controlled by 6 dB via 3-wire serial bus programing. The fully integrated VCO and power
mixer achieve LO suppression, quadrature phase error, quadrature amplitude balance and low noise floor specification.
Output matching/balun components drive a standard 50 ohms single ended load.

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Circuit Description
2-2
2-2. Baseband Circuit description of SGH-D600
2-2-1. PCF50603 (U400)
- Power Management
Eight low-dropout regulators designed specifically for GSM applications power the terminal and help ensure optimal
system performance and long battery life. A programmable boost converter provides support for 1.8V, 3.0V SIMs,
while a self-resetting, electronically fused switch supplies power to external accessories. Ancillary support functions,
such as RTC module and High Voltage Charge pump, Clock generator, aid in reducing both board area and system
complexity.
I2C BUS serial interface provides access to control and configuration registers. This interface gives a microprocessor
full control of the PCF50603 and enables system designers to maximize both standby and talk times.
Supervisory functions. including a reset generator, an input voltage monitor, and a temperature sensor, support reliable
system design. These functions work together to ensure proper system behavior during start-up or in the event of a
fault condition(low microprocessor voltage, insufficient battery energy, or excessive die temperature).
- Clock Generator
The Clock Generator (CG) generates all clocks for internal and external usage. The 32.768 kHz crystal oscillator
provides an accurate low clock frequency for the PCF50603 and other circuitry.
2-2-2. LCD
LCD is consisted of main LCD(color 262K TFT LCD).
Chip select signals in the U301, LCD_MAIN_CS, can enable LCD. BACKLIGHT signal enables white LED of main LCD.
16-bit data lines(LD(0)~LD(15)) transfers data and commands to LCD. Data and commands use "RS" signal. If this signal
is high, Inputs to LCD are commands. If it is low, Inputs to LCD are data. The signal which informs the input or output
state to LCD, is required. But this system is not necessary this signal. So "L_WRB" signal is used to write data or
commands to LCD. Power signals for LCD are "VDD_IO_HIGH".
2-2-3. Key
This is consisted of key interface pins KEY_ROW(0:4) and KEY_COL(0:4) in PCF5212EL1. These signals compose the
matrix. Result of matrix informs the key status to key interface in the PCF5212EL1. Power on/off key is seperated from
the matrix. So power on/off signal is connected with PCF50603 to enable PCF50603. Key LED is consisted of six white
LEDsforsubkeyandtwelvewhiteLEDsformainkey. White LED for sub key use the VBAT voltage.
"SLIDER_KEY_ON" signal enables Transistor for sub key backlight.
Main key LED use the 3.3V LDO for a supply voltage. KEY_LED_ON signal enables eight white LED.
"FLIP" informs the status of slide (open or closed) to the PCF5213EL1. This uses the hall effect IC, EM-1681
A magnet under LCD enables EM-1681.

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Circuit Description
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2-3
2-2-4. EMI ESD Filter
This system uses the EMI ESD filter, U500 to protect noise from IF CONNECTOR part.
2-2-5. IF connetor
It is 18-pin connector. They are designed to use VBAT, V_EXT_CHARGE, USB_D+, +VBUS, USB_D-, TXD1, RXD1,
AUX_ON, EXT1, EXT2, HFK_SPK, HFK_MIC and GND. They connected to power supply IC, microprocessor and signal
processor IC.
2-2-6. Battery Charge Management
A complete constant-current/constant-voltage linear charger for single cell lithium-ion batteries.
If TA connected to phone, "V_EXT_CHARGE" enable charger IC and supply current to battery.
When fault condition caused, "CHG_ON" signal level change low to high and charger IC stop charging process.
2-2-7. Audio
HFR_P and HFR_N from PCF5212El1 are connected to the main speaker via analog switches. MIC_P and MIC_N
are connected to the main MIC as well. EAR1 is the source of External Speaker. AK4642 is 16-bit stereo audio CODEC
with a built-in microphone - Amplifier and Headphone - Amplifier.
I2S signals from CL8522S5 are decoded with audio analog signals. SAPA1D2-24ELP amplify these signals and deliver to
stereo speakers.
2-2-8. Memory
This system uses Samsung's memory, KBH10PD00M-D414. The KBH10PD00M is a Multi Chip Package Memory which
combines 256Mbit Synchronous Burst Multi Bank NOR Flash Memory and two 1Gbit OneNAND Flash and
256Mbit Synchronous Burst UtRAM.
It has 16 bit data line, HD[1~16] which is connected to PCF5212 and CL8522S5, also has 24 bit address lines,
HA[1~24]. There are 3 chip select signals, CS0n_FLASH, CS4n_NAND, and CS1n_RAM.
In the Wrting process, WEn is fallen to low and it enables writing process to operate. During reading process,
OEn is fallen to low and it enables reading process to operate. Each chip select signals in the PCF5212 choose
different memories.

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Circuit Description
2-4
2-2-9. PCF5212EL1
The PCF5212EL1 is mainly composed of embeded DSP and ARM core. The DSP subsystem includes the Saturn
DSP core with embedded RAM and ROM, and a set of peripherals. It has 24kx16 bits PRAM, 104k*16 bits,
32k*16 XYRAM and 63k*16 XYROM in the DSP.
The ARM946E-S consists of an ARM9E-S processor core, 8 kbyte instruction cache and 8 kbyte data cache,
tghtly-coupled ITCM(Instruction Tightly Coupled Memory) and DTCM(Data Tightly Coupled Memory) memories, a
memory protection unit, and an AMBA(Advanced Microcontroller Bus Architecture) AHB(Advanced
High-performance Bus) bus interface with a write buffer.
HD(0:15), data lines and HA(0:23), address lines are connected to KBJ10KB00M (memory), MV319DNQ (image dsp)
and YMU765 (melody IC). It has 64 kbyte SC RAM (0.5 Mbit) and 32 kbyte SC program ROM for bootstrap
loader in the ARM core.
HD(0:15), data lines and HA(0:23), address lines are connected to memory and YMU765 to communicate.
MV319DNQ(Camera DSP Chip) controls the communication between ARM core and DSP core.
OEn, WEn control the access of memory. KROW, and KCOL recognize the key string input status.
It has J-TAG control pins (TDI/TDO/TCK) for ARM and DSP core. J-SEL signal controls different access to ARM
and DSP core.
ADC(Analog to Digital Convertor) receives the condition of temperature, battery type and battery voltage.
2-2-10. TCO-5888T (26MHz)
This system uses the 26MHz TCXO, TCO-5871U, Toyocom. AFC control signal form PCF5212 controls
frequency from 26MHz x-tal. It generates the clock frequency. This clock is connected to PCF5212, YMU765 and
UAA3587.
2-2-11. Multimedia Chip (CL8522S5)
CL8522S5 is the hardware based MPEG4 CODEC is available to capture the video signal of up to CIF Resolution
(352X288, at 30FPS). CL8522S5 directly transmits and previews the RGB Data to the LCD graphic memory by
processing the sensor output data. It can save the raw RGB data up to 1600x1200 into its image buffer and allows the
host processor to download with scalable sized compressed data.

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3. Exploded View and Parts List
3-1
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3-1. Exploded View
QMW01
QFU01
QKP02
QMO01
QLC01
QAU01
QME02
QCR32
QFL01
QSC11
QHI01
QCR26
QPC01
QFR01
QCR32
QKP01
QMP01
QAN02
QME01
QCA02
QCA01
QVK01
QRE01
QCK01
QVO01
QRF01 QCR31
QIF01
QBA01
QAN05
QSP01
QSP02
QAN06
QCR12

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Exploded view and Part List
3-2
This Document can not be used without Samsung's authorization
3-2. Parts List
Location No Description Sec Code
QAN05 ㅤMEC-INTENNA CONN RUBBER;SGH-D600,EU, GH75-08200A
QAN06 ㅤMEC-INTENNA CONN RUB SM;SGH-D600,EU, GH75-08201A
QAU01 ㅤAUDIO-RECEIVER;32ohm,109dB±2dB,11X6 3009-001125
QBA01 ㅤBATTERY-900MAH,BLK,ENG,M;BST4389BE,S GH43-01939A
QCA01 ㅤUNIT-CAMERA;SGH-D600,IC04001AA,-,EU, GH59-02171A
QCA02 ㅤUNIT-CAMERA KEY;SGH-D600,H/K F.P.C A GH59-02208A
QCK01 ㅤPMO-CAMERA KEY;SGH-D600,PC(K2261),BL GH72-22444A
QCR12 ㅤSCREW-MACHINE;PH,+,M1.4,L2.5,ZPC(BLK 6001-001530
QCR26 ㅤSCREW-MACHINE;CH,+,M1.7,L3,ZPC(BLK), 6001-001850
QCR31 ㅤSCREW-MACHINE;CH,+,M1.7,L3,ZPC(BLK), 6001-001795
QFR01 ㅤMEC-FRONT COVER;SGH-D600,EU,-,-,-,-, GH75-07212A
QFU01 ㅤMEC-SLIDE UPPER;SGH-D600,EU,-,-,-,-, GH75-07334A
QIF01 ㅤPMO-IF COVER;SGH-D600,PC+UREATHANE,B GH72-22629A
QKP01 ㅤMEC-KEYPAD MAIN;SGH-D600,EU,-,-,-,-, GH75-07207A
QKP02 ㅤMEC-KEYPAD SUB;SGH-D600,EU,-,-,-,-,C GH75-07206A
QLC01 ㅤLCD-LCD MODULE;LTS200QV-F03-0,SGH-D6 GH07-00734A
QME01 ㅤUNIT-METAL DOME;SGH-D600,-,-,EU,12V, GH59-02206A
QME02 ㅤUNIT-KEY PAD;SGH-D600,HUW9555-010010 GH59-02094A
QMO01 ㅤMOTOR DC-SGHZ130;DMJBRV83CG,SGH-Z130 GH31-00153B
QMP01 ㅤPBA MAIN-SGHD600;SGH-D600,EU,EU,PBA GH92-02191A
QMW01 ㅤPCT-WINDOW MAIN;SGH-D600,ACRYL,TRP,- GH72-22505A
QPC01 ㅤPCB-FPCB;SGH-D600,POLYIMIDE,3L,-,0.0 GH41-00892A
QRE01 ㅤMEC-REAR COVER;SGH-D600,EU,-,-,-,-,C GH75-07208A
QRF01 ㅤMPR-R/F CAP;SGH-D600,PC SHEET,P5.4XT GH74-15303A
QSC11 ㅤRMO-LOWER SCREW CAP;SGH-D600,CR RUBB GH73-05136A
QVK01 ㅤUNIT-VOLUME KEY;SGH-D600,SGH-D600 V/ GH59-02207A
QVO01 ㅤPMO-VOLUME KEY;SGH-D600,PC(K2261),BL GH72-22445A
QSP02 ㅤUNIT-SPEAKER MODULE;SGH-D600,SS-SGH- GH59-02364A
ㅤQSP01 SPEAKER;0.7W,8.0ohm,87dB±2dB,700Hz, 3001-001788
ㅤQAN02 INTENNA-SGHD600;EWPADG006A,SGH-D600, GH42-00596A
QFL01 ㅤMEC-SLIDE LOWER;SGH-D600,EU,-,-,-,-, GH75-07210A
ㅤQCR32 SCREW-MACHINE;CH,+,M1.4,L2,ZPC(BLK), 6001-001700
ㅤQHI01 MEC-HINGE MODULE;SGH-D600,EU,-,-,-,- GH75-07211A