IC BLOCK DIAGRAM &DESCRIPTION .
IC5 LC78622E(Digital Signal Processor)
No. Name 1/0 Function
1DEFI IInput of defect detection signal. (Not used :Connect to OV)
2TAU IFor PLL. Input for test. (Surely connect to OV)
3PDO oForPLL.OutputofphasecomparatorforexternalVCO.
4Vvss -For PLL. Ground for internal VCO. (Surely connect to OV)
5ISET Al For PLL. Connection of resistor for current adjustment of
PDO output.
6WDD -For PLL. Power supply for internal VCO.
7mAl For PLL. For adjustment of VCO frequency range.
8Vss -Ground for digital root. (Surely connect to OV)
9EFMO oOutput of EFM signal for slice level control.
10 EFMIN IInput of EFM signal for slice level control.
11 TEST2 IInput for test. (Surely connect to OV)
12 CLV+ oOutput for disc motor control.
13 CLV- 0Output for disc motor control.
14 v ~: oMonitor output for automatic selection of rough servolphase
control. H:rough servo, ‘b: phase control
15 HFL IInput of track detection signal.
16 TES IInput of tracking error signal.
17 TOFF oOu!put of trackima OFF signal.
18 TGL oOutput of selection for tracking gain. “~ level :gain up
19 JP+ oOutput of track jump control.
20 JP- 0Output of track jump control.
21 PCK oOutput of clock monitor for playback EFM data.
When rocked the phase :4.3218MHz
22 FSEQ oOutput of detection for synchronizing signal.
When accordant to detected synchronizingsignal from
EFM signaf and synchronizing signal in internal generation.
23 VDD -Power supply for digital root.
24 CONT1 1/0
25 CONT2 1/0 Inpuf/Output for general.
26 CONT3 1/0 Control by serial data command from micro processor.
27 CONT4 1/0 Not used Open or OV
28 CONT5 1/0
29 EMPH oOutput of monitor for de-emphasis.
Playback during diemphasis disc: ‘W level
30 C2F o Output of C2 flag.
31 DOUT oOutput of Digital OUT. (EIAJ foamed)
32 TEST3 II nput for test. (Surely connect to OV)
33 TEST4 II nput for test. (Surely connect to OV)
34 w-Not connection. (Open)
qol Name~/d Function
35 IMUTEL IO]L-channel l-bit DAC. Output of muting for L-channel. I
36 LVDD -L-channel l-bit DAC. Power supply for L-channel.
37 LCHO oL-channel 1-bit DAC. Output signal for L-channel.
38 LVSS -L-channel l-bit DAC. Ground terminal for L-channel.
(Surely connect to OV)
39 RVSS -R-channel l-bit DAC. Ground terminal for R-channel.
(Surely connect to OV)
40 RCHO oR-channel 1-bit DAC. Output signal for R-channel.
41 RVDD -R-channel l-bitDAC. Power supply for R-channel.
42 MUTER oR-channel l-bit DAC. Output of mutingfor R-channel.
43 XVDD -Power supply terminal for crystal oscillation.
44 XOUT oConnection terminal for crystal oscillation. (16.9344MHz~
45 XIN IConnection terminal for crystal oscillation. (16.9345MHz~
46 Xvss oGround terminal for crystal oscillation.
I I I(Surely connect to OV)
47 ISBSY ]O10utput of Synchronizing signal for sub-code block. I
48 IEFLG IOlTerminal of correction monitorfor Cl, C2, single I
I I Iand double.
491 F-W IO10utput for P, Q, R, S, T, Uand Wof sub-code. I
50 ISFSY IO10utput of Synchronizing signal for sub-code flame. I
When the stand-by the sub-code, leading edge.
51 SBCK IInput terminal of reading clock for sub-code.
52 FSX oOutput terminal of synchronizing signa! divided from
crystal oscillation (7.35 kHz).
53 WFtQ oOutput of stand-by signal for output the sub-code Q.
54 MIInput terminal of control signal for readlwrite.
55 SQOUT oOutput terminal for sub-code Q.
56 COIN IInput terminal for command from micro-processor.
57 CQCK IInput of loading clock for command, or fetchingclock for
sub-code from SQOUT.
58 EfInput te~inal of system reset. When ON the power
supply, ones the ‘L”.
S9 TST11 oOutput terminal for test. - -- -
Use the Ope nstatus(Normal the output is “L”).
$0 16M oOutput terminal for 16.9344MHz.
~
52 TEST5 IIn ut for test. Surel connect to OV
Iin ut terminal for chi select si nal
When the un-control, connect to OV
}4 TEST1 IIn ut for test. Surel connect to OV
EFMD 1S111 TEST2 1SS14
WDD VVSS Pm ISET FR PCK ‘a, 7==7. 7=.,. 7==.= ‘m ‘i==
TTTTYTT ““
Vco ad oscillator 2K -Wit RAM AOdress
RAM
II
+I
SyncrnousDetect ~
FSH3 --. .-. —. . ------
“m
mMuemoowano
CLV* CLV
CLv. 3Olgital Servo
V,* J4
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PW9
Sscrr 1SutmdeOxIa13
Smsv 4OCRC
SFSY SO
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-1 ,.a
1,
I
II
Cl C2 EmorOetecl &
Corr.zclCantrd Flag
iI[1Ji
I--In *
Smnm
CixR
I1IbI~%
L.P.F
X?al Rcmt
lim!ng Generator
mm TESWF *. JP. RES 7GL cc+n~:y~:+ns EMFW ERG w42u Fsx WI xvm Rvm m+io LCI+3 M-TEL LVLW
Xvss XOUT RVS5 MUTER LVS2
1
(NC)
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