Sharp PA-W1400 User manual

PA-W1400
SHARP
=
SERVICE
MANUAL
CODE: 00ZPAW1410S2E
PERSONAL
WORD
PROCESSOR
PA-W1400
mopEL PA-W1410
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* Parts guide
This document has been published to be used for
ft les at
SHARP
CORPORATION
the
contents
are
subject
to
change
without
aatioe

[1] General
The PA-W1400/PA-W1410 is a portable personal word processor that
has the ordinary electronic typewriter (ET) functions and the text
editing functions of a common word processor (WD) that can be
switch selected. It has the following features:
What the PA-W1400 differs from the PA-W1410 is in the liquid crystal
display panel and backlight circuit. The PA-W1410 has the backlight
feature. There is a different method for the liquid crystal display unit
depending on the availability of the backlight feature.
@ An 80 characters x 16 lines large size screen liquid crystal display
with a tilt mechanism. The backlight is adopted for the PA-W1410,
while it is not used by the PA-W1400.
(1) Electrical circuit
The main control PWB consists of a power supply, mechanical drive,
keyboard control, beeper drive, liquid display, and data storage
(memory, floppy disk).
(2) Block diagram
The figure below shows the block diagram for the printer block, key-
board block, floppy disk block, power supply block, and main control
PWB.
PA-W1400
@ Internal single floppy disk drive
@
Use
of
a
96-character
replaceable
printwheel
(non-cassette
type)
@®
The
accessory
floppy
disc
includes
the
following
program
for
sales
promotion
of
the
product.
Please
print
and
utilize
it.
The
sample
of
print
data
showing
as
next
page.
(Operation)
CODE]
+
Power-ON
Block diagram
AC(V)
50/60H2
+ Power
supply
unit
Printer
mechanical
unit
Lop
unit
Switch
Head cable
>| T CITT
a
al]
Carriage
motor
Carriage
G
home position
sensor
Main
control
PWB
unit
(EI
Paper
teed motor
i]
l
FDD
unit
Keyboard unit
NOTE: The LCD unit service parts is available with it assembled in
the LCD cabinet.
Since it would be probable that an open line or a contact
failure may occurs at the junction between the PWB and the
LCD because of corrosion, if the LCD PWB was left stored by
itself for a long period of more than three month, it needs to
be stored with the LCD assembled to the LCD cabinet with
‘screws, Although the assembly is made available for the ser-
vice parts, it has to be returned to its original state if the LCD
PWéB was removed for parts replacement. Refer to a later
Paragraph discussing “LCD unit disassembly and re-assemb-
ly" for details of assembly.

PA-W1400
(Printing sample)
INTRODUCING SHARP'S WORD PROCESSORS
This innovative product from Sharp Corporation is a fully
dedicated word processing system with MS-DOS Compatible Disk
Format. This is an all-in-one system consisting of an LCD
Display with Backlight (PA-W1410 only) for easier viewing, a
printer, a 3.5" Disk Drive and a full Function Keyboard.
This Word Processor is easy to use with many Menu Driven
Functions and preset Function Keys, all you do is press one key
and you're on your way to a flawlessly typed text, then store it
on the disk for future use.
With the Merge Print feature you can insert names, addresses
etc., to all your letters and reports automatically. And with
the Form Fill-in feature you can easily complete preset forms in
a fraction of time than the old manual way.
Sharp's Word Processor can be used for Faster, Efficient and
Convenient word processing tasks or with a touch of one key use
it as an electronic typewriter.
THIS ADVANCED PRODUCT ALSO HAS MANY BUILT-IN FEATURES:
* An easy to read 80 character x 16 line LCD Backlit Screen
(PA-W1410 only).
* A built-in 50,000 character Memory.
* An MS-DOS Compatible Disk with 720KB per disk storage capacity
for unlimited memory.
* A 15 cps Bidirectional Letter Quality Daisy Wheel Printer.
An 80K word Spelling Dictionary with on-line Thesaurus.
* Usage Checker checks for 11 punctuation and grammatical errors.
*
Word Processing:
*
Block
Move/Delete/Copy
*
Search
and
Replace
* Auto Insert * Merge Print
* Page Formatting * View Page Layout
* Form Fill-in * Auto Storing
* Disk and File Utilities * ASCII Text Conversion
Printing Controls:
* Auto Return * Auto Center * Auto Bold
* Auto Underline * Auto Indent * Word Count
* Auto Justification * Auto Decimal Tab * Capital Lock
*
Superscript
*
Subscript
_
_*
Plush
Right
Correction Systems: :
*
Word
Correction
*
Two
Line
Correction
Memory
*
Relocate
*
Micro
Backspace
* Word Backspace * Character Correction
This Word Processor will make your most difficult typing task
easy. Each page you type will convince you that you've made a
wise
choice
in
your
purchase
of
Sharp'
sWord
Processor.
-

PA-W1400
(3) Cautions [2] Specifications
1. Be sure to disconnect the power supply plug before disassembly.
2. The power must be turned off when installing or removing the eae F
PWB. (1) Specification
3. Hold the connector area when fastening or unfastening the con- Xx 1 The ribbon (1) must always be used in pair with the correction
nector. Never manipulate the cable. tape (2). Otherwise, it may fail to correct.
4. Do not bend the carriage wire too often as it is not robust against
bending.
MODEL
5
abe
SPECIFICATIONS
PAW
1400/1410.
5.
Lubrication
must
be
done
to
the
specific
areas
only.
SRINTING
6.
The
LCD
unit
must
be
stored
in
a
state
assembled
to
the
cabinet,
Print
speed
15
cps,
Bidirectional
print
in
order
to
avoid
possible
occurrence
of
contact
failure
and
Printwheel
96
characters,
removable
(Non
cassette
damage
that
may
occur
if
it
was
left
by
itself.
type)
7.
CAUTION:
This
model
has
two
power
switches:
(1)
the
main
Print
pitch
10
or
12
power
switch
in
the
left
rear
side
of
the
body,
and
(2)
the
POWER
WIDTH
key
in
right
upper
side
of
the
keyboard.
Paper
13
inches
If
the
power
is
turned
off
by
pressing
the
POWER
key
in
the
Typing
10
inches
keyboard
before
turning
off
the
main
power
switch,
the
following
RIBBON
TYPE
Correctable
carbon
film,
power
ON
procedure
requires
pressing
of
the
POWER
key
in
the
approx.
50,000
charactors
Meypoee:
CORRECTION
TABLE
|Lift-off
correctable
carbon
film,
approx.
1,200
characters
.
KEYBOARD
(4)
Tools
required
Alphanumerickeys
|
44
2
ce
Key
buffer
32
The
following
tools
are
required
for
servicing.
Selt-repeat
keys
Return,
Backspace,
Space
Bar,
Left
Arrow,
Right
Arrow,
Up
Arrow,
Down
Part
code
Name
Arrow,
Auto
Correction,
the
Code
and
Up
Arrow
keys,
the
Code
and
Down
Ariow
UKOGM1068CSZZ
Loupe
(x15)
keys
Set
of
allen
wrenches
UKOGM0050CSZZ
DISPLAY
O27
18,
28
29-98)
Type
PA-W1400:
Liquid
Crystal
Display
OOPCB-1G102A/
Key
top
removing
tool
PA-W1410:
Liquid
Crystal
Display
with
0.1~5.0
mm
thickness
backlight
UKOGMO075C8ZZ
gauge
Capacity
80
character
x
16
line
(640
x
200
dets)
UKOGM5001BCZZ
Tension
gauge
(3.0
kg)
MEMORY
f
,
‘
UKOGM2024CSZZ
LCD
removing
tool
Amma
Correction
|2
line
(Max.
256
characters
per
line}
UKOG-5013BCZZ
Wheel
wrench
Bulit-in
Memory
50K
byte
DISK
DRIVE
Type
Built-in,
3.5
inch
(DSDD)
Micro
Floppy
Disk
Format
“MS-DOS
disk
format
compatible
Capacity
720K
byte/disk
‘SPELLING
Fer
cope
Nee,
DICTIONARY
OCHFLOILG311S
Grease
(Floil
G-3118)
ho
eae
meee
peated
jser's
Di
.
Is
UROG=0
1850822
Sotaw
grease
(No.
400)
Thesaurus
Approx.
15,000
entry
words
and
approx.
150,000
synonyms
POWER
Approx.
45
watts,
AC
voltage
(+105)
50/60Hz
ENVIRONMENTS
Operating
41
to
104°F
(5
to
40°C)
Temperature
Ambient
Humidity
_|20
to
85%
RH,
w/o
condensation
DIMENSIONS
16.46"(W)
x
15.71"(D)
x
4.92"(H)
/418(W)
x
399(D)
x
125(H)
mm
WEIGHT
PA-W1400:
Approx.
16.1
Ibs.
(7.3
Ig)
PA-W1410:
Approx.
16.5
Ibs.
(7.59)
OPTIONAL
ACCESSORIES
ay
{Beate}
Correctable
carbon
film
ribbon
Lift-off
correction
tape
(dual
pack)
@ 'ZX-3FS1] Except |Fabric ribbon
ZX-4CT [U.S.A | Cover-up correction tape (dual paci)
Reference to "[2]-(2). Option print vn eels",
(3) Print wheels

PA-W1400
(2) Option print wheels
The print wheel: appricable varies according to the destination. For
details, refer to the "DESTINATION TABLE" in the parts guide.
Tyee | NeenaPtcn | CSANS | amber
COURIER 10 270-176 ZX-9176H
PRESTIGE ELITE 12 | 270-020 ZX-9020H
H CUBIC 1012 270-046 ZX-9046H
SCRIPT 12 270-032 2ZX-9032H
CUBIC 1215 270-046 ZX-0964H
MADELEINE PS 270-052 ZX-9052H
COURIER 10 269-176 ZX-9176L
CUBIC 1012 269-046 ZX-9046L
fs SCRIPT 12 | 269-032 2X-9032L,
LIGHT ITALIC 12 | 269-067 ZX-9067L
TILE 1215 269-125 ZX-9125L
MADELEINE PS | 269-052 2X-9052L
COURIER 10 268-176 2X-9176M
CUBIC 1012 | 268-046 ZX-9046M
M SCRIPT 12 268-032 ZX-0932M
LIGHT ITALIC 12 268-067 ZX-9067M
TILE 1215 | 268-125 ZX-9125M
MADELEINE PS | 268-052 2X-9052M
COURIER 10 267-176 2X-9176N
CUBIC 1012 | 267-046 2X-9046N
N SCRIPT 12 267-032 ZX-9032N
LIGHT ITALIC 12 | 267-067 ZX-9067N
TILE 1215 267-125 ZX-9125N
MADELEINE 267-052 ZX-9052N
NOTE: A non-cassette type printwheel is used for this model. Be-
cause it has a different mechanism with the printwheel in the
cassette housing, be sure to use the specific type. Note that
you cannot use the printwheel with the housing.

[3] Mechanical descriptions
(1) General
Since the mechanical unit of this model shares the use with that of
the PA-3140II, procedures are identical to disassembly, re-assembly,
and adjustments. (Only the hammer unit specially prepared for this
model.)
This mechanism is made more simple by eliminating the adjustment
locations as compared with the conventional model and designed
with high reliability with more rigidity incorporated.
1. Paper feed mechanism
The paper feed mechanism employs the pulse motor drive system
which works to rotate the platen via the pinion gear ® and idler gear
@ when the paper drive signal is given from the main PWB.
As it uses a pulse motor, it can feed the paper with ease in both
forward and backward directions. Paper is fed by 1/96" per pulse, and
the detent works 1/24".
Mechanical fine adjustment is not provided. Fine adjustment is per-
formed by means of software.
The pulse motor @ and the idler gear @, both mounted on the
flexible PF holder ©, are pulled by the spring © toward the platen
gear © with a fixed force. This keeps zero clearance between the
idler gear @ and the platen gear ©, and no adjustment is necessary.
IFig. 3-1]
PA-W1400
2. Paper release mechanism
As
shown
in
Fig.
3-4,
when
the
paper
release
lever
©
is
moved
in
the
arrow
direction
(A),
the
feed
roll
holder
support
@
rotates
in
the
direction
C
around
the
pivot
B.
This
allows
the
feed
roll
holder
@
to
move
downward,
releasing
the
feed
roll
@
from
contact
with
the
platen
®.
(Fig.
3-2)
—
{Fig. 3-2]
3. Carriage structure and driving method
(Structure)
The carriage unit consists of the following drive blocks.
@® Printwheel drive motor (WH motor)
@ Ribbon lift/feed drive motor (RB motor)
@® Print hammer solenoid (HM solenoid)
(Drive system)
The carriage is driven by the carriage motor (CR motor), located on
the right side frame of the printer, via the carriage timing belt.
(Home position)
Immediately
after
power
on,
the
carriage
starts
to
the
left
of
the
platen.
When
it
reached
the
mechanical
left
margin,
the
sensor
switch
on
the
left
side
of
the
printer
mechanism
is
pushed
by
a
needle-
shaped
lever
that
protrudes
from
the
left
side
of
the
carriage
and
the
carriage
momentarily
stops.
Then,
it
moves
to
right
to
the
leftmargin
and
stops
at
the
first
printing
position.
[Fig. 3-3]

PA-W1400
4, Printwheel home positioning mechanism
The printwheel can be set at its home position by the zero sense
lever @ and the stepping motor @ driven printwheel flange @, in the
reduction of 1:4,
After power on, the carriage and the printwheel are set at their home
positions. During home positioning of the carriage, the zero sense
lever © contacts the main frame at the left mechanical margin and
moves in the arrow direction A, and the zero sense lever stopper ®
engages with the printwheel flange @ stops its motion, the printwheel
flange ® driving motor @ disengages, to complete home positioning.
(Fig. 3-4)
IFig. 3-4]
NOTE: As there is no significant difference from the conventional
model, Either the cassette type or non-cassette type
printwheel may be used if some of parts are replaced, though
it may not be done by the user.
5. Ribbon dirve and correction mechanism
The ribbon is taken up by the pulse motor and the cam is driven by
the same motor to lift the correction tape.
The motor is installed on the ribbon holder which is different from the
predecessor model, in order to avoid some problem in the mechani-
cal action and parts accuracy of the drive train which was necessary
to transmit mechanical power to the ribbon holder that shift up and
down with the predecessor model.
There is no home position sensor used in this new mechanism, but
the home position is established by disengaging the motor at the end
of the cam slit.
(Cam)
A
cylindrical
cam
is
used
which
consists
of
two
parts
(cam
A,
cam
B)
because
of
parts
molding
and
it
has
three
positions
described
next.
@® Print and ribbon The cams rotate idle during the ribbon feed
feed position: operation.
®
Standby
position:
The
cams
rest
in
this
position
for
a
certain
period after the printing has been completed.
The cams ascend to this position to make
correction.
@® Correct position:
View
of
cam
transition
@
? Cam slit
CAM B
rE
10 210240
eer ere re
wo 90 6) 9120180
pig
300
Ribbon holder shitt
[Fig. 3-6]
Since
the
cam
is
installed
on
the
moving
side
(ribbon
holder)
and
a
follower pin on the stationary side (carriage base), up and down of
the cam slit and the ribbon holder vertical action are opposite to the
conventional type.
6.Hammer solenoid driving
Ahammer is driven by the hammer solenoid to print a character using
the print ribbon. The correct tape is used to erase the character
typed. A different current carrying time exists for the hammer solenoid
to print a character.
(Ex): * (Acharacter with a small surface area)...Shorter current car-
rying time
H (A character with a larger surface area)...Longer current
carrying time
Print wheel
— ‘Typing ribbon or correction tape

PA-W1400
[4] ELECTRICAL SECTION
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PA-W1400
(1) outline of electrical section
The CPU of this model is M50734SP, which is a C-MOS 8-bit single-
chip microcomputer composed of the M50740 CPU core, clocked
serial I/O, A-D convertor, watch dog timer, and 35 lines of parallel /O.
The CPU has iMB direct access memory space and 35 lines of VO
ports. The gate array (G.A.) UPD65027G is provided in the peripheral
of the CPU, composing the bank circuit.
ROM's of 4MB and 256KB, dynamic RAM of 256KB, and static RAM
(1051832) of 256KB are used to store all control programs and data
for spell check, thesaurus, and grammar.
The CR (carrier) motor, WH (wheel) motor, and KEY are controlled
through the CPU I/O ports.
The RB (ribbon) motor, PF (paper feed) motor, HAMMER-solenoid,
LCD, and FDD (floppy disk drive) are controlled through the exten-
sion ports of the gate array.
The CPU pin configuration and block diagram are shown below:
CPU block diagram
XIN XQUT &
Program
counter
PCH (8)
Program
counter
Pol (8)
VREF
‘Accumulator
AB) xe)
P4 & analog
NO port
Input AN
u0(8)
sciK
isto
ADB(8) P3(6)
‘Address bus A ‘Address &
data bus A/D
VO port P3
WA RD SYNC ALE RESET Voo(Sv) VoC(Ol
“OO
Index rapist | Index register
(8)
CPU pin configuration
PO4/STBOUT
POS/OME
POBTXD
POTIRKD
PIO
Py
Pia
P13
Pia
VO port.PO
VO port.Pt
VO port,P2:
VO port.Pa:
P37
RESET
XIN
XOUT
(Ov) vss
Reset input
Clock input
Clock output
PUEEEPT EEE Eee ea teehee
Proscalor
PRE 1 (8)
Prosealer
PRE 2 (8)
‘Stack pointer
S@)
Prescaler
PRE 3 (6)
99
fonicol circuit
PIL@)
28)
WO por P2
P16)
VO por Pt
voc(sy)
POS/BUSTYOUT
POZCNTR
POWINT2
POOINTT
woout Watchdog timer
AorD0
VO portPO
2qRB
overflow output
AVI
agp
AgD3
Aaa
ASIDS
Asie
ArO7
‘Adress latch
ALE enable output
ES ESE EES
i
Address
Idata bus
a
"Address bus
VO por.P4
Timer 1
TH)
Trstruction
ropistor (8)
Timer 2
12(6) Tratruction JOME
decoder
Timer 3
13.(8)
Control instruction
PWM OUT.
Timer §
18 @)
Timer W.
we)
ONT
Timor X TX (8)
INT
XD
Busy!
out
VO pen PO

PA-W1400
PA-W1410/1400
CPU (M50734) Pin Configuration
Pin | CPUsignal | Cir gram ; : CPU signal | Circuit diagram j '
ad nae signal name | YO Signal function Neel Sian signal name. | “0 Signal function
Software power key sense | | 33 P40 3 |_| Default print pitch (10/12)
1 Po4 PKY 1
signal i Pat “4 1 | Digital tab division symbol
2
DWE
DME
°
Data
memory
access
(Jy)
_
signal 45 pas - , | Defautt print pressure
3 Pos ‘SCAN8 © | Data scan signal (line 8) (High/Low)
4 PO7 SCAN9 © | Data scan signal (line 9) 36 p43 DISKCHANGE | 1 Disk change generation
5 PIO SCANO Q | Data scan signal (line 0) signal
6 Pit ‘SCANT (© | Data scan signal (line 1) 37 VREF GND — | Power source (GND)
7 Pi2 ‘SCAN2 © | Data scan signal (line 2) 38 RD RD © | Data read timing signal
8 P13 ‘SCANS © | Data scan signal (line 3) 39 WR WR © | Data write timing signal
9 P14 ‘SCAN4 (© | Data scan signal (line 4) [40 ® ® © | System clock signal
10 PIS ‘SCANS: © | Data scan signal (line 5) 41 | syNc SYNC ° conn ee read
11 PI6 SCANG © | Data scan signal (line 6) jiming signe”.
[2
iy
SCANT
©
|
Data
scan
signal
(ine
7)
|
42
AIS
AIS
(©
[Address
bus
signal
(bit
15)
|
Carriage motor excitement 43 A14 A14 © | Address bus signal (bit 14) |
13 P20 cM4 © | phase signal (- B phase) 44 A13 AIS © | Address bus signal (bit 13) |
44 ral Gas © | Carriage motor excitement 45 A12 AI2 © | Address bus signal (bit 12)
phase signal (— A phase) 46 Alt Alt (© | Address bus signal (bit 11)
45 p22 M2 ° Carriage motor excitement 47 A10 A10 | Address bus signal (bit 10)
phase signal (B phase) 48 ‘AQ AQ © | Address bus signal (bit 9)
Carriage motor excitement | | 49 AB AB (© | Address bus signal (bit 8)
16 P23 CMt ° 9)
a Sone (A — - 50 | ALE ALE 0 | Address latch timing signal
el motor excitement A
Ate) Lares WM4 _| © | phase signal (-B phase) st | A7/07 aro? | vo | aeeressidata bus elgrell
Wheel motor excitement 7
18 _ wus © | chase signal (-A phase) 52 | A6/D6 Aedes =| v0 mae bus signal
Wheel motor excitement ;
ig F26. wn. © | chase signal (B phase) 53 | As/DS A5/D5 | VO oreo bus signal
Wheel motor excitement :
= re Mi © | phase signal (A phase) 54. | Aaa aaa =| v0 foveal bus signal
24 P30 SENSEO | |_| Key sense signal (bit 0) :
‘Address/data bus signal
22 P3t SENSE1 1 [Key sense signal (bit 1) 55 | Aa/03 A3/D3 VO | pit 3) 2
[23 P32 SENSE2 | 1_|Key sense signal (bit 2) Addresses gos sgtal
[2a P33 SENSES | 1 | Key senso signal (bit 3) Be |. Aes A2D2 | HO wit 2)
25 P34 ‘SENSES |_| Key sense signal (bit 4) = er aii Vo | Address/data bus sigral
26
P35:
SENSES
|_|
Key
sense
signal
(bit
5)
(bit
1)
27 P36 SENSE6 |_| Key sense signal (bit 6) 538 | ao/Do A0/DO vo | Address/data bus signal
28 P37 SENSE? _|_1_| Key sense signal (bit 7) (bit 0) "os
29 | RESET RESET |_| System reset signal 59 | woout | woouT | 0 Baral log timer outpvt
so | XIN XIN \ Saleen a ee _ | | Cartage origin detecinng
signal
XOUT ae rol eager pte 1 | Pot HM © | Hammer drive signal
Power source (GND) 62 Po2 BDRV (© | Buzzer drive signal
63 P03 To ° FDC data transmission
halt signal
Power source (+5V)

PA-W1400
PA-W1410/1400
Gate Array Pin Configuration
Signal function vo Signal function
1 VoD | — | Power supply (+5V) — | +5V power
XOUT |__| Clock output 1_| Internal gate reset signal
XIN 1 [ Clock input ‘© | Hammer drive signal
wR 1 [CPU data write timing signal (© _| Power OFF signal
® 1_[ CPU bus oycle signal (© | LCD scan start signal
AIS |_| CPU address bus (Bit 15) © | LCD data latch timing signal
AI4 |_| CPU address bus (Bit 14) © | LCD data shift lock signal
XE] |_| CPU address bus (Bit 13) © | LOD drive power AC—conversion signal
22 1_| CPU address bus (Bit 12) © | ECD data (bit 0)
Att 1_| CPU address bus (Bit 11) © | LCD data (bit 1)
A10 1 | CPU address bus (Bit 10) ‘© | LCD data (bit 2)
a9 1 | CPU address bus (Bit 9) ‘© | LCD data (bit 3)
AB 1 [ CPU address bus (Bit 8) © | Ribbon motor exciting phase signal (—B phase)
ALE 1_| Address latch enable ‘© _| Ribbon motor exciting phase signal (B phase)
GND__| — | GND = [GND
GND | — | GNO = [GND
7 ‘AD7 __| VO | CPU address/Data bus (Bit7) © _| Ribbon motor exciting phase signal (A phase)
18 Kd6__| UO | CPU address/Data bus (Bit 6) ‘© | Ribbon motor exciting phase signal (—A phase)
19 ADS__| VO | CPU address/Data bus (Bit 5) © | Wheel motor drive signal
20 AD4 | VO | CPU address/Data bus (Bit 4) © | Ribbon motor drive signal
Fal ‘AD3__| VO | CPU address/Data bus (Bit 3) © | Paper feed motor drive signal
22 ‘AD2___ | VO | CPU address/Data bus (Bit 2) © | Paper feed motor exciting phase signal (A phase)
23 D1 __| VO | CPU address/Data bus (Bit 1) © | Paper feed motor exciting phase signal (—A phase)
24 ‘ADO _| VO | GPU address/Data bus (Bit 0) © | Paper feed motor exciting phase signal (B phase)
GND [— [GND © | Paper feed motor exciting phase signal (—B phase)
26 | SWi__| VO | Switch inputt © | Carriage motor drive signal
sw2__|_1_| Switch input2 © | Floppy disk controller select signal
28 [| SW3__| 1 _| Switch inputs (© | SOS ROM select signal
29 | swa__|_1_| Switchinputa (© _| 4M mask ROM select signal
30 voo | — | Switch input — | 45V power
31 GND__| — [GND — [GND
32 PDS _| VO | Pseudo—SRAM data bus (bit 3) © | System address bus signal (bit 14)
33 PD2__| VO | Pseudo—SRAM data bus (bit 2) ‘© | System address bus signal (bit 15)
34 PD4 1/0 | Pseudo—SRAM data bus (bit 4) © | System address bus signal (bit 16)
35 PD1__| VO | Pseudo—SRAM data bus (bit 1) © | System address bus signal (bit 17)
36 PDS _| VO | Pseudo—SRAM data bus (bit 5) (© _| System address bus signal (bit 19)
37 PDO _| VO | Pseudo—SRAM data bus (bit 0) © | System address bus signal (bit 18)
38 PD6__| VO | Pseudo—SRAM data bus (bité) — | @ND
39 PD7__| VO | Pseudo—SRAM data bus (bit7) © _| System address bus signal (bit 7)
40 [GND | — | GND © | System address bus signal (bit 4)
41 PAO__| O | Pseudo—SRAM address bus (bit 0) © | System address bus signal (bit 3)
42 | VCE | 0 | Pseudo—SRAM select signal ‘© | System address bus signal (bit 5)
43 PAI__| O | Pseudo—SRAM address bus (bit 1) © | System address bus signal (bit 2)
44 |" PA10 | O | Pseudo—SRAM address bus (bit 10) © | System address bus signal (bit 6)
45 PA2__| © | Pseudo—SRAM address bus (bit 2) © _| System address bus signal (bit 1)
46 [| VOE | 0 | Pseudo—SRAM data output allowing signal © | Dynamic RAM low address strobe
47 PA3__| © | Pseudo—SRAM address bus (bit 3) © _| System address signal (bit 0)
48 | PAI? | © | Pseudo—SRAM address bus (bit 11) (© | Dynamic RAM data write timing signal
49 PA4__| © | Pseudo—SRAM address bus (bit 4) © | Dynamic RAM collum address strobe
50 PAS | © | Pseudo—SRAM address bus (bit 9) ‘© | Notconnected.
51 PAS__| O | Pseudo—SRAM address bus (bit 5) |_| LCD data reversion command signal
52 PAB__| © | Pseudo—SRAM address bus (bit 8) VO | System data bus (bit 6)
53 PAB __|_O | Pseudo—SRAM address bus (bit 6) VO [ System data bus (bit 7)
54 | PAIS | © | Pseudo—SRAM address bus (bit 13) VO | System data bus (bit 5)
55 PA7 __| © | Pseudo—SRAM address bus (bit 7) VO | System data bus (bit 4)
56 | WWE | 0 | Pseudo—SRAM data write timing signal VO | System data bus (bit 2)
37 | PAI2 | © | Pseudo—SRAM address bus (bit 12) VO | System data bus (bit 1)
58 | _pAI4 | O | Pseudo—SRAM address bus (bit 14) VO | System data bus (bit 3)
59 | DME | | | Datamemory select signal UO | System data bus (bit 0)
60 | and | —[|GND — | GND

[Description]
This circuit is composed of the six functional blocks: the power source
block, the mechanism drive block, the key control block, the buzzer
drive block, the LCD block, and the data storage block (memory,
floppy disk).
1. Power source block
This block generates DC voltages from the commercially available
power source and generates the circuit reset signal.
DC power circuit block diagram
Sig
hal
ei
|
eee
=
of]
veer
[fears
|
femotor
|
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re
LEE
mae
rs
cu rr
PA-W1400
ne ear
i
Ahi
Lees
hia
a)
ili
able
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py
s
ii
=
oe
elena
de
ba
te
~~.
=
ae
(1) DC power generating block
DC power voltages used in this circuit are +15V, -5V, and -24V.
The block diagram of the DC power generating block is shown
below:
1) Transformer and rectifying circuit
In this circuit, the commercially available power is transformed
into the secondary voltage (about AC30V) by the low-frequen-
cy transformer, then rectified by DB1, and smoothed by C1
and C2.
2) Power ON/OFF circuit
When the power key is pressed OFF without storing fre data
prepared in this machine, this circuit confirms storage of the
data then shuts off the power with the software.
‘To supply power, the power key on the keyboard is pressed to
turn on the flip-flop composed of Q1 and Q2, starting me self-
‘excited switching of the +15V generating circuit.
To turn off the power, the power key on the keytoard is
pressed, and the CPU 1-pin becomes 0.8V or less. It isssensed
by the software. After confirming the power OFF, RSTI_ signal
at gate array 64-pin is made high to tum on Q7. As a result, Q1
and Q2 are turned off and the self-excited switchin, of the
+15 generating circuit is stopped,

PA-W1400
3) +15V generating circuit
When Q2 in the power ON/OFF circuit is turned on, the base
voltage of Q5 is increased through R11 to turn on Q5, resul-
tantly turning on Q12 and Q13. Thus the emitter voltage of
Q13is increased to about 35V.
When ZD6 cathode voltage increased to 15V or more through
L20, Q4 base voltage increases to go into saturated state,
turning off Q5, then turning off Q12 and Q13.
When the power transistor Q13 is turned off, a counter-
electromotive force is generated by the energy stored in L20,
and the power is discharged through D8.
When ZD6 cathode voltage falls below +15V, Q4 is turned off,
turning on Q§, then turning on Q12 and Q13. By repeating the
above operation, the output is maintained at a constant level.
10s
cpu
(2) Reset signal generating block
4) -24V generating circuit
This circuit utilizes mutual inductance of L20 in the +15V
generating circuit to perform full-wave rectification with D4 ~
D7. Q8 is turned on by ZD1 (+30V) to generate -24V.
The -24V is used as the negative power for the LCD panel.
this voltage varies the contrast of the LCD. Time lag is
provided to the negative power of the LCD and LCD control
signal for Q9, Q11, and Q10. For details of time lag, refer to
the reset circuit description.
5 4+5V generating circuit
This circuit stabilizes +5V with the Watt resistor and 5V three-
terminal regulator.
con
seo ASE COMED
This block generates four kinds of reset signals: CPU reset signal,
gate array reset signal, floppy disk controller reset signal, and
liquid-crystal negative power reset signal.
‘These signals monitor and generate +15V. The timing chart of the
power ON and OFF is shown below:
Reset timing chart
AC SW OFF
AC SW ON
DB1+PIN
(Rectitying bridge)
+15V
+5V
LCD negative
chart
PKY
PsT1
‘CPU RESET
&
LCD negative power
applying signal
GATE ARRAY
RESET
When the power is supplied, the CPU reset signal is charged from
15V through R35 to C16. It is kept low until C16 + pin voltage
exceeds ZD2 VZ (+4/2V). When it exceeds VZ, the reset signal
becomes high. In the case of power OFF, the reset signal be-
comes low from high when +15V becomes about 10V.
Since the gate array reset signal must be released at least 4us in
advance to the CPU reset signal in order to take synchionization
with the CPU bus cycle, it is released in advance to the CPU.
The floppy disk controller reset signal has the opposite polarity to
the CPU.
Since the liquid-crystal power reset signal must be reeased at
least 10ms later than the gate array reset signal when the power
is supplied, and must be reset at latest simultaneously when the
power is cut off, it is reset at the same timing as the CPU reset
signal.
2. Mechanism drive block
This block is composed of the drive section of the four pulse motors;
CR (CARRIER), WH (wheel), RB (ribbon), and PF (paper eed); the
hammer solenoid drive section, and the CARRIER origin detecting
section.
(1) Pulse motor drive section
The pulse motor is controlled by the motor drive signal which turns
‘on/off the power applied to the motor and the motor excitag signal
which determines the motor rotation position.
The motor drive signal uses the gate array port for all the four
motors. The motor exciting signal uses the CPU port 2 (12~20
pin) for CR and WH and the gate array port for RB and P=.
The four sections of this block have virtually same drive circuit
composition and the same control system though the motor drive
devices are different. Therefore description is made ony on the
CARRIER motor.

Ses Si
Te, “Sim te ag,
Sr
“1 $B omen
= emo
PA-W1400
(ar
cue ae ay
so7s4sP = 5 wr
Se sree 2
Hs
phe ee He &
th = if t
tie
He
a
a
beter = = Te
Each exciting phase signal outputted from the CPU is amplified
by IC6 and used to determine the CR motor exciting position. By
making CR motor drive signal (CDRV) from the gate array high,
Q23 and Q22 are turned on and +15V is applied to the common
terminal of CR motor, increasing the motor current. While by
making CDRV low, Q23 and Q22 are turned off to apply the
standby current to the CR motor through R58.
The control is performed by two-phase excitement shown in the
timing below. The current applied to the motor common terminal is
controlled by the CDRV.
1/10" Spacing timings
‘CORV
1
P23
(CM1)
—
P22
(CM2)
——
P21 (CM3)
‘P20 (CM4)
ifetalsislel7is; 9 [so [oat | 12
ad
“About
48ms
sal
(2) Hammer control section
This circuit makes the hammer ON signal from the gate array high
to turn on Q20 and Q19, conducting the hammer solenoid.
HY > ona
(3) CARRIER origin detecting section
When the CARRIER comes to the origin, the CPU 60 pin be-
comes low (max. 0.8V) and is detected by this circuit.
wv
ico Res
cPU ws Jt one
wsoresp °|2 ap cn <—
woe ap AO?“ caamien ZERO SENSE
3. Key control block
This circuit uses the CPU port as scan line (output) and sense line
(input), and recognizes the pressed key with the combination of them.
The scan line output timing is as shown below:
This machine recognizes 78 keys with combination of 10 scan lines
and 8 sense lines. (The right and left shift keys are common.) The
key matrix is as shown below:
(Key scan timing and cycles)
soavo “FT
Scant JTL.
scan2_| J im!
SCAN 3 n aml
SCAN 4 J ml
scans _| FT
SCAN 6
SCAN 7
SCAN 8
SCAN 9
ml
1
i
n
}¢e——11ms >|
ber
(Keyboard matrix)
SCANS
SCANS
SCANO
SCAN
Z scanz
Z scana
Z scans 9
PtH
‘SCANS,
Pit
‘ SCANG
SCANT
DSS133 x 10
Lt
SENSEO
SENSES
SENSES 26)
A senses
Ti SeNse7
B
XXUXY

PA-W1400
4. Buzzer drive block
This circuit utilizes the CPU rectangular waveform output function to
output rectangular waveforms from port 0 bit 2 (IC9 62-pin), driving
the buzzer.
‘The buzzer oscillation frequencies are about 4KHz for alarm sound
and about 600Hz for confirmation sound.
5. Liquid crystal display block
This circuit is composed of a gate array and a pseudo-SRAM. The
pseudo-SRAM is used for storing displayed data. The gate array
mediates with the CPU for access, converts data read from the
pseudo-SRAM into data for the LCD unit, and outputs the data with
display control signals to the LCD unit.
The LCD unit control signal timing is shown below:
LCD unit control signal timing
‘Second tie data vansmassion
=A A A
«gt the data rarsmission /\ 200th ine data transmission A
Fre you aims 138m6
M iaeye
Pr 26 cycle
6. Data storing block
This block is composed of the ROM which enables data reading,
RAM which can be read from and written into, and the floppy disk
which is outside the PWB. The CPU memory map is shown below
and description is made for each component.
CPU memory map
When DME is high (program area) When DME is low (program area)
System RAM
|
Maker use area | |
FG stat register
ROM (Bank 0)
Mask ROM.
FROM (Common area)
‘Mask ROM
(1) ROM (Read Only Memory)
This
circuit
is
composed
of
a
4MB
mask
ROM
and
a
256KB
EPROM.
The
256KB
EPROM
is
SOS
ROM
which
is
not
installed
usually.
The
4MB
mask
ROM
pin
configurations
are
shown
bellow:
4MB Mask ROM pin configuration
Pin description
AIT AS
AT 5 Ag
AG [] Ato
AS Att
A4 Oar
Ag [] ata
A2 Als
At Oats
AO Date
CELf10 31] BYTE
eno (14 30 [7] GND
o£/0E (] 12 29 |] D15/A- 1(Note 1)
poL}13 28 |] 07
Ds 14 27 p14
ors 26 |] pe
oe []16 25[_] p13
pe(17 24] Ds
dio L]18 23[_] p12
o3[]19 22[] D4
DW 20 21 vec
Pin name
AI~A17 Address input
DO~D15 Data output
CE Chip enable input
Output enable input (Note 2)
Byte word select input
Power pin (SV)
(Note 1) When the bit composition is set as byte mode, 29-pin
works
as
the
address
input
pin
(A-1).
When
the
bit
com-
position
is
set
as
word
mode,
it
works
as
the
dzfta
output
pin (D15). Bit composition setting is made wth BYTE
input pin.
A-1 is the lowest address pin in the byte mode.
(Note 2) The active level of OE/OE is mask programmah @.

(2) RAM (Random Access Memory)
This
circuit
is
composed
of
a
64K
x
4
bit
DRAM
(Dynamic
RAM),
32KB
pseudo-SRAM
(pseudo
Static
RAM,
TC51832),
and
gate
array.
When
the
CPU
makes
access
to
these
memories,
the
gate
array
performs
address
conversion
and
generates
read
timing
signal
and refreshes DRAM memory.
The
DRAM
read/write
timing,
refresh
timing,
pseudo-SRAM
readiwrite
timing,
DRAM
pin
configurations,
and
pseudo-SRAM
pin configurations are shown below:
DRAM Pin description
oefh [18] vss
vor [2 17) 04
voz [3 16] CAS
WE [4 15] VO3
RAS; ae
as [6 [ra] at
as [7 | [12] az
aa [| [11] as
vec [9 [10] a7
Pin name
Address input
Line address strobe
Row address strobe
Column address strobe
AWE
‘Address bus
(SAN: n=0~7)
Data bus
(SDn: n-0~7,
PA-W1400
DRAM (Dynamic RAM) read cycle timing chart
Address bus
(An: n=0~7)
Data bus
(Dn : ne0-7)
DRAM (Dynamic RAM) retresh cycle timing chart
Pseudo — SRAM Pin description
(TOP VIE!
= When CE is LOW and OE is LOW, tie doves
data VO dopa "data ouput erate”
Note: High: 2.4V ~ VDD.
LOW: GND ~ 0.8V

PA-W1400
Pseudo-SRAM
access
timing
chart
FDC
(Floppy
Drive
Controller)
‘signal
voE
«
x<
BEE abagw
ezeo. 868 eScg
vor BeSEeSSbSesaszae
VWE
= seo; SRRREKERARKL SSS SS] oonoe
(PAN
:
n=O~14)
NC.
2
63)/—°OEM3
FLT 3 fe) 62}+-—roDS0
bus
on n=0-7) SIDE 6 61}-—oGnp2
Data bus GND20-——45 60/-—oDS1
(PDn : n=0~7) FLTR: 6 59f-—rODS2
HDLD: 7 58{-——OGND2
GNOD20—78 57}-—*0DS3
(3)
Floppy
disk
NCO—19
56}-—>ODENt
. 55}-—OGND2
This
circuit
is
composed
of
a
3.5
inch
2DD
(double
side
double
Fe
sa{—e0DENO
density}floppy disk drive (FDD) and a floppy disk controller (FDC) eet be eaoGunt
(IC
name:
uPD72068GF).
Rapes
Fe
pPD72068G
52}—oxBa
The
FOC
pin
functions
are
as
shown
below:
ACTL
i ENRW’
Floppy disk controller pin functions Rae
‘ se MSELO—*117
Signal function finger
Read/write head select signal. Head 1 at LOW, ‘Roo
4 [SPE | O | heado at Hic. we
i_|_ aside |_1_| FD media replaced at LOW. re
go_[ READY | 1 | FDDreadiwrite enable at LOW. nco—|
79 | RDATA | 1 | Read data from FDD exv1o—
ifthe write protection notch of FO media is set
78 | WAT | | | atprotection side, LOW is inputted.
77 | trKo | 1 | LOW when FDD head isat the most outward
track.
vel Be LOW when wit data are wansmited ene
74 | WOATA | © | Write data to the FDD.
FDD head shift timing signal.
73 | STEP | © | 4 track tor 1 pulse.
i ain | o. | FD head shit direction signal.
HIGH when shifting the head outward.
FD media rotating motor rotation start signal.
89. FMO: © | Lowwhen starting rotation.
Drive select signal.
be _ © | Lowwhen input signal from FDD is significant.
44 | INDEX | 1 | LOW when FD media track begins.
Device hardware reset signal.
48 | RESET |! | Ach when resetting.
48 RD |_| Read timing signal rom FOC to CPU.
LOW when reading daia.
oe a |_| Data writing timing signal from CPU to FDC.
LOW when writing data,
21 i | | OPU read/write destination select signal.
LOW when selected as destination.
22 AO |__| FDC intemal register select signal.
25 Do_|_vO_| FDC-GPU readwrite data pin (bit 0)
26 Dt VO_| FDC-CPU readwrite data pin (bit 1)
a7 D2__[ VO | FOC-CPUreadiwrite data pin (bit 2)
28 D3___[ VO | FDC-CPUreadhwrite data pin (bit 3)
30 D4 | WO | FDC-CPU read/write data pin (bit4)
a D5 | WO_| FDC-CPU read/write data pin (bit 5)
32 D6__| WO | FOC-CPU readiwrite data pin (bit 6)
34 07 | WO | FOC-CPU readiwrite data pin (bit7)
= ie |_| FDD-FDC data transmission halt signal.
HIGH when halting.
Note 1: High :2.4V ~ VDD
Lo IND ~ 0.8V
Note 2: FDC = Floppy Disk Controller
FDD = Floppy Disk Drive
Note
3:
Pins
not
listed
above
are
not
used
or
for
fixed
signals.

[5] DISASSEMBLY AND ASSEMBLY
* This chapter describes the disassembly procedure. For assembly
procedure, reverse the disassembly procedure.
For the procedure which requires special care, [Note for disas-
sembly/assembly) is provided.
For lubrication, refer to the section on lubrication and greasing
given hereinafter.
Disassembly and assembly procedures must be performed
deliberately in order to assure the reliability of the product.
* Descriptions for simple and easy replacement of units and parts
are omitted.
1. Upper cabinet (Fig. 5-1, Fig. 5-2)
(1)
2)
(3)
Remove platen knob L and R @.
Remove four screws @.
Use two (-) screwdrivers and pick sections @ to open the upper
and the lower cabinets.
[Fig. 5-2]
[Fig. 5-1]
PA-W1400
Lift the right side of the upper cabinet and remove from the
platen shaft right side ®.
Slide the upper cabinet to the left to separate it from the lower
cabinet.
(6) Remove the display unit from the cable.
[Note for disassembly/assembly]
a. Before opening or assembling the upper cabinet, be sure to
remove the display unit cable from the main PWB or attach it to
the main PWB. (The display unit cable is assembled in the upper
cabinet.)
b. As shown in Fig. 5-2, when opening or assembling the upper
cabinet, be careful not to hit the PF holder spring © in the left side
of the mechanism unit. (If the spring is stretched out, replace it
with a new one.) (See Fig. 5-2.)
c. When installing the upper cabinet, carefully protect the LCD cable
from being caught by the printer unit and the key top.
(4)
(5)
2. LCD unit (See Fig. 5-3.)
(1)
(2)
Remove the upper cabinet. (See "1. Upper cabinet” above.)
Place the upper cabinet upside down. Use the LCD removing
tool (UKOGM2024CSZZ) to push projection ®, lift the LCD unit
towards ®, and remove it from the guide section. (There are
two projections in the both sides.)
Move friction arm @ in the direction © to remove it from LCD
unit ®. (there are two friction arms in both side.)
Remove the one side of tilt spring @ from section © of the LCD
unit. (Two sides.)
Remove LCD unit ®. At that time, remove also the cable from
the LCD unit.
(3)
(4)
LCD removing tool
(UKOGM2024C8Zz)
IFig. 5
[Note for disassembly/assembly]
a. Friction arm @ and friction spring @ are heavily greased with
screw grease (UKOG-0185CSZZ). Be careful to the greasi,
b. Aheavy pressure on the liquid crystal glass may break the:glass.
c. If friction spring @ is not greased with screw grease, bessure to
apply about 0.29 of screw grease to the whole surface oi -friction
spring @.
(for details, refer to "Lubrication and greasing.")

PA-W1400
3. LCD cabinet (Fig. 5-4)
(1) Remove the upper cabinet. (See "1. Upper cabinet.") (7) Remove LCD unit © and volume knobs @ and @. (Handle with
(2) Remove the LCD unit. (See "2. LCD unit.") care. They are fragile.)
(3) Putthe LCD unit upside down, and remove four screws ©. (8) Remove connector ©) o invertor unit @ and remove CCFT
ek. ‘ (cool cathode ray tube) ®.
(4) Insert a screwdriver into position ® to open the display cabinet
o BQ. Postion, ©1099 iia eas (9) Remove two stay rubbers A @ and stay rubber B @.
(5) Remove the four screws @ and remove the stay angle @.
(10) Remove the invertor unit @ from two pawis on display cabinet A
(Be careful that the installing direction differs in the PA-W1400 ®.
and
the
PA-W1410.)
(11)
Remove
correction
sheet
@.
(6)
Use
point
©
as
a
fulcrum
to
lift
section
®
towards
©
and
(12)
Remove
two
tilt
pins
@
and
two
tile
springs
@
from
display
remove
back
board
@).
(Lift.section
@
towards
©
in
order
not
cabinet
A@.
‘
to make contact with CCFT (cool cathode ray tube) ®.
Pe
i
|
|
=
ae)
iy
s
1
PA-W1400 f ¢
PA-W1410
The chipped part
Fig. 5-4)

(Description on the tilt mechanism)
The tilt mechanism functions to set the LCD unit to a desired angle.
LCD unit @ is liked with arm @ (the link shaft) and a friction is
applied to arm @.
@ Upper cabinet
@® Lop unit eS
@ Friction spring
IFig. 5-5]
(Descriptions on the backlight and the photoconductive
plate)
+ The PAW1410 employs the edge-light system backlight. The light
emitted from CCFT (cool cathode ray tube) © is radiated on the
‘edge of the photoconductive plate to illuminate the LCD evenly.
@
Correction
sheet
Vv,
@
Stay
angle
LCD PWB unit
Photoconductive plate
IFig. 5-6]
Bent portion
IFig. 5-7]
Note: Be careful to the photoconductive plate mounting direction.
‘The transparent surface must come onto the CCFT, and the
notched surface must come onto the stay angle.
* The CCFT (cool cathode ray tube) is driven and controlled by the
invertor unit.
PA-W1400
(Note for disassembly/assembly)
a.
b.
c.
4.
(1)
(2)
(3)
(4)
<A
(1)
(2)
(3)
(4)
Before servicing work, be sure to turn off the power source.
Be careful not to allow foreign materials to enter the unit.
Cover the photoconductive plate with the correction sheet to in-
hibit leakage of light.
|. Be careful to the mounting directions of the stay angle and the
photoconductive plate. (refer to Fig. 5-5 and Fig. 5-6.)
.
Carefully
treat
the
CCFT
and
the
LCD
unit
because
they
are
fragile.
Keyboard
unit
(Refer
to
Fig.
5-8.)
Remove
the
upper
cabinet.
(For
removing
procedure,
refer
to
(5)-1,)
Put
down
the
shaded
portion
of
fixing
paw!
®
in
the
arrow
direction
and
release
the
lock.
Lift the keyboard in the arrow direction and remove it.
Disconnect
the
keyboard
flat
cable
©
and
©
from
the
main
Pwe.
ssembly procedure>
Set the dent portion of the keyboard to fixing pawl @).
Two ribs are provided at the lower rear side of the board. Insert
the ribs into holes © and ©.
Bend
the
shaded
portion
of
paw!
in
the
arrow
direction
and
hang
on
the
lock.
Confirm insertion of the key angle projection.
a.
5.
(1)
(2)
(3)
(4)
6)
IFig. 5-8]
(Note for disassembly/assembly)
When the board is hanged on fixing pawl @, do not rotate in
direction of ®.
. Do not bend fixing pawl @ excessively.
. The flat cable terminal must not be folded.
|. Check that key angle @ projection and section © of ke yboard
unit D.
Mechanical unit (Refer to Fig. 5-9.)
Remove the upper cabinet. (For removal procedure, refer to
(5}1.)
Remove keyboard unit (. (For removal procedure, refer to [5}-
4)
Remove two screws @ which are fixing mechanical unit @ to
lower cabinet ©.
Disconnect cable connectors @, ©, D, and ® (wiiéch are
connected with main PWB @) from the mechanical unit.
Remove mechanical unit @.