Silicon Laboratories C8051F500 User manual

Rev. 0.1 6/08 Copyright © 2008 by Silicon Laboratories C8051F500DK
C8051F500DK
C8051F500 DEVELOPMENT KIT USER’SGUIDE
1. Relevant Devices
The C8051F500 Development Kit is intended as a development platform for the microcontrollers in the C8051F50x
MCU family. The members of this MCU family are: C8051F500, C8051F501, C8051F502, C8051F503,
C8051F504, C8051F505, C8051F506, and C8051F507.
The target board included in this kit is provided with a pre-soldered C8051F500 MCU (QFP48 package) and a
C8051F502 (QFN32 package).
Code developed on the C8051F500 can be easily ported to the other members of this MCU family.
Refer to the C8051F50x data sheet for the differences between the members of this MCU family.
2. Kit Contents
The C8051F500 Development Kit contains the following items:
C8051F500 Target Board
C8051Fxxx Development Kit Quick-Start Guide
Silicon Laboratories IDE and Product Information CD-ROM. CD content includes:
Silicon Laboratories Integrated Development Environment (IDE)
 Keil 8051 Development Tools (macro assembler, linker, evaluation ‘C’ compiler)
 Source code examples and register definition files
 Documentation
 C8051F500 Development Kit User’s Guide (this document)
AC to DC Power Adapter
USB Debug Adapter (USB to Debug Interface)
Two USB Cables
3. Getting Started
The necessary software to download, debug, and communicate with the target microcontroller is included in the
CD-ROM. The following software is necessary to build a project, download code to, and communicate with the
target microcontroller:
Silicon Laboratories Integrated Development Environment (IDE)
Keil 8051 Development Tools (macro assembler, linker, evaluation ‘C’ compiler)
Other useful software that is provided in the CD-ROM includes:
Configuration Wizard 2
Keil uVision Drivers
CP210x USB to UART Virtual COM Port (VCP) Drivers

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3.1. Software Installation
The included CD-ROM contains the Silicon Laboratories Integrated Development Environment (IDE), Keil software
8051 tools and additional documentation. Insert the CD-ROM into your PC’s CD-ROM drive. An installer will
automatically launch, allowing you to install the IDE software or read documentation by clicking buttons on the
Installation Panel. If the installer does not automatically start when you insert the CD-ROM, run autorun.exe found
in the root directory of the CD-ROM. Refer to the ReleaseNotes.txt file on the CD-ROM for the latest information
regarding known problems and restrictions. After installing the software, see the following sections for information
regarding the software and running one of the demo applications.
3.2. CP210x USB to UART VCP Driver Installation
The C8051F500 Target Board includes a Silicon Laboratories CP2102 USB-to-UART Bridge Controller. Device
drivers for the CP2102 need to be installed before PC software such as HyperTerminal can communicate with the
target board over the USB connection. If the "Install CP210x Drivers" option is selected during installation, a driver
“unpacker” utility will launch.
1. Follow the steps to copy the driver files to the desired location. The default directory is C:\SiLabs\MCU\CP210x.
2. The final window will give an option to install the driver on the target system. Select the “Launch the CP210x VCP Driver
Installer” option if you are ready to install the driver.
3. If selected, the driver installer will now launch, providing an option to specify the driver installation location. After pressing
the “Install” button, the installer will search your system for copies of previously installed CP210x Virtual COM Port drivers. It
will let you know when your system is up to date. The driver files included in this installation have been certified by Microsoft.
4. If the “Launch the CP210x VCP Driver Installer” option was not selected in step 3, the installer can be found in the location
specified in step 2, by default C:\SiLabs\MCU\CP210x\Windows_2K_XP_S2K3_Vista. At this location run
CP210xVCPInstaller.exe.
5. To complete the installation process, connect the included USB cable between the host computer and the USB connector
(P5) on the C8051F500 Target Board. Windows will automatically finish the driver installation. Information windows will pop
up from the taskbar to show the installation progress.
6. If needed, the driver files can be uninstalled by selecting “Silicon Laboratories CP210x USB to UART Bridge (Driver
Removal” option in the “Add or Remove Programs” window.
4. Software Overview
4.1. Silicon Laboratories IDE
The Silicon Laboratories IDE integrates a source-code editor, a source-level debugger, and an in-system Flash
programmer. See Section 6. "Using the Keil Software 8051 Tools with the Silicon Laboratories IDE‚" on page 5 for
detailed information on how to use the IDE. The Keil Evaluation Toolset includes a compiler, linker, and assembler
and easily integrates into the IDE. The use of third-party compilers and assemblers is also supported.
4.1.1. IDE System Requirements
The Silicon Laboratories IDE requirements:
Pentium-class host PC running Microsoft Windows 2000 or newer.
One available USB port.
64 MB RAM and 40 MB free HD space recommended.
4.1.2. Third Party Toolsets
The Silicon Laboratories IDE has native support for many 8051 compilers. The full list of natively supported tools is:
Keil
IAR
Raisonance
Tasking
Hi-Tech
SDCC
Please note that the demo applications for the C8051F500 target board are written to work with the Keil and SDCC
toolsets.

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4.2. Keil Evaluation Toolset
4.2.1. Keil Assembler and Linker
The assembler and linker that are part of the Keil Demonstration Toolset are the same versions that are found in
the full Keil Toolset. The complete assembler and linker reference manual can be found on-line under the Help
menu in the IDE or in the “SiLabs\MCU\hlp” directory (A51.pdf).
4.2.2. Keil Evaluation C51 C Compiler
The evaluation version of the C51 compiler is the same as the full version with these limitations: (1) Maximum 4 kB
code generation, and (2) Floating point library not included. When installed from the CD-ROM, the C51 compiler is
initially limited to a code size of 2 kB, and programs start at code address 0x0800. Please refer to the Application
Note “AN104: Integrating Keil Tools into the Silicon Labs IDE" for instructions to change the limitation to 4 kB, and
have the programs start at code address 0x0000.
4.3. Configuration Wizard 2
The Configuration Wizard 2 is a code generation tool for all of the Silicon Laboratories devices. Code is generated
through the use of dialog boxes for each of the device's peripherals.
Figure 1. Configuration Wizard 2 Utility
The Configuration Wizard 2 utility helps accelerate development by automatically generating initialization source
code to configure and enable the on-chip resources needed by most design projects. In just a few steps, the wizard
creates complete startup code for a specific Silicon Laboratories MCU. The program is configurable to provide the
output in C or assembly. For more information, please refer to the Configuration Wizard 2 help available under the
Help menu in Config Wizard 2.

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4.4. Keil uVision2 and uVision3 Silicon Laboratories Drivers
As an alternative to the Silicon Laboratories IDE, the uVision debug driver allows the Keil uVision IDE to
communicate with Silicon Laboratories on-chip debug logic. In-system Flash memory programming integrated into
the driver allows for rapidly updating target code. The uVision IDE can be used to start and stop program
execution, set breakpoints, check variables, inspect and modify memory contents, and single-step through
programs running on the actual target hardware.
For more information, please refer to the uVision driver documentation. The documentation and software are
available from the Downloads webpage (www.silabs.com/mcudownloads).
5. Hardware Setup using a USB Debug Adapter
The target board is connected to a PC running the Silicon Laboratories IDE via the USB Debug Adapter as shown
in Figure 2.
1. Connect the USB Debug Adapter to one of the DEBUG connector on the target board (DEBUG_A or
DEBUG_B) with the 10-pin ribbon cable. The recommended connection is to DEBUG_A as this microcon-
troller is the primary MCU on the board and more peripherals are easily available.
2. Connect one end of the USB cable to the USB connector on the USB Debug Adapter.
3. Connect the other end of the USB cable to a USB Port on the PC.
4. Connect the AC/DC power adapter to power jack P4 on the target board.
Notes:
• Use the Reset button in the IDE to reset the target when connected using a USB Debug Adapter.
• Remove power from the target board and the USB Debug Adapter before connecting or disconnecting the
ribbon cable from the target board. Connecting or disconnecting the cable when the devices have power can
damage the device and/or the USB Debug Adapter.
Figure 2. Hardware Setup using a USB Debug Adapter
P4
P1
C8051F500-TB
PWR
COMM
P1.3_A
P1.3_B
P1.4_B
P1.4_A
P1 Port 0 “A”
J1
Port 4 “A”
J5
Port 2 “A”
J3
Port 1 “A”
J2
Port 3 “A”
J4
+LIN_V
LIN_OUT
GND
DEBUG_A
P2
CAN_H
CAN_L
GND
R27
SIDE “A”
SIDE “B”
DEBUG_B
P3
TB3
RESET_A
RESET_B
J20
SILICON LABS
www.silabs.com
DS4
DS2
DS3
DS1
J14
J22
J19
J18
J21
J7
J10 J9
J24
J17
Port 0 “B”
J27
Port 2 “B”
J29
Port 1 “B”
J28
J11
F502
U2
C8051
F500
U1
J31
J32 J8 J26
U5
PC
USB
Cable
AC/DC
Adapter
Target Board
Silicon Laboratories
USB DEBUG ADAPTER
Run
Stop Power
USB Debug
Adapter

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6. Using the Keil Software 8051 Tools with the Silicon Laboratories IDE
To perform source-level debugging with the IDE, you must configure the Keil 8051 tools to generate an absolute
object file in the OMF-51 format with object extensions and debug records enabled. You may build the OMF-51
absolute object file by calling the Keil 8051 tools at the command line (e.g., batch file or make file) or by using the
project manager built into the IDE. The default configuration when using the Silicon Laboratories IDE project
manager enables object extension and debug record generation.
Refer to Application Note "AN104: Integrating Keil
8051 Tools into the Silicon Labs IDE"
in the “SiLabs\MCU\Documentation\ApplicationNotes” directory for additional
information on using the Keil 8051 tools with the Silicon Laboratories IDE.
To build an absolute object file using the Silicon Laboratories IDE project manager, you must first create a project.
A project consists of a set of files, IDE configuration, debug views, and a target build configuration (list of files and
tool configurations used as input to the assembler, compiler, and linker when building an output object file).
The following sections illustrate the steps necessary to manually create a project with one or more source files,
build a program, and download the program to the target in preparation for debugging. (The IDE will automatically
create a single-file project using the currently open and active source file if you select Build/Make Project before a
project is defined.)
6.1. Creating a New Project
1. Select Project→New Project to open a new project and reset all configuration settings to default.
2. Select File→New File to open an editor window. Create your source file(s) and save the file(s) with a
recognized extension, such as .c, .h, or .asm, to enable color syntax highlighting.
3. Right-click on “New Project” in the Project Window. Select Add files to project. Select files in the file
browser and click Open. Continue adding files until all project files have been added.
4. For each of the files in the Project Window that you want assembled, compiled, and linked into the target
build, right-click on the file name and select
Add file to build . Each file will be assembled or compiled as
appropriate (based on file extension) and linked into the build of the absolute object file.
Note: If a project contains a large number of files, the “Group” feature of the IDE can be used to organize the
files. Right-click on “New Project” in the
Project Window . Select Add Groups to project . Add pre-defined
groups or add customized groups. Right-click on the group name and choose
Add file to group . Select files
to be added. Continue adding files until all project files have been added.

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6.2. Building and Downloading the Program for Debugging
1. Once all source files have been added to the target build, build the project by clicking on the Build/Make
Project button in the toolbar or selecting Project→Build/Make Project from the menu.
Note: After the project has been built the first time, the Build/Make Project command will only build the
files that have been changed since the previous build. To rebuild all files and project dependencies, click
on the Rebuild All button in the toolbar or select Project→Rebuild All from the menu.
2. Before connecting to the target device, several connection options may need to be set. Open the
Connection Options window by selecting Options → Connection Options... in the IDE menu. First, select
the appropriate adapter in the “Serial Adapter” section. Next, the correct “Debug Interface” must be selected.
C8051F50x family devices use the Silicon Labs 2-wire (C2) debug interface. Once all the selections are made,
click the OK button to close the window.
3. Click the
Connect button in the toolbar or select Debug → Connect from the menu to connect to the device.
4. Download the project to the target by clicking the Download Code button in the toolbar.
Note: To enable automatic downloading if the program build is successful, select Enable automatic
connect/download after build in the Project→Target Build Configuration dialog. If errors occur during
the build process, the IDE will not attempt the download.
5. Save the project when finished with the debug session to preserve the current target build configuration,
editor settings and the location of all open debug views. To save the project, select Project→Save Project
As... from the menu. Create a new name for the project and click on Save.
7. Example Source Code
Example source code and register definition files are provided in the “SiLabs\MCU\Examples\C8051F50x_1x\”
directory during IDE installation. These files may be used as a template for code development. Example
applications include a blinking LED example which configures the green LED on the target board to blink at a fixed
rate.
7.1. Register Definition Files
Register definition files C8051F500.inc and C8051F500_defs.h define all SFR registers and bit-addressable
control/status bits. A macro definition header file compiler_defs.h is also included, and is required to be able to use
the C8051F500_defs.h header file with various tool chains. These files are installed into the
“SiLabs\MCU\Examples\C8051F50x_1x\Header_Files\” directory during IDE installation by default. The register
and bit names are identical to those used in the C8051F50x data sheet. These register definition files are also
installed in the default search path used by the Keil Software 8051 tools. Therefore, when using the Keil 8051 tools
included with the development kit (A51, C51), it is not necessary to copy a register definition file to each project’s
file directory.
7.2. Blinking LED Example
The example source files F500_Blinky.asm and F500_Blinky.c installed in the default directory
“SiLabs\MCU\Examples\C8051F50x_1x\Blinky” show examples of several basic C8051F500 functions. These
include disabling the watchdog timer (WDT), configuring the Port I/O crossbar, configuring a timer for an interrupt
routine, initializing the system clock, and configuring a GPIO port pin. When compiled/assembled and linked, this
program flashes the green LED on the C8051F500 target board about five times a second using the interrupt
handler with a C8051F500 timer.

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8. Target Board
The C8051F500 Development Kit includes a target board with a C8051F500 (Side A) and C8051F502 (Side B)
device pre-installed for evaluation and preliminary software development. Numerous input/output (I/O) connections
are provided to facilitate prototyping using the target board. Refer to Figure 3 for the locations of the various I/O
connectors. Figure 4 on page 9 shows the factory default shorting block positions. A summary of the signal names
and headers is provided in Table 11 on page 16.
J1-J5 Side A: Port 0 through Port 4 headers
J7 Header to choose between +5V from Debug Adapter (P2) or +5V from on-board regulator (U6)
J8 Side B: CAN Transceiver (U4) power connector
J9, J10 Side A: External crystal enable connectors
J11 Side B: Connects P1.3_B LED and P1.4_B Switch to MCU port pins
J14 Side A: CAN Transceiver (U3) power connector
J17 Side A: Connects MCU to three separate transceivers (UART(U5), CAN(U3) and LIN(T1))
J18 Side A: Connects VIO to VIO_A_SRC which powers the P1.2 potentiometer, the
/RST_A pin pull-up, and P1.4_A Switch pull-up.
J19 Side A: Connects P1.3_A LED and P1.4_A Switch to MCU port pins
J20 Side A: Connects R27 potentiometer to port pin 1.2
J21 Connect V_HIGH node from TB1 LIN header to +5V regulator input for board power
J22 Side A: Connects decoupling capacitors C28 and C29 for MCU VREF (P0.0)
J24 Side A: Connects +5V net to VIO and VREGIN of the MCU
J26 Side B: Connects MCU to three separate transceivers (CAN (U4) and LIN (T2))
J27-J29 Side B: Port 0 through Port 2 headers
J31 Side B: Connects +5V net to VIO and VREGIN of the MCU
J32 Side B: Connects decoupling capacitors C41 and C42 for MCU VREF (P0.0)
P1 Side A: 96-pin female connector
P2 Side A: DEBUG connector for Debug Adapter interface
P3 Side B: DEBUG connector for Debug Adapter interface
P4 Power connector (accepts input from 7 to 15 VDC unregulated power adapter)
P5 USB connector (connects to PC for serial communication)
TB1 Shared LIN Connector for Side A and B MCUs for external nodes
TB2 Shared CAN Connector for Side A and B MCUs for external nodes
TB3 Side A: Power supply terminal block

C8051F500DK
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Figure 3. C8051F500 Target Board with Pin Numbers
P4
P5
C8051F500-TB
PWR
COMM
P1.3_A
P1.3_B
P1.4_B
P1.4_A
P1 Port 0 “A”
J1
Port 4 “A”
J5
Port 2 “A”
J3
Port 1 “A”
J2
Port 3 “A”
J4
+LIN_V
LIN_OUT
GND
DEBUG_A
P2
CAN_H
CAN_L
GND
R27
SIDE “A”
SIDE “B”
DEBUG_B
P3
TB3
RESET_A
RESET_B
J20
SILICON LABS
www.silabs.com
DS4
DS2
DS3
DS1
J14
J22
J19
J18
J21
J7
J10 J9
J24
J17
Port 0 “B”
J27
Port 2 “B”
J29
Port 1 “B”
J28
J11
F502
U2
C8051
F500
U1
J31
J32
J8 J26
U5
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
2
1
2
2
2
2
2
2
2
2
2
2
2
1
TB1 TB2

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8.1. Target Board Shorting Blocks: Factory Defaults
The C8051F500 target board comes from the factory with pre-installed shorting blocks on many headers. Figure 4
shows the positions of the factory default shorting blocks.
Figure 4. C8051F500 Target Board Shorting Blocks: Factory Defaults
P4
P1
C8051F500-TB
PWR
COMM
P1.3_A
P1.3_B
P1.4_B
P1.4_A
P1 Port 0 “A”
J1
Port 4 “A”
J5
Port 2 “A”
J3
Port 1 “A”
J2
Port 3 “A”
J4
+LIN_V
LIN_OUT
GND
DEBUG_A
P2
CAN_H
CAN_L
GND
R27
SIDE “A”
SIDE “B”
DEBUG_B
P3
TB3
RESET_A
RESET_B
J20
SILICON LABS
www.silabs.com
DS4
DS2
DS3
DS1
J14
J22
J19
J18
J21
J7
J10 J9
J24
J17
Port 0 “B”
J27
Port 2 “B”
J29
Port 1 “B”
J28
J11
F502
U2
C8051
F500
U1
J31
J32
J8 J26
U5

C8051F500DK
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8.2. Target Board Power Options and Current Measurement
The C8051F500 target board supports three power options:
1. 12V DC power using the AC to DC power adapter (P4)
2. 5V DC USB VBUS power from PC via the USB Debug Adapter (DEBUG_A)
3. 12V DC power from the LIN external header (TB1)
The two 12V power sources are ORed together using reverse-biased diodes (Z1 and Z2). The ORed power is
regulated to a 5.0V DC voltage using a LDO regulator (U6). To power the board from the USB Debug Adapter
connected to DEBUG_A instead of the 12V sources, move the shorting block on the J7 header to pins 2 and 3 to
select SER_PWR. The output of the regulator powers the +5VD net on the target board, and is also connected to
one end of the header J24 (SIDE A) and J31 (SIDE B). Two shorting blocks can be put on each header to connect
the 5V net to the VREGIN and VIO pins on the two MCUs. With the shorting block removed, a source meter can be
used across the headers to measure the current consumption of the MCU.
Note: The USB Debug Adapter does not provide the necessary peak power for the CAN transceivers to operate. One of the
12V DC sources is recommended for CAN transceiver operation.
8.3. System Clock Sources
8.3.1. Internal Oscillators
The C8051F500 and C8051F502 devices installed on the target board feature a factory calibrated programmable
high-frequency internal oscillator (24 MHz base frequency, ±0.5%), which is enabled as the system clock source on
reset. After reset, the internal oscillator operates at a frequency of 187.5 kHz by default but may be configured by
software to operate at other frequencies. The on-chip crystal is accurate for CAN and LIN master communications
and in many applications an external oscillator is not required. However, if you wish to operate the C8051F500
device (SIDE A) at a frequency not available with the internal oscillator, an external crystal may be used. Refer to
the C8051F50x data sheet for more information on configuring the system clock source.
8.3.2. External Oscillator Options
The target board is designed to facilitate the installation of an external crystal. Remove shorting blocks at headers
J9 and J10 and install the crystal at the pads marked Y1. Install a 10 MΩresistor at R9 and install capacitors at C6
and C7 using values appropriate for the crystal you select. If you wish to operate the external oscillator in capacitor
or RC mode, options to install a capacitor or an RC network are also available on the target board. Populate C6 for
capacitor mode, and populate R3 and C6 for RC mode. Refer to the C8051F50x data sheet for more information on
the use of external oscillators.