Silicon Laboratories Si5396J-A-EVB User manual

UG336: Si5396 Evaluation Board User's
Guide
The Si5396J-A-EVB is used for evaluating the Si5396 Any-Frequency, Any-
Ouput, Jitter-Attenuating Clock Multiplier. There is only one EVB for the
Si5396, which is an embedded reference device. There is no EVB for the
external reference grade version for the Si5396-EVB. The device grade and
revision is distinguished by a white 1 inch x 0.187 inch label with the text
“Si5396J-A-EB” installed in the lower left hand corner of the board. (For or-
dering purposes only, the terms “EB” and “EVB” refer to the board and the
kit respectively. For the purpose of this document, the terms are synony-
mous in context.)
KEY FEATURES OR KEY POINTS
• Si5396J-A-EVB for evaluating internal reference versions
Si5396J/K/L/M
•Powered from USB port or external power supply.
•ClockBuilder® Pro (CBPro) GUI programmable VDD
supply allows device to operate from 3.3, 2.5, or 1.8 V.
• CBPro GUI allows control and measurement of voltage,
current, and power of VDD and all 4 VDDO supplies.
• Status LEDs for power supplies and control/status
signals of Si5396.
• SMA connectors for input clocks and output clocks
silabs.com | Building a more connected world. Rev. 1.0

Table of Contents
1. Si5396J-A-EVB Functional Block Diagram ....................3
2. Si5396J-A-EVB Support Documentation and ClockBuilder Pro Software .........4
3. Quick Start ................................5
4. Jumper Defaults ..............................6
5. Status LEDs................................7
6. Clock Input Circuits (INx/INxB) .........................8
7. Clock Output Circuits (OUTx/OUTxB) ......................9
8. External Reference Clock (XA/XB) Not Supported ................10
9. Installing ClockBuilder Pro Desktop Software ..................11
10. Using the Si5396J-A-EVB .........................12
10.1 Connecting the EVB to Your Host PC ......................12
10.2 Overview of ClockBuilder Pro Applications ....................13
10.3 Common ClockBuilder Pro Work Flow Scenarios ..................14
10.4 Workflow Scenario #1: Testing a Silicon Labs-Created Default Configuration ........15
10.4.1 Verify Free-Run Mode Operation ......................18
10.4.2 Verify Locked Mode Operation .......................20
10.5 Workflow Scenario #2: Modifying the Default Silicon Labs-Created Device
Configuration ..............................21
10.6 Workflow Scenario #3: Testing a User-Created Device Configuration ...........23
10.7 Exporting the Register Map File for Device Programming by a Host Processor ........26
11. Writing a New Frequency Plan or Device Configuration to Non-Volatile Memory (OTP) ..28
12. Serial Device Communications .......................29
12.1 Onboard SPI Support ...........................29
12.2 External I2C Support ...........................29
13. Si5396J-A-EVB Schematic and Bill of Materials (BOM) ..............30
silabs.com | Building a more connected world. Rev. 1.0 | 2

1. Si5396J-A-EVB Functional Block Diagram
Below is a functional block diagram of the Si5396J-A-EVB. This evaluation board can be connected to a PC via the main USB connec-
tor for programming, control, and monitoring. See section 3. Quick Startor section 9. Installing ClockBuilder Pro Desktop Softwarefor
more information.
Si5396J
CLKOUT_0
CLKOUT_0B
Output
Termination
CLKOUT_1
CLKOUT_1B
Output
Termination
Input
Termination
Input
Termination
Input
Termination
CLKIN_0
CLKIN_0B
CLKIN_1
CLKIN_1B
Power Supply
C8051F380
MCU
+
Peripherals
I2C/SPI Bus
VDDO_0
VDD_Core
VDD_3.3
VDDO_1
VDDO_0 VDD_Core VDD_3.3 VDDO_1
Main USB
Connector
USB Aux +5V
Connector
I2C
+5V_USB
+5V_Ext
VDDMCU
{
Input Clock 0
{
Input Clock 1
{
}Output Clock 0
}Output Clock 1
Power only
Control/
Status
INTR
Alarm_Status
Input
Termination
CLKIN_2
CLKIN_2B
{
SPI
Conn
Input Clock 3 CLKIN_3
CLKIN_3B
Input Clock 2
CLKOUT_2
CLKOUT_2B
Output
Termination
CLKOUT_3
CLKOUT_3B
Output
Termination
}Output Clock 2
}Output Clock 3
Figure 1.1. Si5396J-A-EVB Functional Block Diagram
UG336: Si5396 Evaluation Board User's Guide
Si5396J-A-EVB Functional Block Diagram
silabs.com | Building a more connected world. Rev. 1.0 | 3

2. Si5396J-A-EVB Support Documentation and ClockBuilder Pro Software
All Si5396J-A-EVB schematics, BOMs, User’s Guides, and software can be found online:
www.silabs.com/documents/public/schematic-files/si539x-design-files.zip
UG336: Si5396 Evaluation Board User's Guide
Si5396J-A-EVB Support Documentation and ClockBuilder Pro Software
silabs.com | Building a more connected world. Rev. 1.0 | 4

3. Quick Start
1. Install ClockBuilder Pro desktop software from https://www.silabs.com/products/development-tools/software/clock.
2. Connect a USB cable from Si5396J-A-EB to the PC where the software was installed.
3. Confirm jumpers are installed as shown in Table 4.1 Si5396J-A-EVB Jumper Defaults on page 6.
4. Launch the ClockBuilder Pro Software.
5. You can use ClockBuilder Pro to create, download, and run a frequency plan on the Si5396-A-EB.
6. Find the Si5396J data sheet: https://www.silabs.com/documents/public/data-sheets/si5397-96-a-datasheet.pdf
UG336: Si5396 Evaluation Board User's Guide
Quick Start
silabs.com | Building a more connected world. Rev. 1.0 | 5

4. Jumper Defaults
Table 4.1. Si5396J-A-EVB Jumper Defaults
Location Type I = Installed
0 = Open
Location Type I = Installed
0 = Open
JP1 2 pin I
JP2 2 pin I
JP3 2 pin O
JP4 2 pin I
JP5 3 pin 1 to 2 (USB)
J17 5 x 2 Hdr All 5 installed
Note: Refer to the Si5396J-A-EVB schematics for the functionality associated with each jumper.
UG336: Si5396 Evaluation Board User's Guide
Jumper Defaults
silabs.com | Building a more connected world. Rev. 1.0 | 6

5. Status LEDs
Table 5.1. Si5396J-A- EVB Status LEDs
Location Silkscreen Color Status Function Indication
D5 LOS_XAXBB Blue XA/XB Loss of Signal indicator
D6 INTRB Blue MCU INTR (Interrupt) active
D7 LOL_BB Blue DSPLL A Loss of Lock indicator
D8 LOL_AB Blue DSPLL B Loss of Lock indicator
D11 +5V MAIN Green Main USB +5V present
D12 READY Green MCU Ready
D13 BUSY Green MCU Busy
D5, D6, D7, and D8 are status LEDs indicating the device alarms currently asserted. D11 is illuminated when USB +5 V supply voltage
is present. D12 and D13 are status LEDs showing on-board MCU activity.
Figure 5.1. Status LEDs
UG336: Si5396 Evaluation Board User's Guide
Status LEDs
silabs.com | Building a more connected world. Rev. 1.0 | 7

6. Clock Input Circuits (INx/INxB)
The Si5396J-A-EVB has eight SMA connectors (IN0/IN0B–IN3/IN3B) for receiving external clock signals. All input clocks are terminated
as shown in Figure 6.1 Input Clock Termination Circuit on page 8 below. Note input clocks are ac-coupled and 50 Ω terminated. This
represents four differential input clock pairs. Single-ended clocks can be used by appropriately driving one side of the differential pair
with a single-ended clock. For details on how to configure inputs as single-ended, please refer to the Si5396 data sheet. Typically a
0.1 μF dc block is sufficient, however, 10 μF may be needed for lower input frequencies. Note that the EVB is populated with both dc
block capacitor values.
Figure 6.1. Input Clock Termination Circuit
UG336: Si5396 Evaluation Board User's Guide
Clock Input Circuits (INx/INxB)
silabs.com | Building a more connected world. Rev. 1.0 | 8

7. Clock Output Circuits (OUTx/OUTxB)
Each of the eight output drivers (four differential pairs) is ac-coupled to its respective SMA connector. The output clock termination cir-
cuit is shown in Figure 7.1 Output Clock Termination Circuit on page 9 below. The output signal will have no dc bias. If dc coupling is
required, the ac coupling capacitors can be replaced with a resistor of appropriate value. The Si5396J-A-EVB provides an L-network at
OUT0/OUT0B output pins for optional output termination resistors. Note that components with schematic “NI” designation are not nor-
mally populated.
Figure 7.1. Output Clock Termination Circuit
UG336: Si5396 Evaluation Board User's Guide
Clock Output Circuits (OUTx/OUTxB)
silabs.com | Building a more connected world. Rev. 1.0 | 9

8. External Reference Clock (XA/XB) Not Supported
The Si5396J-A-EVB does not support an external reference clock on XA/XB. The layout for the external XTAL is on the board, but the
EVB for this part is an embedded XTAL version only and therefore this circuit should remain disconnected and unused.
Figure 8.1. External Reference Clock Termination Circuit
UG336: Si5396 Evaluation Board User's Guide
External Reference Clock (XA/XB) Not Supported
silabs.com | Building a more connected world. Rev. 1.0 | 10

9. Installing ClockBuilder Pro Desktop Software
To install the CBOPro software on any Windows 7 (or above) PC:
Go to http://www.silabs.com/CBPro and download ClockBuilder Pro software.
Installation instructions and User’s Guide for ClockBuilder Pro can be found at the download link shown above. Please follow the in-
structions as indicated.
UG336: Si5396 Evaluation Board User's Guide
Installing ClockBuilder Pro Desktop Software
silabs.com | Building a more connected world. Rev. 1.0 | 11

10. Using the Si5396J-A-EVB
10.1 Connecting the EVB to Your Host PC
Once ClockBuilder Pro software is installed, connect to the EVB with a USB cable as shown below.
Figure 10.1. EVB Connection Diagram
UG336: Si5396 Evaluation Board User's Guide
Using the Si5396J-A-EVB
silabs.com | Building a more connected world. Rev. 1.0 | 12

10.2 Overview of ClockBuilder Pro Applications
The following instructions and screen captures may vary slightly depending on the version of ClockBuilder Pro. (The screen captures
below were taken for a board labeled "SI5396J-A-EB".) The ClockBuilder Pro installer will install two main applications:
Figure 10.2. Application #1: ClockBuilder Pro Wizard
Use the CBPro Wizard to:
• Create a new design
• Review or edit an existing design
• Export: create in-system programming
UG336: Si5396 Evaluation Board User's Guide
Using the Si5396J-A-EVB
silabs.com | Building a more connected world. Rev. 1.0 | 13

Figure 10.3. Application #2: EVB GUI
Use the EVB GUI to:
• Download configuration to EVB’s DUT (Si5396)
• Control the EVB’s regulators
• Monitor voltage, current, power on the EVB
10.3 Common ClockBuilder Pro Work Flow Scenarios
There are three common workflow scenarios when using CBPro and the Si5396J-A-EVB. These workflow scenarios are:
• Workflow Scenario #1: Testing a Silicon Labs-Created Default Configuration
• Workflow Scenario #2: Modifying the Default Silicon Labs-Created Device Configuration
• Workflow Scenario #3: Testing a User-Created Device Configuration
Each is described in more detail in the following sections.
UG336: Si5396 Evaluation Board User's Guide
Using the Si5396J-A-EVB
silabs.com | Building a more connected world. Rev. 1.0 | 14

10.4 Workflow Scenario #1: Testing a Silicon Labs-Created Default Configuration
The flow for using the EVB GUI to initialize and control a device on the EVB is as follows.
Once the PC and EVB are connected, launch ClockBuilder Pro by clicking on this icon on your PC’s desktop.
Figure 10.4. ClockBuilder Pro Desktop Icon
If an EVB is detected, click on the “Open Default Plan” button on the Wizard’s main menu. CBPro automatically detects the EVB and
device type.
Figure 10.5. Open Default Plan
UG336: Si5396 Evaluation Board User's Guide
Using the Si5396J-A-EVB
silabs.com | Building a more connected world. Rev. 1.0 | 15

Once you open the default plan (based on your EVB model number), a popup will appear.
Figure 10.6. Write Design to EVB Dialog
Select “Yes” to write the default plan to the Si5396 device mounted on your EVB. This ensures the device is completely reconfigured
per the Silicon Labs default plan for the DUT type mounted on the EVB.
Figure 10.7. Writing Design Status
After CBPro writes the default plan to the EVB, click on “Open EVB GUI” as shown below.
UG336: Si5396 Evaluation Board User's Guide
Using the Si5396J-A-EVB
silabs.com | Building a more connected world. Rev. 1.0 | 16

Figure 10.8. Open EVB GUI
The EVB GUI will appear. Note all power supplies will be set to the values defined in the device default CBPro project file created by
Silicon Labs, as shown below.
Figure 10.9. EVB GUI Window
UG336: Si5396 Evaluation Board User's Guide
Using the Si5396J-A-EVB
silabs.com | Building a more connected world. Rev. 1.0 | 17

10.4.1 Verify Free-Run Mode Operation
Assuming no external clocks have been connected to the INPUT CLOCK differential SMA connectors (labeled “INx/INxB”) located
around the perimeter of the EVB, the DUT should now be operating in free-run mode, as the DUT will be locked to the crystal in this
case.
You can run a quick check to determine if the device is powered up and generating output clocks (and consuming power) by clicking on
the Read All button highlighted above and then reviewing the voltage, current and power readings for each VDDx supply.
Note: Shutting “Off” then “On” of the VDD and VDDA supplies will power-down and reset the DUT. Every time you do this, to reload the
Silicon Labs-created default plan into the DUT’s register space, you must go back to the Wizard’s main menu and select “Write Design
to EVB” as shown below.
Figure 10.10. Write Design to EVB
Failure to do the step above will cause the device to read in a pre-programmed plan from its non-volatile memory (NVM). However, the
plan loaded from the NVM may not be the latest plan recommended by Silicon Labs for evaluation.
At this point, you should verify the presence and frequencies of the output clocks (running to free-run mode from the crystal) using ap-
propriate external instrumentation connected to the output clock SMA connectors. To verify the output clocks are toggling at the correct
frequency and signal format, click on View Design Report as highlighted below.
UG336: Si5396 Evaluation Board User's Guide
Using the Si5396J-A-EVB
silabs.com | Building a more connected world. Rev. 1.0 | 18

Figure 10.11. View Design Report
UG336: Si5396 Evaluation Board User's Guide
Using the Si5396J-A-EVB
silabs.com | Building a more connected world. Rev. 1.0 | 19

Your configuration’s design report will appear in a new window, as shown below. Compare the observed output clocks to the frequen-
cies and formats noted in your default project’s Design Report.
Figure 10.12. Design Report Window
10.4.2 Verify Locked Mode Operation
Assuming you connect the correct input clocks to the EVB (as noted in the Design Report shown above), the DUT on your EVB will be
running in “locked” mode.
UG336: Si5396 Evaluation Board User's Guide
Using the Si5396J-A-EVB
silabs.com | Building a more connected world. Rev. 1.0 | 20