Stanford Research Systems CG635 User manual

Revision 1.3 (08/2010)
User Manual
CG635
2.05 GHz Synthesized Clock Generator
www.lambdaphoto.co.uk
Distribution in the UK & Ireland

CG635 Synthesized Clock Generator
Certification
Stanford Research Systems certifies that this product met its published specifications at the time
of shipment.
Warranty
This Stanford Research Systems product is warranted against defects in materials and
workmanship for a period of one (1) year from the date of shipment.
Service
For warranty service or repair, this product must be returned to a Stanford Research Systems
authorized service facility. Contact Stanford Research Systems or an authorized representative
before returning this product for repair.
Information in this document is subject to change without notice.
Copyright © Stanford Research Systems, Inc., 2005. All rights reserved.
Stanford Research Systems, Inc.
1290-C Reamwood Avenue
Sunnyvale, California 94089
Phone: [phone]
Fax: [phone]
www.thinkSRS.com
Printed in U.S.A.

Contents i
CG635 Synthesized Clock Generator
Contents
Contents i
Safety and Preparation for Use v
Specifications vii
Quick Start Instructions xi
Introduction 1
Feature Overview 1
Front-Panel Overview 2
Outputs 2
Output Levels 3
Display 4
Entry 4
Modify 6
Clock Status and Interface Indicators 7
Rear-Panel Overview 8
AC Power 8
GPIB 8
RS-232 9
Chassis Ground 9
Timebase 9
Tmod Input 9
Clock Output 10
PRBS and Clock Option 11
Operation 13
Front-Panel User Interface 13
Power On 13
Displaying a Parameter 13
Changing a Parameter 14
Stepping a Parameter 14
Step Sizes of Exact Factors of Ten 14
Changing Units 15
Store and Recall Settings 15
Secondary Functions 15
Q and Q¯ Outputs 16
CMOS Output 17
Frequency 19
Phase 20
Secondary Functions 22
RUN, STOP, TOGGLE 22
INIT 22

Contents ii
CG635 Synthesized Clock Generator
STATUS 22
PRBS ON/OFF 24
FREQ/2, FREQx2 24
REL ș= 0 24
ș+ 90° 24
GPIB 24
ADDRS 25
RS-232 25
DATA 25
Factory Default Settings 25
Troubleshooting 26
CG635 Remote Programming 29
Introduction 29
GPIB 29
RS-232 29
Front-Panel Indicators 29
Command Syntax 30
Index of Commands 31
Instrument Control Commands 31
Interface Commands 31
Status Reporting Commands 31
Instrument Control Commands 32
Interface Commands 36
Status Reporting Commands 38
Status Byte Definitions 40
Serial Poll Status Byte 40
Standard Event Status Register 41
Communication Error Status Register 41
Instrument Status Register 41
PLL Lock Status Register 42
Error Codes 43
Performance Evaluation 47
Overview 47
Equipment Required 47
CG635 Self Test 47
Output Level Tests 48
Q/Q¯ Level Tests 48
CMOS Level Tests 49
Transition Time Measurements 50
Frequency Synthesis Tests 52
Functional Tests 53
Time Modulation Test 55

Contents iii
CG635 Synthesized Clock Generator
Phase Noise Tests 56
Jitter Tests 58
Timebase Calibration 59
Timebase Calibration Test 60
Calibration 60
Circuit Description 61
Overview 61
Accuracy 61
Resolution 61
Phase Noise 61
Circuit Block Diagram 62
Timebase 62
Reference Synthesizer 62
Reference Synthesizer Clean-up 63
Time Modulation 63
RF Synthesizer 63
Programmable Dividers and Clock Fan-out 64
Determining Register Values 64
Phase adjustment 67
Detailed Circuit Description 69
Timebase 69
DDS and the 19.40/19.44 MHz Reference 71
Time Modulation 73
RF Synthesizer 74
ECL Dividers and Clock Multiplexer 75
Microcontroller 76
Rear-Panel RJ-45 Outputs 82
RS-232 and GPIB Interfaces 83
Power Supply Interface 83
Front-Panel Output Drivers 83
Front-Panel Q and Q¯ Drivers 84
Front-Panel CMOS Driver 84
Front-Panel Display and Keypad 85
Power Supply 85
Timebase Options 86
Optional PRBS Generator 86
Line Receiver Accessories 87

Contents iv
CG635 Synthesized Clock Generator
Parts List 93
Motherboard Assembly 93
Output Driver Assembly 102
Power Supply Assembly 106
Chassis and Front-Panel Assembly 107
Option 1 Assembly 109
Option 2 Assembly 111
Option 3 Assembly 111
Schematics 113
CG635 Schematic Diagram List 113

Safety and Preparation for Use v
CG635 Synthesized Clock Generator
Safety and Preparation for Use
Line Voltage
The CG635 operates from a 90 to 132 VAC or 175 to 264 VAC power source having a
line frequency between 47 and 63 Hz. Power consumption is less than 80 VA total. In
standby mode, power is turned off to the main board. However, power is maintained at all
times to any optional timebases installed. Thus, a unit with an optional rubidium or
ovenized quartz oscillator is expected to consume less than 25 VA and 15 VA of power,
respectively, in standby mode.
Power Entry Module
A power entry module, labeled AC POWER on the back panel of the CG635, provides
connection to the power source and to a protective ground.
Power Cord
The CG635 package includes a detachable, three-wire power cord for connection to the
power source and protective ground.
The exposed metal parts of the box are connected to the power ground to protect against
electrical shock. Always use an outlet which has a properly connected protective ground.
Consult with an electrician if necessary.
Grounding
A chassis grounding lug is available on the back panel of the CG635. Connect a heavy
duty ground wire, #12AWG or larger, from the chassis ground lug directly to a facility
earth ground to provide additional protection against electrical shock.
BNC shields are connected to the chassis ground and the AC power source ground via the
power cord. Do not apply any voltage to the shield.
Line Fuse
The line fuse is internal to the instrument and may not be serviced by the user.
Operate Only with Covers in Place
To avoid personal injury, do not remove the product covers or panels. Do not operate the
product without all covers and panels in place.
Serviceable Parts
The CG635 does not include any user serviceable parts inside. Refer service to a
qualified technician.

Safety and Preparation for Use vi
CG635 Synthesized Clock Generator
Symbols you may Find on SRS Products
Symbol Description
Alternating current
Caution - risk of electric shock
Frame or chassis terminal
Caution - refer to accompanying documents
Earth (ground) terminal
Battery
Fuse
On (supply)
Off (supply)

Specifications vii
CG635 Synthesized Clock Generator
Specifications
Frequency
Range 1 µHz to 2.05 GHz
Resolution
f < 10 kHz 1 pHz
f10 kHz 16 digits
Accuracy ¨f < ± (2×10-19 + timebase error) × f
Settling time <30 ms
Timebase (+20 °C to +30 °C ambient)
Stability
Std. timebase <5 ppm
Opt. 02 (OCXO) <0.01 ppm
Opt. 03 (Rb) <0.0001 ppm
Aging
Std. timebase <5 ppm/year
Opt. 02 (OCXO) <0.2 ppm/year
Opt. 03 (Rb) <0.0005 ppm/year
External Input 10 MHz ± 10 ppm, sine >0.5 Vpp, 1 kȍimpedance
Output 10 MHz, 1.41 Vpp sine (+7 dBm) into 50 ȍ
Noise & Spurs
Phase noise (at 622.08 MHz)
100 Hz offset <–90 dBc/Hz
1 kHz offset <–100 dBc/Hz
10 kHz offset <–100 dBc/Hz
100 kHz offset <–110 dBc/Hz
Phase noise vs. freq. 6 dB/oct. relative to 622.08 MHz
Spurious <–70 dBc (within 50 kHz of carrier)
Jitter and Wander
Jitter (rms) <1 ps (1 kHz to 5 MHz bandwidth)
Wander (p-p) <20 ps (10 s persistence)
Time Modulation
Rear-panel input BNC, DC coupled, 1 kȍ
Sensitivity 1 ns/V, ±5 %
Range ±5 ns
Bandwidth DC to greater than 10 kHz

Specifications viii
CG635 Synthesized Clock Generator
Phase
Range ±720°
Resolution <20 ps
Maximum step size ±360°
Slew time (¨p > 0°) <300 ms
Q and Q¯ Outputs
Outputs Front-panel BNC connectors
Frequency range DC to 2.05 GHz
High level –2.00 V VHIGH +5.00 V
Amplitude 200 mV VAMPL 1.00 V (VAMPL ŁVHIGH – VLOW)
Level resolution 10 mV
Level error <1 % + 10 mV
Transition time <100 ps (20 % to 80 %)
Symmetry <100 ps departure from nominal 50 %
Source impedance 50 ȍ(±1 %)
Load impedance 50 ȍto ground on both outputs
Pre-programmed levels +5.0 V PECL, +3.3 V PECL, LVDS, +7 dBm, ECL
Protection Continuous to ground, momentary to +5 VDC
CMOS Output
Output Front-panel BNC
Frequency range DC to 250 MHz
Low level -1.00 V VLOW +1.00 V
Amplitude range 500 mV VAMPL 6.00 V (VAMPL ŁVHIGH – VLOW)
Level resolution 10 mV
Level error <2 % of VAMPL + 20 mV
Transition time <1.0 ns (10 % to 90 %, with 12pF load at far end of 50 ȍcable)
Symmetry <500 ps departure from nominal 50%
Source impedance 50 ȍ(reverse terminates cable reflection)
Load impedance Unterminated 50 ȍcable of any length
Attenuation (50 ȍload) Output levels are divided by 2
Preprogrammed levels VLOW = 0; VHIGH = 1.2, 1.8, 2.5, 3.3, or 5.0 V
Protection Continuous to ground, momentary to +5 VDC
RS-485 Output
Output Rear-panel RJ-45
Frequency range DC to 105 MHz
Clock output Pin 7 and pin 8 drive twisted pair
Transition time <800 ps (20% to 80%)
Source impedance 100 ȍbetween pin 7 and pin 8
Load impedances 100 ȍbetween pin 7 and pin 8
Logic levels VLOW = +0.9 V, VHIGH = +2.2 V
Recommended cable Straight-through Category-6
Protection Continuous to ground, momentary to +5 VDC

Specifications ix
CG635 Synthesized Clock Generator
LVDS Output (EIA/TIA-644)
Output Rear-panel RJ-45
Frequency range DC to 2.05 GHz
Clock output Pin 1 and pin 2 drive twisted pair
Transition time <100 ps (20% to 80%)
Source impedance 100 ȍbetween pin 1 and pin 2
Load impedances 100 ȍbetween pin 1 and pin 2
Logic levels VLOW = +0.96 V, VHIGH = +1.34 V
Recommended cable Straight-through Category-6
Protection Continuous to ground, momentary to +5 V
PRBS (Opt. 01) (EIA/TIA-644)
Frequency range DC to 1.55 GHz
Level LVDS on rear-panel SMA jacks
Outputs PRBS, –PRBS, CLK & –CLK
PRBS generator x7+ x6+ 1 for a length of 27– 1 bits
Transition time <100 ps (20 % to 80 %)
Load impedance 50 ȍto ground on all outputs
Accessory Power (on rear-panel RJ-45 connector)
+5 VDC Pin 3
–5 VDC Pin 5
Ground return Pin 4 and pin 6
Short circuit protection Current limited to 375 mA
Polarity clamps Diode clamps prevent polarity inversion
(2 ADC max., 120 A non-rep.)
General
Computer interfaces IEEE-488.2 and RS-232 standard. All instrument functions can be
controlled through the computer interfaces.
Non-volatile memory Ten sets of instrument configurations can be stored and recalled.
Line power Universal input, 90 to 264 VAC,
47 Hz to 63 Hz
Standby power <5 W (std. timebase)
<15 W (opt. 02, OCXO timebase)
<25 W (opt. 03, Rb timebase)
Operating power <30 W (std. timebase)
<40 W (opt. 02, OCXO timebase)
<50 W (opt. 03, Rb timebase)
Dimensions 8.5” × 3.5” × 13” (WHD)
Weight <9 lbs.
Warranty One year parts and labor on defects in materials and workmanship

Specifications x
CG635 Synthesized Clock Generator
Optional Receiver Modules
General
Inputs RJ-45. Connects to CG635 via standard Category-6 cable.
Outputs Q / Q¯ on SMA connectors
Dimensions 1 5/8” × 1” × 3” (WHD)
Models
Model Levels Source
Impedance
Termination
Impedance
Transition
Time (max)
Fmax
(2)
CG640 +5 V CMOS 50 ȍHigh Z 2.0 ns 105 MHz(1)
CG641 +3.3 V CMOS 50 ȍHigh Z 800 ps 250 MHz
CG642 +2.5 V CMOS 50 ȍHigh Z 800 ps 250 MHz
CG643 +5 V PECL 50 ȍHigh Z 800 ps 250 MHz
CG644 +3.3 V PECL 50 ȍ50 ȍ100 ps 2.05 GHz
CG645 +2.5 V PECL 50 ȍ50 ȍ100 ps 2.05 GHz
CG646 +7 dBm RF 50 ȍ50 ȍ100 ps 2.05 GHz
CG647 CML/NIM 50 ȍ50 ȍ100 ps 2.05 GHz
CG648 NEG ECL 50 ȍ50 ȍ100 ps 2.05 GHz
CG649 LVDS 50 ȍ50 ȍ100 ps 2.05 GHz
Notes: (1) Output is set to logic ‘0’ above Fmax.
(2) Except for the CG640, all outputs continue to operate above Fmax with reduced amplitude.
Maximum operating frequency is also limited by the CAT-6 cable length. At 2 GHz, cable
lengths up to 10 feet may be used. At 10 MHz, cable lengths of up to 200 feet may be used.
See Figure 3 on page 11 for the maximum recommended cable lengths at other frequencies.

Quick Start Instructions xi
CG635 Synthesized Clock Generator
Quick Start Instructions
Step by Step Example
1. With the power button in the Standby position, connect the CG635 to a grounded
outlet using the power cord provided.
2. Push in the power button to turn on the CG635. The CG635 will perform some
start up tests and then recall the instruments’ last known settings from non
volatile memory.
3. Reset the CG635 to its default state by pressing sequentially the following 3 keys
located in the ENTRY section of the front panel: ‘SHIFT’, ‘+/-’, ‘Hz’. This
performs the INIT function which resets the instrument to its default settings.
The INIT function will set the frequency to 10 MHz, set the phase to 0 degrees,
set the output levels for Q and Q¯ to LVDS, set the output levels for CMOS to
3.3 V, and select the frequency for display. The LVDS and +3.3 V LEDs in the
OUTPUT LEVELS section of the front panel should be on. The FREQ LED in
the DISPLAY section should be on. The seven segment display should show
10.000000000 and the MHz LED should be lit. This indicates that the frequency
is 10 MHz.
4. Connect the CMOS output to an oscilloscope with a high impedance input to see
that the output is indeed a 3.3 V square wave with a frequency of 10 MHz.
5. Adjust the frequency to 5 MHz by pressing the following keys sequentially: ‘5’,
‘MHz’. The display should change to 5.000000000 MHz. The oscilloscope
should now display a 5 MHz square wave with amplitude 3.3 V.
6. Adjust the CMOS output up to 5.0 V by pressing the CMOS Ÿkey in the
OUTPUT LEVELS section of the front panel. The +3.3 V LED should turn off
and the +5.0 V LED should turn on. The oscilloscope should now display a
5 MHz square wave with amplitude 5.0 V.
7. Press the ‘CMOS HIGH’ key in the DISPLAY section of the front panel. The
CMOS HIGH LED should turn on and the seven segment display should show
5.00 VDC.
8. Adjust the CMOS output to 4.5 V by pressing the following keys sequentially in
the ENTRY section of the front panel: ‘4’, ‘.’, ‘5’, ‘VOLT’. The seven segment
display should now show 4.50 VDC. In the OUTPUT LEVELS section, the
+5.0 V and VAR LEDs should be lit. This indicates that the current CMOS
output voltage varies from, but is closest to the +5.0 V standard output level.
9. Press the CMOS źkey in the OUTPUT LEVELS section of the front panel. The
CMOS output changes to the nearest standard level in the direction of the
indicated key, which is 3.3 V in this case. The VAR LED should turn off,
indicating that the current output is at a standard level.

Quick Start Instructions xii
CG635 Synthesized Clock Generator
10. Press the ‘FREQ’ key in the DISPLAY section to display the current frequency.
The seven segment display should show 5.000000000 MHz.
11. Press the ‘STEP SIZE’ key in the MODIFY section of the front panel. The
display should now show 1.000 Hz, and the STEP LED should be lit. This
indicates that the current step size for frequency is 1.000 Hz.
12. Change the frequency step size to 1 kHz by pressing the following keys
sequentially in the ENTRY section of the front panel: ‘1’, ‘kHz’. The display
should now show 1.000000 kHz.
13. Switch back to the frequency display be pressing the ‘STEP SIZE’ key again.
The STEP LED should turn off, and the display should show the current
frequency of 5.000000000 MHz. The digit corresponding to 1 kHz should be
blinking, indicating that frequency steps will change that digit by one.
14. Step the frequency up by 1 kHz by pressing the MODIFY Ÿkey. The frequency
should now display 5.001000000 MHz.
15. For more details about the operation of keys on the front panel, see the Front
Panel Overview (page 2) in the Introduction.
16. For more details about a particular feature, see the chapter Operation (page 13).

Introduction 1
CG635 Synthesized Clock Generator
Introduction
Feature Overview
The CG635 Synthesized Clock Generator provides precise, low-jitter digital clock signals
for applications ranging from the development of digital circuits to the testing of
communications networks.
The CG635 generates single ended and differential clocks from 1 µHz to 2.05 GHz with
sub-picosecond jitter. Clock frequencies may be set with up to 1 pHz resolution and
16 significant digits. Front-panel outputs have continuously adjustable offsets and
amplitudes, and may be set to standard logic levels including CMOS, PECL, ECL, and
LVDS. A rear-panel output delivers clocks at RS-485 and LVDS over twisted pairs.
Several instrument features support more complex tasks. The phase of the outputs may be
adjusted with nanodegree resolution at 2 Hz, and one-degree resolution at 2 GHz. The
timing of clock edges may be modulated over ±5 ns by an external analog signal. An
optional pseudo-random binary sequence (PRBS) generator (Opt. 01) provides clock and
data outputs at LVDS levels for eye-pattern testing of serial data channels. Edge
transition times are typically 80 ps.
The standard crystal oscillator timebase of the CG635 provides sufficient accuracy for
many applications. An optional ovenized crystal oscillator (Opt. 02), or rubidium
frequency standard (Opt. 03), may be added to improve frequency stability and reduce
aging. The CG635 may also be locked to an external 10 MHz timebase.
The CG635 delivers a low spurious output signal—better than most commercial
synthesizers. Phase noise for a 622.08 MHz carrier at 100 Hz offset is less than
–80 dBc/Hz, and the spurious response is better than –70 dBc.
All instrument functions may be controlled from the front panel or via the GPIB (IEEE-
488.2) or RS-232 interfaces. Up to ten complete instrument configurations can be stored
in non-volatile memory and recalled at any time. A universal input AC power supply
allows world-wide operation.
Several clock receiver modules are available which may be connected to the rear-panel
RS-485/LVDS output via Category-6 cable. These accessories provide complementary
high-speed transitions at standard logic levels on SMA connectors, and may be located at
a substantial distance from the instrument. CMOS (+5 V, +3.3 V, and +2.5 V), PECL
(+5 V, +3.3 V and +2.5 V), RF (+7 dBm), CML/NIM, ECL, and LVDS outputs are all
available.

Introduction 2
CG635 Synthesized Clock Generator
Front-Panel Overview
The front panel was designed to provide a simple, intuitive, user interface to all the
CG635 features (see Figure 1). The power switch is located in the lower right corner of
the front panel. Pushing the switch enables power to the instrument. Pushing the switch
again places the instrument in stand-by mode, where power is enabled only to optionally
installed timebases. Power to the main board is turned off in stand-by mode.
The front panel provides three output drivers for connecting the CG635 clock signals to
user applications via standard BNC cables. The two upper outputs are complementary,
high-speed, ECL compatible output drivers. The lower output is a CMOS output driver.
Keys on the front panel are divided into four sections to indicate their overall
functionality: OUTPUT LEVELS, DISPLAY, ENTRY, and MODIFY. Keys in the
OUTPUT LEVELS section modify the amplitude and offset of the clock signals provided
by the front panel output drivers. Keys in the DISPLAY section control what is shown in
the main display. The user can choose among six standard displays. Keys in the ENTRY
section are used for changing the currently displayed item to a specific value. This
section is also used to access secondary functions. Keys in the MODIFY section allow
the user to increment the currently displayed item by configurable steps.
Figure 1: The CG635 Front Panel
Outputs
Q and Q¯
The CG635 front panel includes three BNC outputs. The upper two outputs, labeled Q
and Q¯ , are high-speed drivers that operate from DC to 2.05 GHZ. The outputs provide the
user with fast, complementary voltages at the selected frequency, amplitude, and offset.

Introduction 3
CG635 Synthesized Clock Generator
To operate at specification, BOTH outputs should be terminated into 50 ȍ, even if only
one output is used.
CMOS
The bottom output driver is a CMOS compatible driver that can operate from DC to
250 MHz. It drives the output at the selected frequency, amplitude and offset. At
frequencies above 250 MHz, the CMOS driver will be turned off and forced to a low
logic state. To operate at specification, the CMOS output driver should be terminated into
a high impedance input and NOT terminated into 50 ȍ.
Output Levels
Standard Levels
The CG635 provides a simple method for switching among five standard voltage levels
for the Q / Q¯ and CMOS outputs. The meaning of the five standard levels is summarized
in Table 1 and Table 2 below:
Table 1: Q / Q¯ Standard Output Levels
Label Description VHIGH (V) VLOW (V)
PECL5V ECL run on +5 VDC supply 4.00 3.20
PECL3.3V ECL run on +3.3 VDC supply 2.30 1.50
LVDS Low voltage differential signaling 1.43 1.07
+7 dBm 1 Vpp with 0.0 VDC offset 0.50 –0.50
ECL ECL run on negative supply –1.00 –1.80
Table 2: CMOS Standard Output Levels
Label Description VHIGH (V) VLOW (V)
+5.0V 5 V CMOS 5.00 0.00
+3.3V 3.3 V CMOS 3.30 0.00
+2.5V 2.5 V CMOS 2.50 0.00
+1.8V 1.8 V CMOS 1.80 0.00
+1.2V 1.2 V CMOS 1.20 0.00
VHIGH and VLOW indicate the voltage driven by the Q / Q¯ or CMOS outputs for the high
and low logic levels.
LEDs in the OUTPUT LEVELS section indicate the standard level that is currently being
driven on the output. Pressing the Ÿand źkeys in this section will move the standard
output level up and down in the table, respectively.
Variable Levels
A sixth LED, labeled VAR, turns on when the current output levels do not correspond to
any of the standard levels. In this case, the standard level LED indicates the standard
level that is closest to the current level. Pressing the Ÿand źkeys when the VAR LED
is on, forces the output to the closest standard output in the direction indicated by the key.

Introduction 4
CG635 Synthesized Clock Generator
Display
The DISPLAY section allows the user to select which values are reported in the main
front panel display. The LEDs in the display section indicate what is currently being
displayed or edited. The meaning of the LEDs and keys are summarized in Table 3.
Table 3: DISPLAY Section Keys
Label Value Shown in Main Display When Pressed
FREQ Current frequency
PHASE Current phase
Q / Q¯ HIGH Voltage for a Q / Q¯ logic high state
Q / Q¯ LOW Voltage for a Q / Q¯ logiclowstate
CMOS HIGH Voltage for a CMOS logic high state
CMOS LOW Voltage for a CMOS logic low state
The keys are used to change the main display to the indicated item. Pressing ‘FREQ’, for
example, will cause the CG635 to display the current frequency. The FREQ LED will
turn on, indicating that the current display is frequency.
Entry
Numeric Entry
The ENTRY section is used to modify the current settings of the CG635. In most cases,
the currently displayed item can be changed by entering a new value with the numeric
keys, and pressing an appropriate units key to complete the entry. For example, if the
frequency is currently being displayed, pressing the keys ‘1’, ‘MHz’, sequentially will
change the frequency to 1 MHz. Similarly, if the CMOS HIGH voltage is displayed,
pressing the keys ‘2’, ‘.’, ‘1’, ‘VOLT’ will set the CMOS logic high voltage to 2.1 VDC.
Store and Recall Settings
The ‘STO’ and ‘RCL’ keys are for storing and recalling instrument settings, respectively.
The instrument saves the frequency, phase, Q / Q¯ and CMOS output levels, all the
associated step sizes, the run/stop state, the PRBS state, and the current display. Up to ten
different instrument settings may be stored in the locations 0 to 9. To save the current
settings to location 5, press the keys ‘STO’, ‘5’, ‘Hz’, sequentially. To recall instrument
settings from location 5, press the keys ‘RCL’, ‘5’, ‘Hz’ sequentially.
Secondary Functions
Many of the keys have secondary functions associated with them. The names of these
functions are printed above the key. The ‘4’ key, for example, has FREQx2 above it. The
meaning of the secondary functions is summarized in Table 4.
Table 4: Secondary Functions
Label Function Description
RUN Enables the output. Drives the output at the current frequency.
STOP Stops the output. Forces the output to a logic low state.

Introduction 5
CG635 Synthesized Clock Generator
TOGGLE When stopped, toggles the logic state of the output
INIT Resets the instrument to its default settings
STATUS Displays instrument status
PRBS ON If installed, turns on the pseudo-random binary generator
PRBS OFF If installed, turns off the pseudo-random binary generator
FREQ/2 Divides the current frequency by 2 and displays frequency
FREQx2 Multiplies the current frequency by 2 and displays frequency
REL ș= 0 Defines the current phase to be 0 degrees and displays phase
ș+ 90° Increments the phase by 90 degrees and displays phase
GPIB Enables the GPIB remote interface. Disables RS-232.
ADDRS Displays / Sets the GPIB primary address for the CG635
RS-232 Enables the RS-232 remote interface. Disables GPIB.
DATA Displays the most recent data received over the remote interface
ĸIncreases the current step size by the next exact factor of ten
(Located in the MODIFY section.)
ĺDecrease the current step size by the next exact factor of ten
(Located in the MODIFY section.)
A more detailed description of each of the secondary functions is given in the Secondary
Functions section of the Operation chapter (page 22).
The secondary functions can only be accessed when SHIFT mode is active, which is
indicated by the SHIFT LED being turned on. The SHIFT mode can be toggled on and
off by pressing the ‘SHIFT’ key. Therefore, to increase the frequency by a factor of four,
you would press the ‘SHIFT’ key to activate SHIFT mode, and then press ‘4’ twice to
execute FREQx2 twice. Pressing ‘SHIFT’ again toggles SHIFT mode off.
Most of the secondary functions will automatically toggle SHIFT mode off when
executed. FREQ/2, FREQx2, ș+ 90°, and TOGGLE are exceptions to this rule. This
allows the user to easily sweep frequency or phase without having to continually
reactivate SHIFT mode.
Secondary functions that have an arrow ( ) printed after them, such as INIT, GPIB,
ADDRS, and RS-232, require that the user press the key ‘Hz’ to complete the action. For
example, to initialize the instrument to its default settings, you would sequentially press
‘SHIFT’, ‘INIT’, ‘Hz’.
Cancel
The ‘SHIFT’ key also functions as a general purpose CANCEL key. Any numeric entry
which has not been completed by pressing a units key, can be canceled by pressing the
‘SHIFT’ key. Because of the dual role played by the SHIFT key, the user may have to
press ‘SHIFT’ twice to reactivate SHIFT mode. The first key press cancels the current
action, and the second key press activates SHIFT mode.

Introduction 6
CG635 Synthesized Clock Generator
Modify
Stepping Up and Down
The MODIFY section is used to step the currently displayed item up or down by a
programmed amount. Each of the six standard display items listed in the DISPLAY
section has a step size associated with it. Normally, pressing the MODIFY Ÿand ź
keys causes the displayed item to increment and decrement, respectively, by the
associated step size.
Step Size
The step size for the current standard display can be viewed by pressing the ‘STEP SIZE’
key. Pressing ‘STEP SIZE’ a second time toggles the view back to the standard display.
When the step size is being viewed, the STEP LED in the main display will be turn on.
To view the frequency step size, press ‘FREQ’, ‘STEP SIZE’, sequentially. Pressing
‘FREQ’ ensures that frequency is the current standard display. Pressing ‘STEP SIZE’
then toggles the main display to the step size associated with frequency.
The step size can be changed in a number of ways. If the current step size is being
displayed, the user can modify the current step size in one of two ways. First, you can
enter a new value with the numeric keys in the ENTRY section and complete the entry by
pressing an appropriate units key. Second, you can increment and decrement the current
step size by exact factors of ten by pressing the MODIFY Ÿand źkeys, respectively.
For example, if the currently displayed frequency step size is 1.000 Hz, then the step size
can be increased to 10.000 Hz by pressing MODIFY Ÿonce.
The step size can also be changed, even when the current step size is not being displayed.
This is accomplished by accessing the SHIFTED functions ĸand ĺshown above the
MODIFY Ÿand źkeys, respectively. For example, pressing ‘SHIFT’, MODIFY Ÿ,
sequentially will increase the associated step size to the next exact factor of ten.
When the step size of a standard display item is an exact factor of ten, the corresponding
digit in the main display will blink. This provides a convenient visual cue to let the user
know which digit will change when the user presses the MODIFY Ÿand źkeys. For
example, if the frequency step size is 1.000 Hz, and the displayed frequency is
123456.789 Hz, then the ‘6’ will be blinking. Pressing the MODIFY Ÿkey will step the
frequency up 1 Hz to 123457.789 Hz.
Remote and Local Mode
The REM LED turns on when the CG635 is placed in remote mode by the GPIB bus. In
this mode, all the front panel keys are disabled and the instrument can only be controlled
via the GPIB bus. The user can return to normal, local mode by pressing the ‘STEP
SIZE’ key once. The ‘LOCAL’ label above the key indicates the dual functionality of the
‘STEP SIZE’ key.