Section
1
--7D01 (SN BOZO000
&
up)
GENERAL
INFORMATION
INTRODUCTION
7DOl
Operator's Manual
Parity Bits--"Bitsadded to the data stream which enable the
receiver to verify whether the data is correctly or incor-
rectly received.
-
I'he Operator's manual contains the information necessary
to operate the 7D01 Logic Analyzer. The manual is divided PROM-Programmable Read Only Memory.
into three sections, each covering
a
specific topic of the
instrument. Section 1 provides
a
basic description of the RAM-Random Access Memory.
7D01,
a
glossary of logic terms, installation instructions, Serial Data -Datatransferred on a single line. Serial data
and specifications. Sectiorl
2
contains operating information logic is derived in asequential mode.
for the instrument. Information concerning available op-
tions for the 7D01 is on atabbed page in Section
3.
Store Clock-'l'he clock used to store information into the
7D01 memory.
71901
Instruction Manual Synchronous-Digital information transferred with the
The Instruction manual provides operating and servicing same clock reference.
information for the 7D01 Logic Analyzer. I'he manual is
.
~
divided into ten sections. Operating information is covered
in the first two sections; servicing information is contained
inthe remaining eight sections of the manual. Schematics
-
are located
at
the rear of the manual and can be unfolded
and used for reference while reading other parts of the
manual. The reference designators and symbols used on the
schematics are defined on the first page of the Diagrams
section. Abbreviations used in the manuals, except in the
parts list and schematics, comply with the American
National Standards Institute Y1.l-1972 publication. 'The
parts lists are computer printouts and use computer-
supplied abbreviations.
Threshold Voltage-.-Thecomparator input voltage on the
inverting input, which is used
as
a
reference. Thus, if the
signal on the non-inverting input is above the threshold
voltage, the output is HI; if the signal is below the threshold
voltage, the output is LO.
TTL-.-Transistor-Transistor
Logic.
"Wired-OR"-ECL gate outputs that are connected together
to yield the equivalent output of an
OR
gate.
!
INSTALLATION
\i
GLOSSARY
/'
[-heterms l~stedinthis glossary are used throughout this
manual.
Asynchronous--Multiple digital information transferred at
non-commonclock rates.
-
Bit-The smallest increment of digital information.
CPU.-Central Processing Unit.
-
ECL Emitter-Coupled Logic.
Jit.ter
-A
form of d~stort~onIn asynchronoussystems that
IS
due totlm~ngvarlatlons of the rece~veddata.
Multiplexing--The combining of multiple inputs into a
-
single output.
Parallel-to-SerialConversion-The technique of storing a
-
digital pattern from
a
parallel bus, then transferring that
pattern out to aserial bus.
REV
OCT
1982
The 7D01 is calibrated and ready tousewhen received. Itis
designed to occupy a vertical and horizontal plug-in corn-
',.
partment in all 7000-series mainframes with readout except
\
the 7104, which may suffer
crt
damage that will not be cov-
1
ered by the instrument warranty, and the Digital Processing
Oscilloscope (DPO), which will not digitize the 7D01 out-
puts. There are some operating modes, however, that will
not provide proper operation. l'hese modes are discussed
under Displaying Data in Section
2.
Installthe 7D01 in the
two conipartments on the right side of a three-compartment
mainframe, or in the right vertical and
A
horizontal compart-
nt mainframe.
NOTE
Some rackmounted mainframes have vertically
'
\
mounted rods in front of theplug-in compart-
ments that interfere with the installation of the
700
1.
Detach these rods by removing the mount-
ing screws at each end before installing the
7001.
