Tektronix 4112 User manual

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TEK
SERVICE MANUAL
VOLUME 1
First Printing SEP 1982
4112
Part No. 070-381 7-00
Product Group 16
COMPUTER DISPLAY
TERMINAL
Please Check for
CHANGE INFORMATION
at the Rear of this Manual
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WARNING I
THE FOLLOWING SERVICING INSTRUCTIONS ARE
FOR USE BY QUALIFIED PERSONNEL ONLY. TO
AVOID PERSONAL INJURY, DO NOT PERFORM ANY
SERVICING OTHER THAN THAT CONTAINED IN
OPERATING INSTRUCTIONS UNLESS YOU ARE
QUALIFIED TO DO SO.
Cooynght ~ 1982 bv Tektronil(, Inc . Beaverton O· ~ gon
Prin ted m tr.e Un i ted States of America A ll ri ghts reser .. ed
Contents of this pub llc atton may not be reproduce d m a ny
form w ithout perm i ss ion of Tektronix . Inc
This in strume nt . m w hole or 1n part. may be protected by one
or more U.S or foreign patents or pa te nt applications
ln lorma tton prov i ded on reQuest by Tek tr on ix. Inc . P0 Box
500 .Beaverton, Ore g on 97077
TEKTRONIX Is a registered tr ad emark of Tektronix . Inc .
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MANUAL REVISION STATUS
PRODUCT: 4112 COMPUTER DISPLAY TERMINAL
This manual suppcrts the following versions of this produc t: Ser ial Numbers 8010 1 00 and up .
REV DATE DESCRIPTION
SEPT 1 982
Ori\:linal I ssue ; replaces 061 -2 490 -00.
4112 SERVICE (VOLUME 1)

• CONTENTS
Section 1 INTRODUCTION Page
About T his Manual ......... ... ..... .•.. .... .. ... . ...... 1-1
Related Documents
.......... . .... . .. .. ... ....... . .. .. . .1-1
Insta
ll ation Information .................. .... .. ... ...... 1-2
General Description ........... . .......... . .. . ....... ... 1-2
Major Pa rts of the 4112 . .... . ....... . ..... .. ...... .. . 1-2
Front-Panel Controls and Indicato
rs ... . . ..... . ... .. .. 1-3
Rear-Panel Controls and Connectors
... . ... . ... .. . . .. 1 -4
Bell Indicator.. .. . .................. . .... . .. . .. ...... 1 -4
Error Messages .. . ...... .... ...... . ......... . ...... .. I -6
Options .. ................ .. .. ..... .... ... . .. ... .... ... . 1-7
Accessories ....................... ....... .. .... . ... ... . 1 -8
Standard Accessories. ........... ... . ... . ....... .. .. . 1-8
Optional Accessories . .. ... ..... .. . .... .. .. .. .... .. . . 1-8
Section 2 OPERATING INFORMATION
• Controls and Indicators
...... ... ....... ............. . .. . 2-1
Indicator
lights . .. ..... ... .. . .... .. ......... . .. . .. ... 2-3
Keyboard .. . ... ... . ...... . .... ... ...... . .... ... ... .. . 2-4
DisplayControl Keys and the Thumbwheels .......... . 2-5
Rear-Panel Controls and Connectors ..... . ....... ... . 2-6
Operating Check . ... . . ..... ... ... .. ... . .. .. .. ... . ... .. . 2-8
SETUP Mode .. ... .. ... .. ...... .. .......... . ...... . .. 2-8
SETUP Commands ... . ............................... 2-8
Using the Status Message .... .. ... . ..... . ........... . 2-9
Conventions .. . .... .. .... . ......... . .. ............... 2-9
4112 Startup . .. ......... . ..... . .............. .. .. .. . 2-10
Creatinga Graphics Segment ..... . .. ... . ............ 2-1 2
Manipulating a Graphics Segment
.... ... . .. .......... 2-14
GraphicsInput. .. . ... ... .. .. ... . ..................... 2-16
Section 3 CHARACTERISTICS
Characteristics/Specifications . ............. ...... .. .... 3-1
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Section 4 THEORY OVERVIEW
Defining Terms ... ...... ......... .. .... .. ............... 4-1
World Coordinate Space
.. ... ..... ........ ........ ... 4-1
Terminal Coordinate Space
.... ... .................... 4-1
Raster Memory Space
............ ............. ... .... 4 -1
The Window-V ie wport Transform . ... . .. . .. ..... ... .. . 4-2
Window
........... .. ...... ......... ... .. . ........... 4-3
Viewport ..... ......... ......................... .. .. . 4-3
General Display Concepts ...... .... .. ... . .............. 4-4
Pixels
....... . ............... ................ . ...... . 4-4
Characters ..
.... . ............ ............... ... .. .. .4 -5
Bit Map and Display Concepts ....... .. .. .. ...... ..... 4-5
4112 Overview ........... . ...... .. ........ ......... .. .. 4-6
Bus Masters and Slaves ............ ............. .. ... 4-6
Processor Bus ........ .... .. .... . ................ .. ..4-8
Display Bus
.......... ... ......................... .. . 4-11
VideoController. .
..................... .... ..... . .. 4-14
Vector Generator .......................... . ....... 4-14
Display Memories
................................. 4-1 4
Interfacing
....................... . ................ 4-1 4
Connectors
.......... . .... ........ .. ..... .. ...... . .. . 4-14
Section 5 PROCESSOR
BUS THEORY
Introduction to Processor Bus .............. ........ ..... 5-1
Processor Board Theory .
............................... 5-1
ProcessorTheory Overview
.......... . ............. .. 5- 1
Microprocessor{MPU) ......................... ... 5-3
InterruptContr oller ... ....... . ....... .. ..... ..... .. 5-3
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Processor Board to
Processor/System Bus Interface ...................... 5-3
System Memory .......... . ..................... . .. 5-3
Control, Status,and Timing ...... . .. .. ........ ..... 5-3
Host Computer Port .. ... . ...... . .. . ..... .. . ...... .5-4
Keyboard Port ..
.. . ................................ 5-4
Processor Board
Circuit BlockDescriptions
.................... . ..... .. 5-4
MPU ................. .. .................. ......... 5-6
The Bus Cycle
....... .......................... 5-6
MPU Internal States ............................ 5-6
Memory and 110 AddressSpace Access ......... 5-6
Resetand Initialization .................... ...... 5-8
Interrupt Operations
....................... . .... 5-8
Interrupt Controller ............... .. .. ...... ....... 5-8
Local Data Bus Buffer .......................... 5-8
InterruptPriority Logic and Registers
............ 5-8
Control Logic ................................... 5-9
Read and Write Log ic ............. .. ..... .. ..... 5-9
Cascade Buffers and Comparator ............... 5-9
PIC Operations ........... . ..... .. . ................ 5-1O
The InterruptOperating Sequence ............... 5-1O
1STINTA and Cascade Addresses
for Slave PlCs ..
... . ......... . .......... .. . ... .. 5-10
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Section 5 (cont)
Addr'ess Orrvers .............. . ... . ....... . . .... ... 5-10
Data Drivers/Receivers
.. . ......................... 5-10
Bus Command Dri
ve r .... . ... • ................ .. ... 5-1 1
Control Logic
.. . ..... .............. . ...... • ..... 5-11
MPU Status Decoder . . .. ... .. .. . .. .
........... 5-1 2
Control Signal Generator.
... .... .... . ......... ..5-12
Command Generator
...... ... .... .......... ... .. 5-12
ROM .. . ........ ...... .. ........•.. .... ..... . ... . 5-14
ROM Configuration
.. . .......................... 5-1 4
F
ir mware ... . •. .. .. . .. ... . .... . ............. . ... 5-14
Straps .... ... . .... . .. . ........ ...... . ...... .... 5-1 4
N
on -Volatile RAM .......... . .... .. .... .. ..... .. ... 5-15
Read Access. .
............................ .. ... 5 -1 6
Write Ac
cess .. .. . ...... . ............ . .......... 5-1 6
Microprocessor Control
...... . .... . ............... 5-16
Clock and Reset ............ . ..... . ........ .. ... 5-16
Ready Signa ls . .. .. . ..... . .... . ..... . ...... ... . . 5- 16
B us Transfer Log ic . .... .. ... . .. . .. .... .... . .. . ... . 5-1 7
End-of-Data-Transfer Strap
........ . .... ... .. ... 5-17
Address Decoding. ... .. .
.......... .. . ............ 5-18
Bus Timeout Detector .. . . ....... . .. .. ....... .. . ... 5-19
Status Input . .. .. ... ... . . ...... . ..... .... .. ... .... 5-19
Bus Clock Genera
tor .... ................ ... . ... .. . 5-19
MPU Timing Generator . ... ... ... .. .. ......... . .. .. 5-2 1
• Programmable Timerand Baud Rate Generator
..... 5-22
Programmable Interval Timer .... . .. .... . ........ 5-22
RS-232 State Change Detector .......... . ......... 5-23
RS -232 Communications Interface .......... ... .... 5-23
ProgrammableCommunications Interface
..... ... 5-23
MPU Control .. .. ... ...................... . .. . .. 5-25
Data Communication . ......... . .. . ............. 5-25
Interrupts. . ....... . ................. .. . ........ 5-25
Keyboard Controller. . ..... . ........ . .. ..... .. ..... 5-25
Keyboard Controller Microcomput er ........ . .. .. 5-25
Keycode Da ta .. ....... . ........................ 5-27
Thumbwheel Count Values ..... .. ... . ..... .. .... 5-27
Keyboard lndentif ic atlon ............. . ..... . .... 5-27
LED and Bell .. ............... .. ........ . ....... 5-27
Introduction to the Keyboard .. .... ........... ..... . 5-28
LEO and Be ll Log ic ........... .. ...... . .. . ...... ,..5-28
How a LED Changes State ...................... 5-28
Thumbwheel Interface
.. .. ........... ... ... . ....... 5-29
Thumbwheels and 2-Blt GreyCode ....... . ...... 5-29
Interfa cin g.of Thumbwheels
tothe
K04-K07 Lines .... . ... .. ... .. ...... ...... 5-29
Creating Key Change Data ... . ............... ... 5-29
Bell . .. ... ...................................... ..5- 29
How the Be ll Ri ngs ............ . ... .. ....... .... 5- 29
CharacterDecoder .. . ... . ... . ..................... 5-30
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Section 5 (cont)
RAM/ROM Board Theory ... . ..... ...... .... ........ . .... 5-30
General Description ........ ...... ... ............ ..... 5-30
General Operation .... ........... . .......... ..... .... 5- 30
RAM /ROM Board Circuit Bl ock Descri pt ions ......... 5-30
Bus Receivers ................ .................... 5- 30
RAM Control .. .. ... ........ ... .. . ... .... . .. ... . .. 5-30
Multiplexing ofRAM Addresses . .. ... ........... 5-32
Arbiter Circuitry ....... ............ . ..... . . ... .. 5-33
Timingand Control ..................... . ....... 5-33
Clock . ................... ......... ......... . ... 5-33
Dynamic RAM Controller Operations ........ ... ... . 5-33
Idling . .. . ........................... ... ........ 5-33
Write Cycle . ............ ... ...... .... . ......... 5-33
Read Cycle ............................. . ..... . 5-33
Refresh Cycle ....... .. ......................... 5-33
Data Input Buffers ................................. 5-34
RAM Array Board .......... . ........ . .... ............ 5-34
RAM Array Board Circuit Blocks ........ .. ......... 5-34
Data Output Latches ............................ 5-34
RAM Address Decode .. ........................ 5-34
Clock ..... ....... ....... ........... ....... ..... 5-34
ROM Address Decode . .. ....................... 5-34
ROM .................... .......... ..... ..... .. . 5-35
Data Output Drivers .... .......... .............. 5-35
RAM Controller Board Theory .............. .... .... . ... . 5-35
General Description .. .. . .......................... . .. 5-35
General Operation ......... ... ................ .... ... 5-35
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RAM Controller Board Circuit Block Descriptions .. .. .. 5-38
Bus Receivers ............................. .. ... .. 5-38
RAM Control .. .... .............. . ........... ... .. . 5-38
Multiplexing of RAM Addresses ............... .. 5-38
Arbiter Circuitry ................. . ......... . .. . . 5-38
Timing and Control .. . ........... . .......... .. .. 5-38
Dynamic RAM Controller Operation .... . .......... . 5-39
Idling .................. . .............. . ........ 5-39
Write Cycle ................................... . 5-39
Read Cycle ..... ... . .............. ........... .. 5-39
Refresh Cycle .................................. 5-39
Data InputBuffers .. .................... ........... 5-39
Data Output Latches .............................. 5-39
RAM BaseAddress Decode ......... • .............. 5-39
Clock ..................... .. ......... ............. 5-40
Bank Address Decode .... ........... .............. 5-40
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4112 SERVICE (VOLUME 1)

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Section 6 OISPLA V BUS THEORY
Introduction to Display Bus ................. ... ........ .6-1
Vi deo Contr oll er Board Th eory ........................ .. 6-1
General Description and Overview .................... 6-1
Video Controller Circuit Block Descriptions
...... .. .... 6-3
Master Clock .. . .... .... ........ ... ............... 6-3
VideoTiming Generator . ....... ...... ............. 6-4
P ix el Timing Control ............................... 6-5
RAM Timing Generator .......... .......... .. ...... 6-6
Memory Cycle Priority Control ............... . ..... 6-6
11 0 Address Decoder .. ............ .. ........... .. .6-1 O
1/0 Interrupts and Status ......................... .6-11
Power Supply Synchronizer
................ .. .. .... 6-12
X CursorCounter ..................... ........... . 6-12
Y Cursor Counter ........ ..................... .... 6-14
CursorVideo ............................ ... ..... .. 6-14
VideoDAC ................. . ....... ............... 6-1 6
50 HzOperation . . .... . ........................... 6-16
External Sync. ..... ... ..... .................... . .. 6-1 6
VectorGenerator Board Theory . ...................... .. 6- 18
General Description and Overview ............... ..... 6-18
VectorGenerator Circuit Block Descri pt ions ........... 6-21
Bus
Tr ansceiver ....... .... ....................... 6-21
110 Decode .......... ..... ........................ 6-21
Eight-Bit Counter
................................. 6-23
• Twelve-B
it Counter ................................ 6-24
Slope Generator .................................. 6-24
Y Axis Addressing Logic ...... ..................... 6-26
X Addressing Logic ............... ................ 6-27
Move and Wipe Log ic .. . ........................... 6-29
Pattern Shift Registers ............................ 6-30
Countar Control Logic ........................ ..... 6-31
Index File.
.... . ............ . ..................... . 6-32
Pixel Write Logic .. . ............................... 6-33
Memory Control logic .. ....................... .... 6-33
State Controller .. .................. . ...... .. .... .. 6- 34
Operating Modes .......................... . ...... . 6-37
Interpretingthe Flow Diagram ........................ 6-38
Mnemonics Used in Microcode FlowDiagram ....... 6-39
Memory Mode Control Field Mnemoni cs .... ...... .. 6-39
CounterControl Field Mnemon ics .................. 6-40
Memory Cycle Control Field Mnemoni cs ............ 6-40
Subroutine Names ................................ 6-40
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Sec:· •• on 8 (cont)
Raster Memory Board Theory .......... ... . ... .. ... ..... 6-4 1
Introducti
on ..................... . ....... .. . .. ....... 6-41
Raster Memory Board Operating Modes
............... 6-42
Decodeand Startup Cycle ......................... 6- 42
Refresh Cycle ................... . ... ...... ........ 6-42
Vector Cycles .................................. . .. 6-44
Operate Cycle ...................... . ........... 6-44
Blockmove Source/Destination/Erase ..... . ... .. 6-44
Processor Read Cycle .... .................... .. 6-45
Circuit Block Descriptions ........ . ............. .. . .. . 6-46
Buffer ... ........................................ . 6-46
Addressable Latches .............................. 6-46
RAM Enable . .. .................................. . 6-46
RAM Control ..... . .............. . ........ . ........ 6-46
Vector Data Input ................. : ..... ... ....... 6-48
ALUsCircuit Block ....................... . .. .. .... 6-49
Blockmove Latch .............................. . ... 6-50
Memory Address Selectors ........................ 6-50
MemoryArray ................................. .... 6-51
ProcessorRead
latches ......................... .. 6-51
110 Decode ... . ................................... 6-52
VideoShiftRegister ............................... 6-52
VideoMap ....... . ............... .. .............. . 6-54
PowerComponents .. . ............................ 6-54
Dual Raster Memory Board .................... .. . .. ..... 6-54
Section 7 DISPLAYMODULETHEORY •
Introduction. .. .................................. ... . ... 7-1
Display Module Timing ........................ ...... . 7-2
Video Circuitry ......... . ................. . ........... 7-4
Multiplier Block ............ . .... .......... .. ...... 7-4
Level Shifter ............... . .............. .... . ... 7 -6
Video Amplifier .. ................... . ......... ..... 7-7
Horizontal Circuitry ....................... . ..... ..... 7-8
Horizontal Delay ...... .. ......................... . 7-8
Phase-Locked loop ............................ . .. 7-8
Horizontal Driver .................................. 7-9
Horizontal Output ................................. 7-10
Vertical Deflection Circuitry .. .... .................... 7-12
Synchronization Delay Circuit .... . ................. 7-12
Vertical Ramp Generator ......... . ................ 7- 12
Vertical Linearity ............................ . .. . .. 7 -13
Vertical Amplifier .................................. 7-13
High VoltageSupply ...... ... ... . ................. .. 7 -15
Error Amplifier ................................... .7 -15
TriggeredVariablePulseWidth Generator .......... 7-16
OutputCircuit. ....................... . ....... ..... 7-16
High Voltage Multiplierand Rectifier Circuit ........ 7-18
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Sec-tlon8
FUNCTIONAL CHECK
AND PERFORMANCE CHECKPROCEDURES
Introduc
ti on . ... . ...... ... .. .. .... . ... . ................. 8-1
Functional
Check Procedures. . .. .. ... ................. . 8-1
Power Up.
..... ....... . ................. ....... ...... 8-1
Adjustment
Self - Te st. .. . ............................. 8-2
The General Menu . .. .. .. ... . ........... ... .... . .. 8-2
41 12 Di splay Menu ...... . .............. . ......... 8-2
ProcessorBoard Menu ............................ 8-3
CMOS-Reset, Function Key Ft .. .. .............. 8-3
Keyboard,Function Key F2 ..... . .... .. ...... ... 8-3
HostPort Check,Function Key F3 ...... . ... . .... 8-3
Di sk Option Menu ............. . ................... 8-5
3PPI Adjustment Menu/Procedure .. . . .. .. ... .. ... . 8-6
TabletOption Menu .. . ..... .. ........ ... ... .. .. . .. 8-6
Tablet Timi ng Straps Verification ............... .... 8-7
Performance Check Procedures ..... ." .. ... .. .. . ..... . .. . 8-8
VIDEO Signal Level ........... .. ........ ... .. .. . ..... 8-8
HORIZ SYNCFrequency ........................... .. 8-8
VERTICAL SYNC Frequency .... .. ........ . ......... .. 8-8
Sectlon9
ADJUSTMENT PROCEDURES
RecommendedTest Equipment
........................ . 9-1
Di
sp l ay ModuleAdjustment Procedure ............. . ..... 9-2
Sho rt -Form Procedure ......... . ... .. ..... . ......... . 9-2
Long-Form Adjustment Procedure ........ . ......... .. 9-2
1. Initial Setup ...... .. ..... . ..... . ... . .. . ..... .. .. 9-2
2. Display Test Patterns ... ..... . .. ...... . .... .. ... 9-2
3. Check Horizontal Oscillator .. ... ..... . ....... . .. 9-4
4. Test Mode ........................... ... . .... ... 9-4
5.Null High Voltage Compensation. ... .. .. ......... 9-4
6. S9t D.C. Level. ...... . ... . .... . .. . .. .. .. .... . .. .. 9-4
7. G1 (Grid 1) Level Chee ls ..... . .... . ..... . ... .. . .. 9-4
8.Focus Adjustment. .... . ..... .. ............. . .... 9-4
9. Picture Centering Procedure . .. .... ....... .... .. 9-5
10 .Final Linearityand Size Adjustments .. ... .. .... 9-6
11 .Gray ScaleTracking and
Maximum Luminance Adjustment. ... . .......... 9-6
12 .Resolution Test. ....... . .. . .............. . ..... 9-6
13 .Horizontal OscillatorAdjustment ............... 9-7
14 .Hi gh Voltage AC Ripple Test . . .. ............... 9-7
15 .Measure High Voltage .. ..... . .. .. .... .... . . .. . 9-7
Power Supply Adjustments ... ..... . .. ... .. .......... .. .. 9-8
1. DC Voltages ................. ... . .. . .. .. . ....... 9-8
2. CHECK -Control Voltages .......... . .. .. .. ... . .. 9·8
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4112 SERVICE (V OL UME l)
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