Tektronix 7S14 User manual

Tektronix, Inc.
P.O.
Box 500
Beaverton, Oregon 97077
070-1410-00
Product Group 42
COMMITTED TO EXCELLENCE
PLEASE CHECK FOR CHANGE INFORMATION
AT THE REAR OF THIS MANUAL.
- 7S14
DUAL TRACE
DELAYED SWEEP SAMPLER
INSTRUCTION MANUAL
Serial Number ______ _
First Printing DEC 1973
Revised APR 1985

DIGITALY REMASTERED
OUT OF PRINT- MANUAL SCAN S
By
ArtekMedia
P.O. BOX 175
Welch, MN 55089-0175
Phone: [phone]
www.artekmedia.com
“High resolution scans of obsolete technical manuals”
If you are looking for a quality scanned technical manual in PDF format please visit our WEB
site at www.artekmedia.com or drop us an email at [e-mail]
If you don’t see the manual you need on the list drop us a line anyway we may still be able to
obtain the manual you need or direct you to other sources. If you have an existing manual you
would like scanned please write for details. This can often be done very reasonably in
consideration for adding your manual to our library.
Typically the scans in our manuals are done as follows;
1) Typed text pages are typically scanned in black and white at 300 dpi.
2) Photo pages are typically scanned in gray scale mode at 600 dpi
3) Schematic diagram pages are typically scanned in black and white at 600
dpi unless the original manual had colored high lighting (as is the case for
some 70’s vintage Tektronix manuals).
4) Most manuals are text searchable
5) All manuals are fully bookmarked
All data is guaranteed for life (yours or mine …whichever is shorter). If for ANY REASON your
file becomes corrupted, deleted or lost, ArtekMedia will replace the file for the priceof shipping,
or free via FTP download.
Thanks
Dave & Lynn Henderson
ArtekMedia

7S14
TABLE OF CONTENTS
SECTION 1 CHARACTERISTICS Page
General Information 1·1
Electrical Characteristics
1·1
Vertical System 1·1
Horizontal System 1·2
Environmental Characteristics 1·4
SECTION 2
BASIC SEQUENTIAL SAMPLING PRINCIPLES
Introduction
2·'
Equivalent·Time Sequential Sampling
2·1
Vertical Functions 2·2
Horizontal Functions 2-4
Glossary of Sampling Terms 2-4
SECTION 3 OPERATING INSTRUCTIONS
General Information 3·1
Mainframe Controls
3·'
Getting A Trace On Screen
3·'
Front Panel Controls 3·'
Other Plug·lns 3·7
SECTION 4 APPLICATIONS
Introduction
4·'
Phase Difference Measurements
4·'
X·Y Phase Measurements
4·'
Dual·Trace Phase Measurements 4·2
Time Difference Measurements 4-2
Two-Dot Measurements 4-3
Phase Measurements Using
the Two·Dot System 4-3
Pulse Width Measurements 4-3
Time Between Pulses Using Dual Trace 4-4
SECTION 5 CIRCUIT DESCRIPTION
Vertical System
Compensation Network 5·1
Delay Line
5·'
Sampling Gate
5·'
Sampling Gate Blow·by Compensation
5·'
Strobe Generator
5·'
Preamplifier
5·'
DC Balance and DC Balance Amplifier 5·2
Memory Gate 5·2
Memory Gating Generator 5·2
Memory Gate Blow-by Compensation 5·2
Memory 5·2
®
Scans by Artekmedia => 2010

7S14
ii
SECTION 5
TABLE OF CONTENTS (cant)
CIRCUIT DESCRIPTION (cont)
Post Memory Amplifier
Unity Gain Inverter (Channel 2 Only)
Output Amplifier
Switching
Vertical Power Supplies
Horizontal System
Peak-To-Peak Signal Follower
HF Synchronizer Oscillator
Trigger Amplifier
Holdoff Ramp Generator
Trigger Circuit
Fast Ramps
Delta Delay Generator
Buffer
Scan Ramp Gating Multivibrator
Interdot Blanking Pulse Generator
Inverter, Gating Generator,
and Gated Current Generator
Scan Ramp and Staircase Generator
Two Dot Circuit
Intensity Blanking Mixer
Position Voltage Follower & Horizontal Amplifier
Readout
Horizontal Power
SECTION 6 MAINTENANCE
Preventive Maintenance
General
Cleaning
Lubrication
Visual Inspection
Semiconductor Checks
Recalibration
Troubleshooting
Troubleshooting Aids
Component Identification
Troubleshooting Equipment
Troubleshooting Techniques
Troubleshooting Procedure
General
Test Procedure
Horizontal Checks
Vertical Checks
Corrective Maintenance
Obtaining Replacement Parts
Soldering Techniques
Circuit Board Replacement
Sampler Board Cover Removal
Vertical Board Removal
Page
5-2
5-2
5-3
5-3
5-3
5-3
5-3
5-3
5-5
5-5
5-5
5-6
5-7
5-7
5-7
5-7
5-7
5-7
5-8
5-8
5-8
5-8
6-1
6-1
6-1
6-1
6-1
6-1
6-2
6-2
6-2
6-3
6-4
6-5
6-5
6-9
6-11
6-11
6-12
6-12
6-12
®
Scans by ArtekMedia => 2010

7S14
TABLE OF CONTENTS
(cont)
SECTION 6 MAINTENANCE (cont) Page
Sampler Board Removal 6-12
Vertical
and Horizontal Interface Board Removal 6-12
Delay line Removal 6-13
Compensation Board Removal 6-13
Trigger Board Removal 6-14
Horizontal Board Removal 6-14
Readout Board Removal 6-14
Vertical Mode Switch Board Removal 6-14
Component Replacement
Semiconductor Replacement 6-15
Connector Replacement 6-15
Push-button Switches 6-16
Rotary Switches 6-17
Cam Switch 6-17
Recalibration After Repair 6-17
Instrument Repackaging 6-17
SECTION 7 PERFORMANCE CHECKS/CALIBRATlON
Elementary Checks and Incoming Inspection 7-1
Detailed Checks and Adjustments 7-3
Equipment Required 7-3
Preliminary Connections
and Set-up 7-4
Power
Supply Checks 7-4
Triggering Checks and Adjustments 7-6
Equipment Set-up 7-6
Trigger Calibration Check 7-6
Adjustment
of R212 (Trig Cal) 7-8
Sync Level Check 7-8
Adjustment
of R530 (Sync Level) 7-9
+ Balance and -Balance Check 7-9
Adjustment of R524 and R521 (+ Bal and - Bal)
7-9
Sync Bias Check 7-9
Adjustment
of R209 (Sync Bias) 7-10
Timing Checks and Adjustments 7-10
Equipment Set-up 7-10
2-Dot
Cal Check 7-10
Adjustment of R131 (2-Dot Cal) 7-10
Delay Stop Check 7-11
Adjustment
of R130 (Delay Stop)
7-11
1
J.1s/Div Delaying Check 7-11
Adjustment of R132 (1 J.1s/Div Delaying) 7-11
1
J.1s/Div Delayed Check 7-11
Adjustment of
R460 (1 J.1s/Div Delayed) 7-11
Scan Rate Check 7-12
Adjustment
of R381 (Scan Rate) 7-12
Leadtime
and Register Check 7-12
Adjustment
of R472 and R230 (Leadtime and Register) 7-12
Delayed
and Delaying Timing Checks 7-12
10 ns/Div, Delaying Check 7-13
Adjustment of C350 (10 ns/Div, Delaying) 7-13
REV. B, APR. 1977
iii
Scans by Artekmedia => 2010

7514
iv
TABLE OF CONTENTS (cant)
SECTION 7 CALIBRATION PROCEDURE (cont) Page
10 ns/Div, Delayed Check 7-13
Adjustment of C353 (10 ns/Div, Delayed) 7-13
Delayed
and Delaying Timing Verification 7-13
1 ns Linearity Check 7-13
Adjustment
of R380 (1 ns Linearity) 7-14
Vertical Checks and Adjustments 7-14
Equipment Set-up 7-14
Channel' Avalanche Check 7-15
Adjustment of R20 (Avalanche for
both Channel 1 and Channel 2) 7-15
Channel 2 Avalanche Check 7-16
Delta t Center Check 7-16
Adjustment of R458 (Delta t Center) 7-16
Channel' DC Balance, Loop Gain, and Memory Balance Checks 7-16
Adjustment of R233, R232 and R242 (DC Bal, Loop Gain, and Memory Bal) 7-17
Channel 2 DC Balance, Loop Gain and Memory Balance Checks 7-17
Adjustment of R330, R331 and R344 (DC Bal, Loop Gain, and Memory Bal) 7-17
Trigger
Jitter Check 7-18
Avalanche Recheck 7-18
Channel' L.F. Comparator Check 7-19
Adjustment of
CH 1 R30 (L.F. Comp.) 7-19
Channel 2 L.F. Comparator Check 7-19
Adjustment of CH 2 R30 (L.F. Comp.) 7-19
Channel' and Channel 2 Amplitude Attenuation Check 7-19
Channel' INPUT Connector Check 7-19
Channel 2 INPUT Connector Check 7-20
Channel 2 Amplitude Check 7-20
Channel' Amplitude Check 7-20
Readout Checks 7-20
SECTION 8 ELECTRICAL PARTS LIST
Parts Ordering Information
Abbreviations
Cross Index, Mfr. Code Number
to Mfr.
Parts List
SECTION 9 DIAGRAMS AND CIRCUIT BOARD ILLUSTRATIONS
Block Diagrams
Vertical Block Diagram
Horizontal Block Diagram
Electrical Schematics and Circuit Boards
Compensation
Samplers
Sampler Cover
Trigger
8-1
8-1
8-2
8-3
See Tabs
See Tabs
®
Scans by ArtekMedia => 2010

7S14
TABLE OF CONTENTS (cant)
SECTION 9 DIAGRAMS AND CIRCUIT BOARD ILLUSTRATIONS (cont)
Vertical Mode Switch
Attenuator Switches
Vertical
Horizontal
Timing Switch
Vertical Interface
Horizontal Interface
Readout
Interconnection
and Power Distribution
SECTION
10 MECHANICAL PARTS LIST AND MECHANICAL ILLUSTRATIONS See Tabs
® v
Scans by Artekmedia => 2010

7S14
50nlNPUT
.i 5V M AX
CH 1
VOLTS / OIV
~
V .2 5 mV
L6 2 ~
/;141
TIM
CRt
VEIII
lV'll
DC OFFSET _ 2V
CH 1
DC OFFSET 12V
116 OUT
I II
DE ... ' ZE RO \1tI DOl)
TRIGGERING
L£\'El
{
HOLD
Off
EXT INPUT
SOO
2V p.,. SOY DC MAX
MOlIIl
IVIDIV
, 0111
CII,fn
HF ~ : ~
Sy C
SCAN
[X l
Il
DUAL TRACE DELAYED
SWEEP SAMPLER 1,:350,.
Fig. 1-1. 1S14 Du al Tr ace D elay d Sweep Sampler .
®
Scans by ArtekMedia => 2010

Section 1-7S14
CHARACTERISTICS
General Information
The Tektronix 7S14 Dual Trace Delayed Sweep Sampler
is a general purpose sampling unit with a DC-to-1000 MHz
bandwidth. It will operate in any Tektronix 7000 Series
mainframe. The front panel terminology is similar to
that of
conventional oscilloscopes.
The 7S14 has
two time bases to provide "delaying" and
"delayed sweep" operation. The delayed sweep starts after
the selected delay interval, giving the effect of a wide-range
sweep operation. The delayed sweep starts after
the
selected delay interval, giving the effect of a wide·range
sweep magnifier. The calibrated delay replaces
the "time
position" control found on most sampling time-base units.
The 7S14 has a
two dot time-interval measurement
method
that provides a means of measuring the time
between
two points on the "normal" (delaying) display. A
brightened
dot on the trace can be positioned to the start
of
the event to be measured. A second brightened dot can
be positioned to the end of the event by using the Delay
Time Mult control. The time interval between
the two
points is the product of the reading on the Delay Time Mult
dial times
the Delaying Sweep Sec/Div setting_
Delay lines
in the input signal channels permit display of
the leading edge of the triggering waveform. The Auto
Level mode provides a bright baseline in the absence of a
triggering signal. Other features include 2 mV/div
sensitivity, low tangential noise, versatile triggering capabil-
ities, a broad range of sweep rates, and
crt readout of both
the attenuation and timing
values_
The characteristics given in the following Table apply over
an ambient temperature range from
O°C to +50°C after the
instrument has been calibrated at +25°C ±5°C. Under these
conditions,
the 7S14 will perform to the requirements given
in the Performance Check section of this manual.
The Supplemental Information column
of the Table
provides additional information about
the operation of the
7S14. Characteristics given in the Supplemental Infor-
mation column are
not requirements in themselves and are
not necessarily checked in the Performance Check
procedure.
ELECTRICAL CHARACTERISTICS
VERTICAL SYSTEM
Characteristics Performance Requirements Supplemental Information
Risetime 350
ps or less, 10% to 90% of step pulse
signal.
Step Aberrations +2%,
-3%, total of 5% or less Pop within Check made with Tektronix 284 Pulse
first 5
ns after step transition; +1 %, -1 %,
Generator; includes aberrations from the
total of 2% or less pop thereafter. 284.
Bandwidth
(-3 dB)
DC to 1 GHz or more. Calculated from risetime.
Input Resistance
50 n within 2%.
Deflection Factor 2 mV/Div
to 0.5 V/Div. 8 steps, 1-2-5 sequence.
Accuracy Within
±3% (with VARIABLE at CAL).
Variable At least 2.5:1. Extends uncalibrated deflection factor
to
approximately 800 I1V /Div.
Input Signal Range
Maximum Operation 2 V
pop (DC + Peak AC) within a +2 V to
-2 V window at any sensitivity.
Maximum Overload
±5V.
REV APR 1982
,-,
Scans by Artekmedia => 2010

Characteristics-7S 14
Characteristics
DC Offset Range
Displayed Noise (tangential)
Low Noise Operation
Vertical Signal
Out
Dot Slash
Interchannel Crosstalk
.1T Range
Delaying Time Base
Time Base Range
Time
Base Accuracy
Delay Zero Range
Delay Time Multiplier
Delay Accuracy
Delayed Time Base
Time
Base Range
Accuracy
Variable
1-2
ELECTRICAL CHARACTERISTICS (cont)
VERTICAL SYSTEM (contl
Performance Requirements
+2 V
or more to -2 V or more.
2 mV
or less, LOW NOISE switch "out".
Displayed noise reduced by at least five
times.
0.2 V/Div
of deflection ±3%.
Less
than 0.1 Div at 10 Hz and above.
-60 dB or less.
Shifts Channel 2
at least +1 ns to -1 ns
with respect to Channell.
HORIZONTAL SYSTEM
100
J.Ls/Div to 10 ns/Div.
Within ±2%, excluding first
Y, division of
displayed sweep.
0-9 divisions or more.
Each
turn equal to 1 crt division.
Within 1%
of full screen (10 crt divisions)
when measurement
is made between 1 st
and 9th crt divisions.
100 J.Ls/Div to 100 ps/Div.
Within ±3%, excluding first Y2division of
displayed sweep.
At least 2.5:1.
Supplemental Information
Source resistance
is 10 kU ±0.5%.
When input signal
is 0.5 GHz sine wave.
Range may be centered with internal
adjustment.
13 steps, 1-2-5 sequence.
No
time mark between 1st and 9th
divisions can be more than 0.2 divisions
from
the major division line when the 1 st
mark is set on the 1st division line.
When Delay Time Multiplier
is set to
0. 00, the 1st dot can be moved past the
9th graticule line.
Delaying Time/Div X Delay Time Mutt =
Time between dots.
19 steps, 1-2-5 sequence_
No time mark between 1st and 9th
divisions can be more than 0.3 divisions
from
the major divison line when the 1 st
mark is set on the 1st division line.
Extends uncalibrated Time/Div
to ap-
proximately
40 ps/Div.
®
Scans by ArtekMedia => 2010

Characteristics
Time Base Display Modes
Delaying Time Base
Delayed Time Base
Triggering
Amplitude Range
External
Internal
I
nput Resistance
Jitter
NORMAL Triggered Mode
Sine waves
Pulse
Minimum Rise Rate
Characteristics-7S 14
ELECTRICAL CHARACTERISTICS (cont)
HORIZONTAL SYSTEM (conti
Performance Requirements
10 mV to 2 V, pop .
50 mV to 2 V, pop.
51 n within ±10%, AC coupled.
Less than 40 ps with 50 mV, 5 ns width
trigger at external input.
Less than 30 ps when internally triggered
from
284 pulse.
150 kHz to 100 MHz.
10 Hz to 100 MHz.
10 mV//ls.
Supplemental Information
Conventional display, maximum lead
time . Left intensified dot indicates Time
Zero (Multiplier Zero). Right intensified
dot indicates point at which Delayed
Sweep
starts. Time between dots is read
from
the crt or the Delay Time Multiplier
dial.
Delayed
sweep display starts immediately
at end of delay time. Set by Delay Zero
plus Delay Time Multiplier. Operates in
same
manner as "run after delay" mode
in conventional oscilloscopes except Time
Zero
is adjustable and identified.
Rate
of rise, 10 mV//ls or faster.
At Sampler Input (vertical input signal).
Rate
of rise, 50 mV //ls or faster.
AUTO TR
IG Mode (Auto baseline when not triggered)
Sine waves
Minimum
Amplitude
Pulse
Minimum Pulse Width
Minimum Rise
Rate
®
150 kHz to 100 MHz.
10 mV pop at 100 MHz (Ext).
1 kHz to 100 MHz.
10 ns at 1 kHz.
10 mV//ls.
Auto baseline below 800 Hz.
1-3
Scans by Artekmedia => 2010

Characteristics-7S 14
Characteristics
HF SYNC Mode
Sine waves
Scan Controls
Repetitive
Single Sweep
Manual
Ext Scan
Maximum Sensitivity
Maximum
Input Voltage
Horizontal
Output Signal
Amplitude
Characteristics
Temperature
Operating Range
Non-operating Range
Altitude
Operating Range
Non-operating Range
Vibration Range
Shock Range
Transportation (Non-operating)
1-4
ELECTRICAL CHARACTERISTICS (cont)
HORIZONTAL SYSTEM (conti
Performance Requirements Supplemental
Information
100 MHz to 1 GHz. Free-Running Sync.
25 - 40 Hz Repetition Rate_ Repetition
rate barely into flicker rate.
Controls must be set
as follows:
Low Noise
Control, out;
HF SYNC Control, in;
Scan
Control, fully CW ;
Holdoff
control, fully CCW;
Delaying sweep, 1 ps/Div or faster;
Approximately
20 samples per div at low
trigger or sweep rates.
One sweep per Single Sweep
Start button Scan Rate is the same as set in Repetitive
depression. mode.
Scan
control moves the spot over a
slightly greater range
than 10 divisions.
1 V/Div within ±5%. Scan control serves
as an attenuator. Full
scale scan signal must
run from 0 V to
+10 V or more.
150 V.
1 V/Div
±5%_
Source resistance is 10 kD within ±0.5%.
ENVIRONMENTAL CHARACTERISTICS
O°C to +50°C _
-40 °C to +70°C.
To 15,000 feet.
To 50,000 feeL
Description
To
0.025 inch peak-to-peak displacement at 55 cycles per second.
To 30 g, Y, sine, 11 milliseconds duration.
Meets National Safe Transit Test Requirements.
®
Scans by ArtekMedia => 2010

Section 2-7S14
BASIC
SEQUENTIAL SAMPLING PRINCIPLES
Introduction
Sampling provides the means to display fast-changing
signals
of low amplitude that cannot be displayed in any
other way. Sampling overcomes the gain-bandpass limita-
tion inherent with conventional amplifiers and oscillo-
scopes. It does
so by displaying a real-time signal in
"equivalent" time. Only the input stage of a sampler is
subjected to the input signal; all subsequent signal amplifi-
cation takes place through relatively low bandwidth
amplifiers.
Sampling, however, does require repetitive input signals.
Fortunately, most fractional-nanosecond risetime signals
exist
in low impedance environments; thus they may be
delivered directly through 50 ohm cables
to a 50 ohm load.
They are generally low amplitude signals, so
50 ohm
attenuators are used when the signal is more than one or
two volts.
There are three types of sampling: sequential, random,
and real-time. The 7S14 uses
the sequential sampling
method; this technique will be discussed
in this section of
the manual.
Equivalent-time Sequential Sampling
The sampling system looks at the instantaneous ampli-
tude of a signal during a specific small time period,
remembers
the amplitude, and displays a single dot on the
crt that corresponds to the amplitude. The horizontal
position
of the dot represents the equivalent time when the
sample was taken. After a dot is displayed for a fixed
amount of time, ·
the system again looks at the instanta-
neous amplitude of a different cycle
of the input signal.
/'
I
I
I
,
/
Each successive look, or sample, is at a slightly later time in
relation to a fixed point of each sampled signal cycle. After
many cycles
of the input signal, the sampling system has
reconstructed and displayed a single facsimile made up
of
many samples, each sample taken in sequence from a
different cycle of
the input signal; thus, the term
"sequential sampling".
Because
the reconstructed signal is not completed until
long after
the first signal cycle has occurred, it is not
displayed in "real" time. The time displayed on the crt is
termed "equivalent-time". Such a display is shown in
Fig . 2-1 . The equivalent time between dots is determined
by the time delay between
the fixed point on the signal at
which sweep triggering occurs and the point at which the
sample is taken. The real-time and equivalent-time relation-
ship
is depicted in Fig. 2-2. Since both time references
(triggering and sampling) are taken from
the same cycle of
the signal, the signal repetitions do not have to be identical
in amplitude, time duration, and shape. Periodic differences
in individual cycles, however, will show as noise or jitter in
the reconstructed display if the shape or amplitude changes
from cycle
to cycle.
The number
of dots per horizontal division in one sweep
is called dot density. Since only one sample is taken from
any particular input cycle, the
time needed to reconstruct a
display depends on the
dot density and the repetition rate
of the signal. The greater the dot density and the slower the
repetition rate, the longer the time to construct the
equivalent-time display.
Sampling systems have maximum signal repetition rates
at which samples can be taken and accurately displayed.
"
\
\
\
\
\\
equivalent Time
Display
Input
Signal
Fig.
2·1. Input pulse of a repetitive real- time signal is reconstructed in an equivalent·time display via sequencial sampling.
® 2-1
Scans by Artekmedia => 2010

Basic Sequential Sampling Principles-7S14
JoI~_------- Real-time Sample Spacing ---------t~~
I ~~
Equivalent-time
Sample Spacing
I I I
First Sample
Taken Here
Last Sample Taken at
this Point on Waveform
N_Sample
Taken Hera
Fig. 2-2. Real-time
and equivalent- time relationship .
The primary limit is the time needed for the vertical
amplifiers
to stabilize after a sample has been taken_ For
signals with a repetition rate higher
than 30 kHz, the timing
unit holds off retriggering for a maximum
of approximately
35
J.ls. This means that a sample will not be taken from
every cycle
of a high repetition rate signal; only those
cycles are sampled
that occur after the end of the trigger
holdoff.
If the signal is truly repetitive and each cycle is
identical, these "missed" cycles are of little significance.
Signals below 30 kHz may have considerable repetitive
rate jitter,
but the sampling oscilloscope can still give a
sample of each cycle
without display jitter because trig-
gering and sampling
both occur on the same cycle.
Vertical Functions
The sampling oscilloscope's vertical stages perform the
same basic functions as those
in a nonsampling oscillo-
scope: i.e., signal amplification and attenuation. Vertical
signal delay
is also used to permit viewing a signal's leading
edge.
All the amplification and signal processing in the
sampling oscilloscope (except for the passive 50 ohm input)
is done at relatively low frequencies. It is this feature that
makes the sampling oscilloscope unique in performance and
design.
Sampling begins with
the input signal being changed to
stored, long duration, low frequency voltages consisting of
brief portions (samples) of the input_ This change is not a
frequency conversion; rather, it
is a different way to
represent the input signal.
2-2
The sampled energy is stored in a memory circuit so that
it stays constant between samples. Each time a new sample
is taken, the memory is refreshed. The amount of sampled
and stored energy represents
the amplitude of the input
signal when
that sample is displayed on the crt.
Vertical stages
in a sampling oscilloscope include some
not found
in a nonsampling oscilloscope, such as a
Sampling Gate, Blow-by Compensation, Preamplifier,
Memory Gate, Memory Amplifier and · Feedback, and
Memory Gating Generator_ Circuit descriptions for these
stages appear
in Section 5. In summary, stage purposes
are: Sampling Gate samples brief portions
of the input
signal; Blow-by Compensation nullifies unwanted signal
coupling; Preamplifier and Memory Amplifier and Feed-
back keep the Sampling Gate
output and Memory constant
between samples, making
the Sampling Gate output propor-
tional
to its input; the Memory Gate passes the sampled
signal
to ~he Memory; and the Memory Gating Generator
turns on
the two gates.
An important part
of the sampling process is a sampling
loop. This loop provides
in -phase feedback of the sampled
and memory energy
to the Sampling Gate output. The
feedback forms a null-seeking servo loop
that attempts to
make a zero difference between the Sampling Gate input
and
output.
When the gain of the feedback loop is unity, it
compensates for
the attenuation across the Sampling Gate.
In this case, the feedback voltage equals the value of the
sampled input signal Voltage. When the loop gain is less than
unity, the feedback voltage
is less than necessary to
equalize the voltage across the gate. The Memory output
and feedback will then approach the signal asymptotically
after several samples have been taken_The Memory
output
Scans by ArtekMedia => 2010

is effectively a moving average of several preceding samples.
When the loop gain is greater than unity, the feedback
voltage
is greater than the Sampling Gate input signal. The
resulting
crt display of a step signal input will alternately
overshoot and undershoot for a few samples. For
the least
display
distortion, the loop gain must be unity, allowing the
system to track the input signal as closely as possible.
A loop gain
of less than unity can be useful, if the
resulting condition is understood and the system is ope r-
ated properly. Random noise
in the display is reduced when
loop gain
is less than unity, since several consecutive
samples are averaged. The averaging, however, will slow
the
risetime of an abrupt step signal depending on the number
of dots in the step transition and how much I~ss than unity
the loop gain may be. Averaging will also reduce
the
amplitude of a sine wave if there are not enough dots per
cycle.
~--- Gain
Basic Sequential Sampling Principles-7S14
When the memory gate is open, it passes the sampled
signal and charges a capacitor in the memory gate output.
This stored charge remains essentially constant until an-
other sample
is taken . The memory output is not reset to
zero after a given sample, but is held at the level of the
previous sample by the feedback signal.
In the memory gate output there is a LO NOISE control
that reduces the random noise seen at high sensitivities. The
function of this control is known as "smoothing ," in that it
smoothes
or averages several consecutive samples. A check
for
whether smoothing is producing any distortion is
accomplished by increasing the number of dots in the
display with the SCAN control and observing whether there
is any significant change in the waveform.
Fig. 2-3 shows
the usual effects of smoothing for two
different sampling densities (sampling density or dot
density is the number of samples or dots per horizontal
division).
Unity Loop -l
(Normal) _--.---- •• .• - ---.-.----- ••• ---- ••• -.-- --4--- - -. --
90% -- ---- - - - - - -: •• .::~--- - - - -:_-:~-.- •• - .'. ... ... .. - -_ ••• -
®
" ..... -
, --
,,~ ~,
. "
"" ,tt"
.' ,
" ,,'
" ,
,I· ,I.
, ,
" "
" ,.'
.' ,
,I' ",
, .'
,.' "
10% .' ",
:;':- ~--- .. - --
. __ ._. ____ .. ... ::_-.·-1 '" .--------
Displayed
Loop Gain
(SMOOTH)
Unity Loop j
Gain
(Normal) ... "!:S:a-- ........ -.----
..... ~ ..
90% - --- --- --- '- •• _-
.' ,.
,.' ,.
,. .J-
. .'
.' .'
,.' .'
. '
.' ., .
.
' .'
,-' I·'
,. ,.
• •
.' ,.'
.' .
.
' ,.'
10% -~,~ --
(A) Low Sampling Density
., .... 1 Displayed
__ •·•·• .. .esr ..... 1 ~ Loop Gain (8) Increased Sampling Density
(SMOOTH)
Fig. 2·3. Equivalent · time display with and without smoothing for two different sampling densities.
2-3
Scans by Artekmedia => 2010

Basic Sequential Sampling Principles-7S14
The signal out of the memory gate gets amplified by the
memory circuit. Each change in voltage at the memory
output is a step change proportional in amplitude to a step
at the input to the preamplifier.
On sampling systems having
two input channels, such as
the 7S14, there are two sets of sampling·loop circuits. The
output from each of the memories is fed to a channel
switching multivibrator
that selects which output each dot
represents, so that either channel can be displayed, or so
that both channels can be displayed, as two traces, by
alternating
outputs with each successive dot.
Horizontal Functions
The Horizontal system provides deflection voltage for
the crt display and simultaneously controls the time at
which the vertical system samples the input signal. The
system uses (1) a 1 GHz trigger circuit, (2) two fast ramps
for either Delaying sweep
or Delayed sweep operation, (3) a
combination scan ramp and staircase generator to provide
horizontal
deflection and a comparison level for the fast
ramps, (4)
two intensified positionable dots to provide an
accurate dial read-out for
time measurements and (5) a
delay
generator to provide strobe drive to the two vertical
channels so
that the signal at one input channel may be
sampled consistently earlier
than, later than, or coincident
with
the signal at the other input.
The sampling oscilloscopes's horizontal sweep is pro·
duced by a staircase voltage
that advances one step each
time a sample
is taken. One cycle of the input signal causes
the trigger circuit to initiate one cycle of the sampling
process and
produce one dot for the display.
The sampling cycle starts
when the trigger circuit
recognizes a
point in a cycle of the triggering signal and
unclamps
the fast ramp generator. The fast ramp generator
produces a linear
rundown voltage that is compared to the
slowly changing staircase voltage. The resulting pulse that
occurs the instant the fast ramp voltage level equals the
staircase voltage level is sent to the vertical circuit via the
Delta Delay Generator as a strobe drive pulse. From there
the strobe also goes to the Scan Ramp and Staircase
Generator
as a staircase-advance pulse.
The staircase generator advances
one step just after the
sampling circuit takes a sample of the input signal. The
sampling
memory output is applied to the vertical amplifier
and
the staircase output level is applied to the horizontal
deflection
system of the oscilloscope. As soon as the sample
2-4
has been taken, a dot is displayed on the crt screen at a
vertical position proportional
to the input signal voltage
level
at the instant it was sampled. The dot then remains
stationary
on the screen until another sample is taken.
Each subsequent recognized triggering signal cycle ini-
tiates
the same sequence of events. But since the staircase
voltage moves
down one step each time, the fast ramp has
to run slightly farther each time before a comparison pulse
is produced. In this way the sampling event is delayed by
successively longer intervals
and the samples are taken
successively later along the waveform with respect to the
triggering point. Each time a sample is taken, the crt is
blanked momentarily while the dot on the crt moves
horizontally by one increment.
The
7S14 contains a "two-dot circuit" that provides two
bright dots for each trace. With the two dot circuit it is
possible to position the dots to two specific points in the
waveform and measure the time interval between the points
directly from the 2nd dot positioning control.
Glossary of Sampling Terms
There are many terms used in the discussion of sampling
systems whose definitions may
not be universal. The
following terms, used in this manual, have been compiled to
help avoid confusion.
Blow-by-A display aberration resulting from signal-induced
displacement
current through all capacitance shunting
the Sampling Gate.
Display
Window-The particular time interval represented
within
the horizontal limits of the graticule.
Dot-A displayed spot indicating the horizontal and vertical
coordinates of a particular sample.
Dot Density-The number of dots per horizontal division in
anyone scan.
Equivalent
Time-The time scale represented in the display
of a sampling oscilloscope operating in the equivalent-
time sampling mode.
Equivalent-time
Sampling-A sampling process in which a
least
one repetitive signal event is required for each
sample
taken. The time required for display construction
is thus greater than the time represented in the display.
REV 8 OCT 1980
Scans by ArtekMedia => 2010

Fast Ramp or Slewing Ramp-A linear ramp which acts
with a slower staircase, ramp,
or other changing voltage
to cause slewing.
Feedback-The effective intersample attenuation in the
signal path between Memory output and Sampling Gate
output in a sampling loop.
Forward
Gain-The effective gain between the Sampling
Gate
output and Memory output in a sampling loop.
Loop
Gain-The product of sampling efficiency, forward
gain
and feedback attenuation in a sampling loop. Loop
gain
is normally unity except in a smoothed display
where
it may be less than unity.
Memory-A circuit which stores the vertical (or horizontal)
coordinate value of a sample.
Memory
Gate-An electronic switch between a Memory and
its driving amplifier.
Pretrigger-A trigger signal which occurs before a related
signal event.
Real
Time-The time scale associated with signal events.
Sampling-A process of sensing and storing one or more
instantaneous values
of a signal for further processing or
display.
Basic Sequential Sampling
Principles-7S14
Sampling Efficiency-The ratio of the voltage change
between
the instant before sampling, C, and the instant
after sampling,
t+, at the output of a Sampling Gate to
the difference between gate input Voltage, Ej, and gate
output voltage, Eo, at the instant before sampling.
Sampling
Gate-An electronic switch which conducts
briefly upon command for the purpose of collecting and
storing
the instantaneous value of a signal.
Sampling Loop-Those circuits providing the main signal
path
through the Sampling Gate, Preamplifier, Loop
Gain
attenuator, DC Balance Amplifier, Memory Gate,
Memory, and
the Feedback attenuator.
Scanning-The process by which slewing is controlled.
Sequential Sampling-A sampling process in which samples
are
taken at successively later times relative to a fixed
point of each sampled signal cycle.
Slewing-The process of causing successive samples to be
taken
at different instants relative to a fixed point of
each sampled signal cycle.
Smoothing-A process that reduces the effect of random
noise or jitter
in the display by averaging several
consecutive samples.
Strobe-A pulse of short duration which operates the
Sampling Gate.
2-5
Scans by Artekmedia => 2010

Scans by ArtekMedia => 2010

Section 3-7514
OPERATING INSTRUCTIONS
General Information
The 7514 is a double-width plug-in unit containing both
vertical and horizontal deflection circuits. The 7S14
operates in any Tektronix
7000 Series mainframe when the
unit is completely inserted into the proper two slots of the
mainframe plug-in compartment. When inserted into main-
frames
that accommodate three single-width plug-ins, the
two slots toward the operators right should be used. The
middle
two slots should be used in four-hole mainframes.
NOTE
When the 7S14 is used in the R7603, R7613, R7623,
or R7903 rackmount instruments, the support posts
between the rackmount plug-in compartments must
be removed so that the dual width 7S14 can be
inserted into the mainframe.
A blank plug-in panel may be used to cover the opening
of any slot
not occupied by a plug- in unit. Use panel
016-0155-00 for
7000 Series mainframes.
Assuming it
is clean and dry, the plug·in unit is ready to
operate as soon as it has been correctly installed in the
mainframe. However, the mainframe power cord must first
be plugged into a power
outlet that supplies AC voltage of
the correct frequency and amplitude and the mainframes
power switch must be turned
on. It should not be necessary
to turn
the power off before removing or inserting the
plug·in unit.
Mainframe Controls
Besides the power switch, there are other switches and
controls
on the mainframe that must be set for the 7S14 to
operate correctly. If you are not already familiar with the
functions of the mainframe controls you may need to refer
to the instruction manual for
that mainframe.
Getting A Trace On Screen
With power applied and the plug-in properly inserted,
the next
step is to get a trace on screen. The recommended
procedure
is to (1) temporarily disconnect any vertical
input
or trigger input signals, (2) select the repetitive scan
mode
by pushing the REP button, (3) select 1 I./.S per
division
or faster for the DELAYING SWEEP (dark gray)
control, (4) free-run
the time base and sampling circuits by
pushing
the AUTO TRIG and HF SYNC buttons, (5) select
Channel 1 Vertical input
by pushing the CH 1 button, (6)
set
the Channell VOLTS/DIV control to the least sensitive
position, counterclockwise
to .5 V, (7) center the
®
Channell DC OFFSET controls, and (8) adjust the
mainframe crt intensity control for a medium bright trace.
If a trace does not appear under these conditions, it is likely
that either some mainframe control was incorrectly set, or
that the mainframe or plug-in unit is not functioning
properly.
Front Panel Controls
A brief description of the purpose and use of each front
panel connector,
pushbutton, control, and screwdriver·
adjustment
on the 7S14 follows. If you have never operated
a sampling oscilloscope, you should read
the entire section
before proceeding
to display a signal waveform. You should
refer
to Fig. 3·1 as a guide to specific operating instructions
relating
to each front panel control or connector.
1. 50 n INPUT
±5 V
MAX
These are input connectors to both
Channell and Channel 2 sampling
gate circuits and vertical deflection
amplifiers. Signals
as large as 2 V
pop in amplitude may be handled,
as long as no swing exceeds +4 volts
or -4 volts. However, peak signal
excursions
that exceed +2 volts or
-2 volts cannot be displayed at the
more sensitive setting, even when
using maximum
DC OFFSET. Volt-
age greater
than ±5 volts may alter
the accuracy of precision delay line
compensation resistors or cause
input circuit components
to fail.
External probes
or 50 ohm attenua-
tors should
be used to display signal
voltages greater than 4 volts. The
following probes are recommeded:
P6056, lOX probe; P6057,
100X probe; P6201, 1X, lOX and
100X FET probe. You
wiJI need a
1101 Power Supply for
the P6201
probe if
the mainframe does not
have a probe power
output jack.
The BNC 50 ohm attenuators
recommended are:
011·0059·02
(lOX), 011·0060·02 (5Xl, and
011·0069·02 (2X). Signals as great
as ±20 volts peak or 14 volts RMS
may be applied to these attenuators
before exceeding the wattage
rating.
50 ohm attenuators having
connectors
other than the BNC
type may be used if adapters to
BNC connectors are available.
3-1
Scans by Artekmedia => 2010

Operating I nstructions-7S 14
600 INPUT
!5VMAX
f
'1'-
DC OFFSET U\
CH 1
VOLTS/DIV
~
V .2 5 mV
l .5 2 ~
CHI
TIME D'FF
CH2
0r-----'---- -
(D- -....:.c
TEKTRONIX .
VUT
2V I DIV
~
TRIGGERING
L EVU
~
HOLD
OFF
EXT INPUT
500
16
OTt
I ,.)
IIflAY nilE
IIULT (2.' DDT)
,,--- ~-- -j 26
~--® 9
TR IG
-=--------®
~ -- ®
SII'IS' -= =- --- @ 22
SCAN
~ ~~ ~ -I ~ I ---I.- I - II ~I. II ~I~ I I~~
1S 14 ,
2. CH 1
VOLTS/DIV
and
CH 2
VOLTS/DIV
3-2
0 ®®
Fig. 3·1. Key to Operating I nstructions .
The outer control selects the ver-
tical deflect i on factor from
.5 V/Div to 2 mV/ Div . The red var-
iable control (CAL) adjusts sensitiv-
ity over a range of
at least 2.5 to 1.
The two controls provide any sen-
sitivity between .5 V per division
and .8 mV per division.
The CAL
control must be set
in the fully
count erclockwise (detented)
position before the indicated de-
flection
factor can be expected to
be accurate.
3. DC OFFSET
±2 V These
two cont rols position the
display up or down or POSition a
signal
on screen that otherwise may
be off screen. A signal riding
on a
DC level as great as +2 volts or
-2 volts may be positioned to
center screen. The FIN E control
makes it easier
to precisely position
the display at high sensitivities.
®
Scans by ArtekMedia => 2010